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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Subject: [Qemu-devel] [PATCH 3/4] ppc-40x: Correct decoding of zone protection bits.
Date: Mon, 11 Jan 2010 15:49:50 +0100	[thread overview]
Message-ID: <1263221391-3642-4-git-send-email-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <1263221391-3642-3-git-send-email-edgar.iglesias@gmail.com>

The 40x MMU has 15 zones in the ZPR register.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---
 target-ppc/helper.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index b233d4f..f9b5589 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1155,7 +1155,7 @@ static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
                              env->spr[SPR_40x_PID], 0, i) < 0)
             continue;
         zsel = (tlb->attr >> 4) & 0xF;
-        zpr = (env->spr[SPR_40x_ZPR] >> (28 - (2 * zsel))) & 0x3;
+        zpr = (env->spr[SPR_40x_ZPR] >> (30 - (2 * zsel))) & 0x3;
         LOG_SWTLB("%s: TLB %d zsel %d zpr %d rw %d attr %08x\n",
                     __func__, i, zsel, zpr, rw, tlb->attr);
         /* Check execute enable bit */
-- 
1.6.4.4

  reply	other threads:[~2010-01-11 14:55 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-01-11 14:49 [Qemu-devel] [PATCH 0/4] PPC 40x MMU fixes Edgar E. Iglesias
2010-01-11 14:49 ` [Qemu-devel] [PATCH 1/4] ppc-40x: Get TLB attributes from TLBLO Edgar E. Iglesias
2010-01-11 14:49   ` [Qemu-devel] [PATCH 2/4] ppc-40x: Correct check for Endian swapping TLB entries Edgar E. Iglesias
2010-01-11 14:49     ` Edgar E. Iglesias [this message]
2010-01-11 14:49       ` [Qemu-devel] [PATCH 4/4] ppc-40x: Correct ESR for zone protection faults Edgar E. Iglesias

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