From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NVrBd-0004Ua-AP for qemu-devel@nongnu.org; Fri, 15 Jan 2010 13:46:21 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NVrBZ-0004Sn-V4 for qemu-devel@nongnu.org; Fri, 15 Jan 2010 13:46:21 -0500 Received: from [199.232.76.173] (port=52463 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NVrBZ-0004Sh-NY for qemu-devel@nongnu.org; Fri, 15 Jan 2010 13:46:17 -0500 Received: from mail-fx0-f222.google.com ([209.85.220.222]:63901) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NVrBZ-0002Pa-9T for qemu-devel@nongnu.org; Fri, 15 Jan 2010 13:46:17 -0500 Received: by fxm22 with SMTP id 22so547912fxm.2 for ; Fri, 15 Jan 2010 10:46:15 -0800 (PST) From: Artyom Tarasenko Date: Fri, 15 Jan 2010 19:46:12 +0100 Message-Id: <1263581172-16129-1-git-send-email-atar4qemu@google.com> Subject: [Qemu-devel] sparc32 do_unassigned_access overhaul List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl , Artyom Tarasenko According to pages 9-31 - 9-34 of "SuperSPARC & MultiCache Controller User's Manual": 1. "A lower priority fault may not overwrite the MFSR status of a higher priority fault." 2. The MFAR is overwritten according to the policy defined for the MFSR 3. The overwrite bit is asserted if the fault status register (MFSR) has been written more than once by faults of the same class 4. SuperSPARC will never place instruction fault addresses in the MFAR. Implementation of points 1-3 allows booting Solaris 2.6 and 2.5.1. Signed-off-by: Artyom Tarasenko --- diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index 381e6c4..3a56ce9 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -3714,6 +3714,7 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, int is_asi, int size) { CPUState *saved_env; + int fault_type; /* XXX: hack to restore env in all cases, even if not called from generated code */ @@ -3731,18 +3732,27 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, is_exec ? "exec" : is_write ? "write" : "read", size, size == 1 ? "" : "s", addr, env->pc); #endif - if (env->mmuregs[3]) /* Fault status register */ - env->mmuregs[3] = 1; /* overflow (not read before another fault) */ - if (is_asi) - env->mmuregs[3] |= 1 << 16; - if (env->psrs) - env->mmuregs[3] |= 1 << 5; - if (is_exec) - env->mmuregs[3] |= 1 << 6; - if (is_write) - env->mmuregs[3] |= 1 << 7; - env->mmuregs[3] |= (5 << 2) | 2; - env->mmuregs[4] = addr; /* Fault address register */ + /* Don't overwrite translation and access faults */ + fault_type=(env->mmuregs[3]&0x1c)>>2; + if ((fault_type > 4) || (fault_type==0)) { + env->mmuregs[3]=0; /* Fault status register */ + if (is_asi) + env->mmuregs[3] |= 1 << 16; + if (env->psrs) + env->mmuregs[3] |= 1 << 5; + if (is_exec) + env->mmuregs[3] |= 1 << 6; + if (is_write) + env->mmuregs[3] |= 1 << 7; + env->mmuregs[3] |= (5 << 2) | 2; + /* SuperSPARC will never place instruction fault addresses in the FAR */ + if (!is_exec) + env->mmuregs[4] = addr; /* Fault address register */ + } + /* overflow (same type fault was not read before another fault) */ + if (fault_type==((env->mmuregs[3]&0x1c))>>2) + env->mmuregs[3] |= 1; + if ((env->mmuregs[0] & MMU_E) && !(env->mmuregs[0] & MMU_NF)) { if (is_exec) raise_exception(TT_CODE_ACCESS); @@ -3750,6 +3760,10 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, raise_exception(TT_DATA_ACCESS); } env = saved_env; + /* flush neverland mappings created during no-fault mode, + so the sequential MMU faults report proper fault types */ + if (env->mmuregs[0] & MMU_NF) + tlb_flush(env, 1); } #else void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,