From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NVunT-0006Ie-L9 for qemu-devel@nongnu.org; Fri, 15 Jan 2010 17:37:39 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NVunP-0006Gv-0i for qemu-devel@nongnu.org; Fri, 15 Jan 2010 17:37:39 -0500 Received: from [199.232.76.173] (port=56866 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NVunO-0006Gp-T6 for qemu-devel@nongnu.org; Fri, 15 Jan 2010 17:37:34 -0500 Received: from mail-fx0-f222.google.com ([209.85.220.222]:47533) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NVunO-0006wB-G3 for qemu-devel@nongnu.org; Fri, 15 Jan 2010 17:37:34 -0500 Received: by fxm22 with SMTP id 22so775568fxm.2 for ; Fri, 15 Jan 2010 14:37:33 -0800 (PST) From: Artyom Tarasenko Date: Fri, 15 Jan 2010 23:37:30 +0100 Message-Id: <1263595050-17791-1-git-send-email-atar4qemu@google.com> Subject: [Qemu-devel] sparc32 do not clear interrupts when masking List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl , Artyom Tarasenko Don't clear interrupts on disabling, because * Sun4M_SystemArchitecture_edited2.pdf doesn't describe that masking or un-masking IRQ shall clear pending ones. * Field tests also show that SPARCstation-20 doesn't clear them. * The patch makes Solaris 2.5.1/2.6 boot ~1500 times faster (~20 seconds instead of ~8 hours) Signed-off-by: Artyom Tarasenko --- diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c index 9aff892..b76d3ac 100644 --- a/hw/slavio_intctl.c +++ b/hw/slavio_intctl.c @@ -185,11 +185,10 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, s->intregm_disabled); slavio_check_interrupts(s, 1); break; - case 3: // set (disable, clear pending) + case 3: // set (disable; doesn't affect pending) // Force clear unused bits val &= MASTER_IRQ_MASK; s->intregm_disabled |= val; - s->intregm_pending &= ~val; slavio_check_interrupts(s, 1); DPRINTF("Disabled master irq mask %x, curmask %x\n", val, s->intregm_disabled);