[Qemu-devel] [PATCH 00/10] PPC NewWorld fixery v4

[Qemu-devel] [PATCH 00/10] PPC NewWorld fixery v4

[Alexander Graf]

I'm trying to get the PPC64 system emulation target working finally.
While doing so, I ran into several issues, most related to PCI this time.

This patchset fixes all the PCI config space access and PCI interrupt
mapping issues I've found on PPC64. Using this and a patched OpenBIOS
version, I can successfully access IDE devices and was booting a guest
into the shell from IDE using serial console.

To leverage this patch, you also need a few patches to OpenBIOS. I'll
present them to the OpenBIOS list, but in general getting patches into
Qemu is harder than getting them into OpenBIOS. So I want to wait for
the review process here first.

Find the OpenBIOS patch at: http://alex.csgraf.de/openbios-ppc-u3.patch

WARNING: This patchset is based on top of mst's rwhandler patches. You
         can find those here:

         git://git.kernel.org/pub/scm/linux/kernel/git/mst/qemu.git

v1 -> v2:

  - use decoding function for config space bits
  - merge config space data access functions
  - introduce encoding function for x86 style encodings
  - convert Uninorth to use config space decoder

v2 -> v3:

  - call pci_addr_to_devfn pci_addr_to_config_reg
  - split out debug fix
  - call convert functions config_addr instead of config_reg
  - no spaces between braces
  - dropped: Enable secondary cmd64x
  - new: Tell the guest about the time base frequency
  - new: Use macio IDE controller for Newworld
  - new: Get rid of segfaults in DBDMA emulation
  - new: Add USB per default on U3

v3 -> v4:

  - fix fgets warning
  - use self-contained config space data functions
  - use mst's rwhandler
  - move lspci output up
  - new: Fix large pages
  - new: Add timer when running KVM

Alexander Graf (10):
  PPC: Uninorth config space accessor
  PPC: Use Mac99_U3 type on ppc64
  PPC: Include dump of lspci -nn on real G5
  PPC: Make interrupts work
  PPC: tell the guest about the time base frequency
  PPC: Use macio IDE controller for Newworld
  PPC: Get rid of segfaults in DBDMA emulation
  PPC: Add USB per default on U3
  PPC: Fix large pages
  PPC: Add timer when running KVM

 hw/mac_dbdma.c       |   10 ++-
 hw/pci_ids.h         |    1 +
 hw/ppc.h             |    2 +
 hw/ppc_mac.h         |    1 +
 hw/ppc_newworld.c    |   73 +++++++++++++++++++++---
 hw/ppc_oldworld.c    |    9 +++
 hw/unin_pci.c        |  151 ++++++++++++++++++++++++++++++++++++++++++++++++-
 target-ppc/helper.c  |    9 +--
 target-ppc/kvm.c     |   70 +++++++++++++++++++++++
 target-ppc/kvm_ppc.h |    2 +
 10 files changed, 308 insertions(+), 20 deletions(-)

[Qemu-devel] [PATCH 01/10] PPC: Uninorth config space accessor

[Alexander Graf]

The Uninorth PCI bridge requires different layouts in its PCI config space
accessors.

This patch introduces a conversion function that makes it compatible with
the way Linux accesses it.

I also kept an OpenBIOS compatibility hack in. I think it'd be better to
take small steps here and do the config space access rework in OpenBIOS
later on. When that's done we can remove that hack.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/unin_pci.c |   67 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 66 insertions(+), 1 deletions(-)

diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 19eb5e0..0fbef1e 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -39,6 +39,7 @@
 typedef struct UNINState {
     SysBusDevice busdev;
     PCIHostState host_state;
+    ReadWriteHandler data_handler;
 } UNINState;
 
 /* Don't know if this matches real hardware, but it agrees with OHW.  */
@@ -75,6 +76,68 @@ static void pci_unin_reset(void *opaque)
 {
 }
 
+static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr)
+{
+    uint32_t retval;
+
+    if (reg & (1u << 31)) {
+        /* XXX OpenBIOS compatibility hack */
+        retval = reg | (addr & 3);
+    } else if (reg & 1) {
+        /* CFA1 style */
+        retval = (reg & ~7u) | (addr & 7);
+    } else {
+        uint32_t slot, func;
+
+        /* Grab CFA0 style values */
+        slot = ffs(reg & 0xfffff800) - 1;
+        func = (reg >> 8) & 7;
+
+        /* ... and then convert them to x86 format */
+        /* config pointer */
+        retval = (reg & (0xff - 7)) | (addr & 7);
+        /* slot */
+        retval |= slot << 11;
+        /* fn */
+        retval |= func << 8;
+    }
+
+
+    UNIN_DPRINTF("Converted config space accessor %08x/%08x -> %08x\n",
+                 reg, addr, retval);
+
+    return retval;
+}
+
+static void unin_data_write(ReadWriteHandler *handler,
+                            uint64_t addr, uint32_t val, int len)
+{
+    UNINState *s = container_of(handler, UNINState, data_handler);
+#ifdef TARGET_WORDS_BIGENDIAN
+    val = qemu_bswap_len(val, len);
+#endif
+    UNIN_DPRINTF("write addr %" PRIx64 " len %d val %x\n", addr, len, val);
+    pci_data_write(s->host_state.bus,
+                   unin_get_config_reg(s->host_state.config_reg, addr),
+                   val, len);
+}
+
+static uint32_t unin_data_read(ReadWriteHandler *handler,
+                               uint64_t addr, int len)
+{
+    UNINState *s = container_of(handler, UNINState, data_handler);
+    uint32_t val;
+
+    val = pci_data_read(s->host_state.bus,
+                        unin_get_config_reg(s->host_state.config_reg, addr),
+                        len);
+    UNIN_DPRINTF("read addr %" PRIx64 " len %d val %x\n", addr, len, val);
+#ifdef TARGET_WORDS_BIGENDIAN
+    val = qemu_bswap_len(val, len);
+#endif
+    return val;
+}
+
 static int pci_unin_main_init_device(SysBusDevice *dev)
 {
     UNINState *s;
@@ -85,7 +148,9 @@ static int pci_unin_main_init_device(SysBusDevice *dev)
     s = FROM_SYSBUS(UNINState, dev);
 
     pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
-    pci_mem_data = pci_host_data_register_mmio(&s->host_state);
+    s->data_handler.read = unin_data_read;
+    s->data_handler.write = unin_data_write;
+    pci_mem_data = cpu_register_io_memory_simple(&s->data_handler);
     sysbus_init_mmio(dev, 0x1000, pci_mem_config);
     sysbus_init_mmio(dev, 0x1000, pci_mem_data);
 
-- 
1.6.0.2

[Qemu-devel] [PATCH 02/10] PPC: Use Mac99_U3 type on ppc64

[Alexander Graf]

The "Mac99" type so far defines a "U2" based configuration. Unfortunately,
there have never been any U2 based PPC64 machines. That's what the U3 was
developed for.

So let's split the Mac99 machine in a PPC64 and a PPC32 machine. The PPC32
machine stays "Mac99", while the PPC64 one becomes "Mac99_U3". All peripherals
stay the same.

Signed-off-by: Alexander Graf <agraf@suse.de>

---

v1 -> v2:

  - s/get_config/decode_config/

v2 -> v3:

  - stick to new naming scheme

v3 -> v4:

  - align to new config space thing
---
 hw/pci_ids.h      |    1 +
 hw/ppc.h          |    1 +
 hw/ppc_mac.h      |    1 +
 hw/ppc_newworld.c |   12 +++++++-
 hw/unin_pci.c     |   70 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 5 files changed, 83 insertions(+), 2 deletions(-)

diff --git a/hw/pci_ids.h b/hw/pci_ids.h
index 63379c2..fe7a121 100644
--- a/hw/pci_ids.h
+++ b/hw/pci_ids.h
@@ -63,6 +63,7 @@
 
 #define PCI_VENDOR_ID_APPLE              0x106b
 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP    0x0020
+#define PCI_DEVICE_ID_APPLE_U3_AGP       0x004b
 
 #define PCI_VENDOR_ID_SUN                0x108e
 #define PCI_DEVICE_ID_SUN_EBUS           0x1000
diff --git a/hw/ppc.h b/hw/ppc.h
index bbf3a98..b9a12a1 100644
--- a/hw/ppc.h
+++ b/hw/ppc.h
@@ -40,6 +40,7 @@ enum {
     ARCH_PREP = 0,
     ARCH_MAC99,
     ARCH_HEATHROW,
+    ARCH_MAC99_U3,
 };
 
 #define FW_CFG_PPC_WIDTH	(FW_CFG_ARCH_LOCAL + 0x00)
diff --git a/hw/ppc_mac.h b/hw/ppc_mac.h
index a04dffe..89f96bb 100644
--- a/hw/ppc_mac.h
+++ b/hw/ppc_mac.h
@@ -58,6 +58,7 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic);
 
 /* UniNorth PCI */
 PCIBus *pci_pmac_init(qemu_irq *pic);
+PCIBus *pci_pmac_u3_init(qemu_irq *pic);
 
 /* Mac NVRAM */
 typedef struct MacIONVRAMState MacIONVRAMState;
diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index a4c714a..308e102 100644
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@@ -114,6 +114,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
     void *fw_cfg;
     void *dbdma;
     uint8_t *vga_bios_ptr;
+    int machine_arch;
 
     linux_boot = (kernel_filename != NULL);
 
@@ -317,7 +318,14 @@ static void ppc_core99_init (ram_addr_t ram_size,
         }
     }
     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
-    pci_bus = pci_pmac_init(pic);
+    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
+        /* 970 gets a U3 bus */
+        pci_bus = pci_pmac_u3_init(pic);
+        machine_arch = ARCH_MAC99_U3;
+    } else {
+        pci_bus = pci_pmac_init(pic);
+        machine_arch = ARCH_MAC99;
+    }
     /* init basic PC hardware */
     pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
 
@@ -364,7 +372,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
-    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
     if (kernel_cmdline) {
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 0fbef1e..324434f 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -159,6 +159,27 @@ static int pci_unin_main_init_device(SysBusDevice *dev)
     return 0;
 }
 
+static int pci_u3_agp_init_device(SysBusDevice *dev)
+{
+    UNINState *s;
+    int pci_mem_config, pci_mem_data;
+
+    /* Uninorth U3 AGP bus */
+    s = FROM_SYSBUS(UNINState, dev);
+
+    pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
+    s->data_handler.read = unin_data_read;
+    s->data_handler.write = unin_data_write;
+    pci_mem_data = cpu_register_io_memory_simple(&s->data_handler);
+    sysbus_init_mmio(dev, 0x1000, pci_mem_config);
+    sysbus_init_mmio(dev, 0x1000, pci_mem_data);
+
+    register_savevm("uninorth", 0, 1, pci_unin_save, pci_unin_load, &s->host_state);
+    qemu_register_reset(pci_unin_reset, &s->host_state);
+
+    return 0;
+}
+
 static int pci_unin_agp_init_device(SysBusDevice *dev)
 {
     UNINState *s;
@@ -240,6 +261,31 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
     return d->host_state.bus;
 }
 
+PCIBus *pci_pmac_u3_init(qemu_irq *pic)
+{
+    DeviceState *dev;
+    SysBusDevice *s;
+    UNINState *d;
+
+    /* Uninorth AGP bus */
+
+    dev = qdev_create(NULL, "u3-agp");
+    qdev_init_nofail(dev);
+    s = sysbus_from_qdev(dev);
+    d = FROM_SYSBUS(UNINState, s);
+
+    d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
+                                         pci_unin_set_irq, pci_unin_map_irq,
+                                         pic, 11 << 3, 4);
+
+    sysbus_mmio_map(s, 0, 0xf0800000);
+    sysbus_mmio_map(s, 1, 0xf0c00000);
+
+    pci_create_simple(d->host_state.bus, 11 << 3, "u3-agp");
+
+    return d->host_state.bus;
+}
+
 static int unin_main_pci_host_init(PCIDevice *d)
 {
     pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
@@ -266,6 +312,21 @@ static int unin_agp_pci_host_init(PCIDevice *d)
     return 0;
 }
 
+static int u3_agp_pci_host_init(PCIDevice *d)
+{
+    pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
+    pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_U3_AGP);
+    /* revision */
+    d->config[0x08] = 0x00;
+    pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
+    /* cache line size */
+    d->config[0x0C] = 0x08;
+    /* latency timer */
+    d->config[0x0D] = 0x10;
+    d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
+    return 0;
+}
+
 static int unin_internal_pci_host_init(PCIDevice *d)
 {
     pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
@@ -285,6 +346,12 @@ static PCIDeviceInfo unin_main_pci_host_info = {
     .init      = unin_main_pci_host_init,
 };
 
+static PCIDeviceInfo u3_agp_pci_host_info = {
+    .qdev.name = "u3-agp",
+    .qdev.size = sizeof(PCIDevice),
+    .init      = u3_agp_pci_host_init,
+};
+
 static PCIDeviceInfo unin_agp_pci_host_info = {
     .qdev.name = "uni-north-agp",
     .qdev.size = sizeof(PCIDevice),
@@ -302,6 +369,9 @@ static void unin_register_devices(void)
     sysbus_register_dev("uni-north", sizeof(UNINState),
                         pci_unin_main_init_device);
     pci_qdev_register(&unin_main_pci_host_info);
+    sysbus_register_dev("u3-agp", sizeof(UNINState),
+                        pci_u3_agp_init_device);
+    pci_qdev_register(&u3_agp_pci_host_info);
     sysbus_register_dev("uni-north-agp", sizeof(UNINState),
                         pci_unin_agp_init_device);
     pci_qdev_register(&unin_agp_pci_host_info);
-- 
1.6.0.2

[Qemu-devel] [PATCH 03/10] PPC: Include dump of lspci -nn on real G5

[Alexander Graf]

To ease debugging and to know what we're lacking, I found it really useful to
have an lspci dump of a real U3 based G5 around. So I added a comment for it.

If people don't think it's important enough to include this information in the
sources, just don't apply this patch.

Signed-off-by: Alexander Graf <agraf@suse.de>

---

v3 -> v4:

  - move to top of ppc_newworld.c
---
 hw/ppc_newworld.c |   24 ++++++++++++++++++++++++
 1 files changed, 24 insertions(+), 0 deletions(-)

diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index 308e102..e66bde4 100644
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@@ -21,6 +21,30 @@
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
+ *
+ * PCI bus layout on a real G5 (U3 based):
+ *
+ * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
+ * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
+ * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
+ * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
+ * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
+ * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
+ * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
+ * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
+ * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
+ * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
+ * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
+ * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
+ * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
+ * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
+ * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
+ * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
+ * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
+ * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
+ * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
+ * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
+ *
  */
 #include "hw.h"
 #include "ppc.h"
-- 
1.6.0.2

[Qemu-devel] [PATCH 04/10] PPC: Make interrupts work

[Alexander Graf]

The interrupt code as is didn't really work for me. I couldn't even convince
Linux to take interrupt 9 in an interrupt-map.

So let's do this right. Let's map all PCI interrupts to 0x1b - 0x1e. That way
we're at least a small step closer to what real hardware does.

I also took the interrupt pin to line conversion from OpenBIOS, which at least
assures us we're compatible with our firmware :-).

A dump of the PCI interrupt-map from a U2 (iBook):

00009000 00000000 00000000 00000000 ff97c528 00000034 00000001
0000d800 00000000 00000000 00000000 ff97c528 0000003f 00000001
0000c000 00000000 00000000 00000000 ff97c528 0000001b 00000001
0000c800 00000000 00000000 00000000 ff97c528 0000001c 00000001
0000d000 00000000 00000000 00000000 ff97c528 0000001d 00000001

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/unin_pci.c |   14 +++++++++++---
 1 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 324434f..86fa5ad 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -36,23 +36,31 @@
 #define UNIN_DPRINTF(fmt, ...)
 #endif
 
+static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e };
+
 typedef struct UNINState {
     SysBusDevice busdev;
     PCIHostState host_state;
     ReadWriteHandler data_handler;
 } UNINState;
 
-/* Don't know if this matches real hardware, but it agrees with OHW.  */
 static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
 {
-    return (irq_num + (pci_dev->devfn >> 3)) & 3;
+    int retval;
+    int devfn = pci_dev->devfn & 0x00FFFFFF;
+ 
+    retval = (((devfn >> 11) & 0x1F) + irq_num) & 3;
+ 
+    return retval;
 }
 
 static void pci_unin_set_irq(void *opaque, int irq_num, int level)
 {
     qemu_irq *pic = opaque;
 
-    qemu_set_irq(pic[irq_num + 8], level);
+    UNIN_DPRINTF("%s: setting INT %d = %d\n", __func__,
+                 unin_irq_line[irq_num], level);
+    qemu_set_irq(pic[unin_irq_line[irq_num]], level);
 }
 
 static void pci_unin_save(QEMUFile* f, void *opaque)
-- 
1.6.0.2

[Qemu-devel] [PATCH 05/10] PPC: tell the guest about the time base frequency

[Alexander Graf]

Our guest systems need to know by how much the timebase increases every second,
so there usually is a "timebase-frequency" property in the cpu leaf of the
device tree.

This property is missing in OpenBIOS.

With qemu, Linux's fallback timebase speed and qemu's internal timebase speed
match up. With KVM, that is no longer true. The guest is running at the same
timebase speed as the host.

This leads to massive timing problems. On my test machine, a "sleep 2" takes
about 14 seconds with KVM enabled.

This patch exports the timebase frequency to OpenBIOS, so it can then put them
into the device tree.

Signed-off-by: Alexander Graf <agraf@suse.de>

---

  v3 -> v4:

    - fix fgets return warning
---
 hw/ppc.h             |    1 +
 hw/ppc_newworld.c    |    9 +++++++++
 hw/ppc_oldworld.c    |    9 +++++++++
 target-ppc/kvm.c     |   48 ++++++++++++++++++++++++++++++++++++++++++++++++
 target-ppc/kvm_ppc.h |    2 ++
 5 files changed, 69 insertions(+), 0 deletions(-)

diff --git a/hw/ppc.h b/hw/ppc.h
index b9a12a1..de13092 100644
--- a/hw/ppc.h
+++ b/hw/ppc.h
@@ -46,5 +46,6 @@ enum {
 #define FW_CFG_PPC_WIDTH	(FW_CFG_ARCH_LOCAL + 0x00)
 #define FW_CFG_PPC_HEIGHT	(FW_CFG_ARCH_LOCAL + 0x01)
 #define FW_CFG_PPC_DEPTH	(FW_CFG_ARCH_LOCAL + 0x02)
+#define FW_CFG_PPC_TBFREQ	(FW_CFG_ARCH_LOCAL + 0x03)
 
 #define PPC_SERIAL_MM_BAUDBASE 399193
diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index e66bde4..49b5e04 100644
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@@ -64,6 +64,7 @@
 #include "loader.h"
 #include "elf.h"
 #include "kvm.h"
+#include "kvm_ppc.h"
 
 #define MAX_IDE_BUS 2
 #define VGA_BIOS_SIZE 65536
@@ -413,6 +414,14 @@ static void ppc_core99_init (ram_addr_t ram_size,
     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 
+    if (kvm_enabled()) {
+#ifdef CONFIG_KVM
+        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
+#endif
+    } else {
+        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
+    }
+
     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 }
 
diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c
index 7ccc6a1..04a7835 100644
--- a/hw/ppc_oldworld.c
+++ b/hw/ppc_oldworld.c
@@ -40,6 +40,7 @@
 #include "loader.h"
 #include "elf.h"
 #include "kvm.h"
+#include "kvm_ppc.h"
 
 #define MAX_IDE_BUS 2
 #define VGA_BIOS_SIZE 65536
@@ -401,6 +402,14 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 
+    if (kvm_enabled()) {
+#ifdef CONFIG_KVM
+        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
+#endif
+    } else {
+        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
+    }
+
     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 }
 
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 0424a78..f889110 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -252,3 +252,51 @@ int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run)
     return ret;
 }
 
+static int read_cpuinfo(const char *field, char *value, int len)
+{
+    FILE *f;
+    int ret = -1;
+    int field_len = strlen(field);
+    char line[512];
+
+    f = fopen("/proc/cpuinfo", "r");
+    if (!f) {
+        return -1;
+    }
+
+    do {
+        if(!fgets(line, sizeof(line), f)) {
+            break;
+        }
+        if (!strncmp(line, field, field_len)) {
+            strncpy(value, line, len);
+            ret = 0;
+            break;
+        }
+    } while(*line);
+
+    fclose(f);
+
+    return ret;
+}
+
+uint32_t kvmppc_get_tbfreq(void)
+{
+    char line[512];
+    char *ns;
+    uint32_t retval = get_ticks_per_sec();
+
+    if (read_cpuinfo("timebase", line, sizeof(line))) {
+        return retval;
+    }
+
+    if (!(ns = strchr(line, ':'))) {
+        return retval;
+    }
+
+    ns++;
+
+    retval = atoi(ns);
+    return retval;
+}
+
diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
index 3792ef7..e8d66e8 100644
--- a/target-ppc/kvm_ppc.h
+++ b/target-ppc/kvm_ppc.h
@@ -14,4 +14,6 @@ void kvmppc_fdt_update(void *fdt);
 int kvmppc_read_host_property(const char *node_path, const char *prop,
                                      void *val, size_t len);
 
+uint32_t kvmppc_get_tbfreq(void);
+
 #endif /* __KVM_PPC_H__ */
-- 
1.6.0.2

[Qemu-devel] [PATCH 06/10] PPC: Use macio IDE controller for Newworld

[Alexander Graf]

Per default Linux doesn't come with a lot of storage adapters enabled on
Mac configurations. The one that's pretty much always present is the pmac-ide,
while the cmd64x is almost never included in any distribution.

So let's switch to use the MacIO based IDE controller. There is corresponding
OpenBIOS code to get interrupts working properly.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/ppc_newworld.c |   16 +++++++++++-----
 1 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index 49b5e04..dafd37c 100644
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@@ -134,6 +134,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
     int nvram_mem_index;
     int vga_bios_size, bios_size;
     int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
+    int ide_mem_index[3];
     int ppc_boot_device;
     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     void *fw_cfg;
@@ -364,11 +365,16 @@ static void ppc_core99_init (ram_addr_t ram_size,
         fprintf(stderr, "qemu: too many IDE bus\n");
         exit(1);
     }
-    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
-        hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
-    }
     dbdma = DBDMA_init(&dbdma_mem_index);
-    pci_cmd646_ide_init(pci_bus, hd, 0);
+
+    /* We only emulate 2 out of 3 IDE controllers for now */
+    ide_mem_index[0] = -1;
+    hd[0] = drive_get(IF_IDE, 0, 0);
+    hd[1] = drive_get(IF_IDE, 0, 1);
+    ide_mem_index[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
+    hd[0] = drive_get(IF_IDE, 1, 0);
+    hd[1] = drive_get(IF_IDE, 1, 1);
+    ide_mem_index[2] = pmac_ide_init(hd, pic[0x0e], dbdma, 0x1a, pic[0x02]);
 
     /* cuda also initialize ADB */
     cuda_init(&cuda_mem_index, pic[0x19]);
@@ -378,7 +384,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
 
 
     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
-               dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
+               dbdma_mem_index, cuda_mem_index, NULL, 3, ide_mem_index,
                escc_mem_index);
 
     if (usb_enabled) {
-- 
1.6.0.2

[Qemu-devel] [PATCH 07/10] PPC: Get rid of segfaults in DBDMA emulation

[Alexander Graf]

While trying to find the right channel number for the DBDMA emulation I
stumbled across segmentation faults that were purely triggered by the guest.

The guest should never have the possiblity to segfault us, so let's check
all indirect function calls on a channel, so the code even works for channels
that have not been reserved.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/mac_dbdma.c |   10 +++++++---
 1 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/hw/mac_dbdma.c b/hw/mac_dbdma.c
index 8ec3d99..8f94c35 100644
--- a/hw/mac_dbdma.c
+++ b/hw/mac_dbdma.c
@@ -402,7 +402,9 @@ static void start_output(DBDMA_channel *ch, int key, uint32_t addr,
     ch->io.dma_end = dbdma_end;
     ch->io.is_dma_out = 1;
     ch->processing = 1;
-    ch->rw(&ch->io);
+    if (ch->rw) {
+        ch->rw(&ch->io);
+    }
 }
 
 static void start_input(DBDMA_channel *ch, int key, uint32_t addr,
@@ -425,7 +427,9 @@ static void start_input(DBDMA_channel *ch, int key, uint32_t addr,
     ch->io.dma_end = dbdma_end;
     ch->io.is_dma_out = 0;
     ch->processing = 1;
-    ch->rw(&ch->io);
+    if (ch->rw) {
+        ch->rw(&ch->io);
+    }
 }
 
 static void load_word(DBDMA_channel *ch, int key, uint32_t addr,
@@ -688,7 +692,7 @@ dbdma_control_write(DBDMA_channel *ch)
 
     if (status & ACTIVE)
         qemu_bh_schedule(dbdma_bh);
-    if (status & FLUSH)
+    if ((status & FLUSH) && ch->flush)
         ch->flush(&ch->io);
 }
 
-- 
1.6.0.2

[Qemu-devel] [PATCH 08/10] PPC: Add USB per default on U3

[Alexander Graf]

Linux with CONFIG_PPC64 doesn't support ADB devices anymore, so we have to
use USB for keyboard and mouse.

This patch enables USB per default on U3 and adds a virtual keyboard and mouse
there.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/ppc_newworld.c |   12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletions(-)

diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index dafd37c..bc86c85 100644
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@@ -65,6 +65,7 @@
 #include "elf.h"
 #include "kvm.h"
 #include "kvm_ppc.h"
+#include "hw/usb.h"
 
 #define MAX_IDE_BUS 2
 #define VGA_BIOS_SIZE 65536
@@ -377,12 +378,14 @@ static void ppc_core99_init (ram_addr_t ram_size,
     ide_mem_index[2] = pmac_ide_init(hd, pic[0x0e], dbdma, 0x1a, pic[0x02]);
 
     /* cuda also initialize ADB */
+    if (machine_arch == ARCH_MAC99_U3) {
+        usb_enabled = 1;
+    }
     cuda_init(&cuda_mem_index, pic[0x19]);
 
     adb_kbd_init(&adb_bus);
     adb_mouse_init(&adb_bus);
 
-
     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
                dbdma_mem_index, cuda_mem_index, NULL, 3, ide_mem_index,
                escc_mem_index);
@@ -391,6 +394,13 @@ static void ppc_core99_init (ram_addr_t ram_size,
         usb_ohci_init_pci(pci_bus, -1);
     }
 
+    /* U3 needs to use USB for input because Linux doesn't support via-cuda
+       on PPC64 */
+    if (machine_arch == ARCH_MAC99_U3) {
+        usbdevice_create("keyboard");
+        usbdevice_create("mouse");
+    }
+
     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
         graphic_depth = 15;
 
-- 
1.6.0.2

[Qemu-devel] [PATCH 09/10] PPC: Fix large pages

[Alexander Graf]

We were masking 1TB SLB entries on the feature bit of 16 MB pages. Obviously
that breaks, so let's just ignore 1TB SLB entries for now and instead do
16MB pages correctly.

This fixes PPC64 Linux boot with -m above 256.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/helper.c |    9 ++++-----
 1 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index a4fae31..cd1c9fe 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -736,14 +736,13 @@ static inline int slb_lookup(CPUPPCState *env, target_ulong eaddr,
                     PRIx32 "\n", __func__, n, slb->tmp64, slb->tmp);
         if (slb_is_valid(slb)) {
             /* SLB entry is valid */
+            mask = 0xFFFFFFFFF0000000ULL;
             if (slb->tmp & 0x8) {
-                /* 1 TB Segment */
-                mask = 0xFFFF000000000000ULL;
+                /* 16 MB PTEs */
                 if (target_page_bits)
-                    *target_page_bits = 24; // XXX 16M pages?
+                    *target_page_bits = 24;
             } else {
-                /* 256MB Segment */
-                mask = 0xFFFFFFFFF0000000ULL;
+                /* 4 KB PTEs */
                 if (target_page_bits)
                     *target_page_bits = TARGET_PAGE_BITS;
             }
-- 
1.6.0.2

[Qemu-devel] [PATCH 10/10] PPC: Add timer when running KVM

[Alexander Graf]

For some odd reason we sometimes hang inside KVM forever. I'd guess it's
a race condition where we actually have a level triggered interrupt, but
the infrastructure can't expose that yet, so the guest ACKs it, goes to
sleep and never gets notified that there's still an interrupt pending.

As a quick workaround, let's just wake up every 500 ms. That way we can
assure that we're always reinjecting interrupts in time.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/kvm.c |   22 ++++++++++++++++++++++
 1 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index f889110..fafa6fb 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -37,6 +37,22 @@
     do { } while (0)
 #endif
 
+/* XXX For some odd reason we sometimes hang inside KVM forever. I'd guess it's
+ *     a race condition where we actually have a level triggered interrupt, but
+ *     the infrastructure can't expose that yet, so the guest ACKs it, goes to
+ *     sleep and never gets notified that there's still an interrupt pending.
+ *
+ *     As a quick workaround, let's just wake up every 500 ms. That way we can
+ *     assure that we're always reinjecting interrupts in time.
+ */
+static QEMUTimer *idle_timer;
+
+static void do_nothing(void *opaque)
+{
+    qemu_mod_timer(idle_timer, qemu_get_clock(vm_clock) +
+                   (get_ticks_per_sec() / 2));
+}
+
 int kvm_arch_init(KVMState *s, int smp_cpus)
 {
     return 0;
@@ -173,6 +189,12 @@ int kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
     int r;
     unsigned irq;
 
+    if (!idle_timer) {
+        idle_timer = qemu_new_timer(vm_clock, do_nothing, NULL);
+        qemu_mod_timer(idle_timer, qemu_get_clock(vm_clock) +
+                       (get_ticks_per_sec() / 2));
+    }
+
     /* PowerPC Qemu tracks the various core input pins (interrupt, critical
      * interrupt, reset, etc) in PPC-specific env->irq_input_state. */
     if (run->ready_for_interrupt_injection &&
-- 
1.6.0.2

[Qemu-devel] Re: [PATCH 00/10] PPC NewWorld fixery v4

[Michael S. Tsirkin]

On Tue, Feb 09, 2010 at 05:37:00PM +0100, Alexander Graf wrote:
> I'm trying to get the PPC64 system emulation target working finally.
> While doing so, I ran into several issues, most related to PCI this time.
> 
> This patchset fixes all the PCI config space access and PCI interrupt
> mapping issues I've found on PPC64. Using this and a patched OpenBIOS
> version, I can successfully access IDE devices and was booting a guest
> into the shell from IDE using serial console.

Trying to apply these I run into:

Applying: PPC: Make interrupts work
/scm/qemu/.git/rebase-apply/patch:27: trailing whitespace.
 
/scm/qemu/.git/rebase-apply/patch:29: trailing whitespace.
 
warning: 2 lines add whitespace errors.
Applying: PPC: tell the guest about the time base frequency
/scm/qemu/.git/rebase-apply/patch:83: new blank line at EOF.
+
warning: 1 line adds whitespace errors.

Could you address these please?

-- 
MST

[Qemu-devel] Re: [PATCH 00/10] PPC NewWorld fixery v4

[Alexander Graf]

Am 09.02.2010 um 18:01 schrieb "Michael S. Tsirkin" <mst@redhat.com>:

> On Tue, Feb 09, 2010 at 05:37:00PM +0100, Alexander Graf wrote:
>> I'm trying to get the PPC64 system emulation target working finally.
>> While doing so, I ran into several issues, most related to PCI this  
>> time.
>>
>> This patchset fixes all the PCI config space access and PCI interrupt
>> mapping issues I've found on PPC64. Using this and a patched OpenBIOS
>> version, I can successfully access IDE devices and was booting a  
>> guest
>> into the shell from IDE using serial console.
>
> Trying to apply these I run into:
>
> Applying: PPC: Make interrupts work
> /scm/qemu/.git/rebase-apply/patch:27: trailing whitespace.
>
> /scm/qemu/.git/rebase-apply/patch:29: trailing whitespace.
>
> warning: 2 lines add whitespace errors.
> Applying: PPC: tell the guest about the time base frequency
> /scm/qemu/.git/rebase-apply/patch:83: new blank line at EOF.
> +
> warning: 1 line adds whitespace errors.
>
> Could you address these please?

git-am should take care of them, no?

Alex
>

[Qemu-devel] Re: [PATCH 00/10] PPC NewWorld fixery v4

[Michael S. Tsirkin]

On Tue, Feb 09, 2010 at 07:26:45PM +0100, Alexander Graf wrote:
>
> Am 09.02.2010 um 18:01 schrieb "Michael S. Tsirkin" <mst@redhat.com>:
>
>> On Tue, Feb 09, 2010 at 05:37:00PM +0100, Alexander Graf wrote:
>>> I'm trying to get the PPC64 system emulation target working finally.
>>> While doing so, I ran into several issues, most related to PCI this  
>>> time.
>>>
>>> This patchset fixes all the PCI config space access and PCI interrupt
>>> mapping issues I've found on PPC64. Using this and a patched OpenBIOS
>>> version, I can successfully access IDE devices and was booting a  
>>> guest
>>> into the shell from IDE using serial console.
>>
>> Trying to apply these I run into:
>>
>> Applying: PPC: Make interrupts work
>> /scm/qemu/.git/rebase-apply/patch:27: trailing whitespace.
>>
>> /scm/qemu/.git/rebase-apply/patch:29: trailing whitespace.
>>
>> warning: 2 lines add whitespace errors.
>> Applying: PPC: tell the guest about the time base frequency
>> /scm/qemu/.git/rebase-apply/patch:83: new blank line at EOF.
>> +
>> warning: 1 line adds whitespace errors.
>>
>> Could you address these please?
>
> git-am should take care of them, no?
>
> Alex

It doesn't fix them, just complains.

[Qemu-devel] Re: [PATCH 00/10] PPC NewWorld fixery v4

[aurelien]

On Tue, Feb 09, 2010 at 10:30:19PM +0200, Michael S. Tsirkin wrote:
> On Tue, Feb 09, 2010 at 07:26:45PM +0100, Alexander Graf wrote:
> >
> > Am 09.02.2010 um 18:01 schrieb "Michael S. Tsirkin" <mst@redhat.com>:
> >
> >> On Tue, Feb 09, 2010 at 05:37:00PM +0100, Alexander Graf wrote:
> >>> I'm trying to get the PPC64 system emulation target working finally.
> >>> While doing so, I ran into several issues, most related to PCI this  
> >>> time.
> >>>
> >>> This patchset fixes all the PCI config space access and PCI interrupt
> >>> mapping issues I've found on PPC64. Using this and a patched OpenBIOS
> >>> version, I can successfully access IDE devices and was booting a  
> >>> guest
> >>> into the shell from IDE using serial console.
> >>
> >> Trying to apply these I run into:
> >>
> >> Applying: PPC: Make interrupts work
> >> /scm/qemu/.git/rebase-apply/patch:27: trailing whitespace.
> >>
> >> /scm/qemu/.git/rebase-apply/patch:29: trailing whitespace.
> >>
> >> warning: 2 lines add whitespace errors.
> >> Applying: PPC: tell the guest about the time base frequency
> >> /scm/qemu/.git/rebase-apply/patch:83: new blank line at EOF.
> >> +
> >> warning: 1 line adds whitespace errors.
> >>
> >> Could you address these please?
> >
> > git-am should take care of them, no?
> >
> > Alex
> 
> It doesn't fix them, just complains.
> 

--whitespace=strip

-- 
Aurelien Jarno	                        GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net

[Qemu-devel] Re: [PATCH 00/10] PPC NewWorld fixery v4

[Michael S. Tsirkin]

On Tue, Feb 09, 2010 at 09:37:18PM +0100, aurelien@aurel32.net wrote:
> On Tue, Feb 09, 2010 at 10:30:19PM +0200, Michael S. Tsirkin wrote:
> > On Tue, Feb 09, 2010 at 07:26:45PM +0100, Alexander Graf wrote:
> > >
> > > Am 09.02.2010 um 18:01 schrieb "Michael S. Tsirkin" <mst@redhat.com>:
> > >
> > >> On Tue, Feb 09, 2010 at 05:37:00PM +0100, Alexander Graf wrote:
> > >>> I'm trying to get the PPC64 system emulation target working finally.
> > >>> While doing so, I ran into several issues, most related to PCI this  
> > >>> time.
> > >>>
> > >>> This patchset fixes all the PCI config space access and PCI interrupt
> > >>> mapping issues I've found on PPC64. Using this and a patched OpenBIOS
> > >>> version, I can successfully access IDE devices and was booting a  
> > >>> guest
> > >>> into the shell from IDE using serial console.
> > >>
> > >> Trying to apply these I run into:
> > >>
> > >> Applying: PPC: Make interrupts work
> > >> /scm/qemu/.git/rebase-apply/patch:27: trailing whitespace.
> > >>
> > >> /scm/qemu/.git/rebase-apply/patch:29: trailing whitespace.
> > >>
> > >> warning: 2 lines add whitespace errors.
> > >> Applying: PPC: tell the guest about the time base frequency
> > >> /scm/qemu/.git/rebase-apply/patch:83: new blank line at EOF.
> > >> +
> > >> warning: 1 line adds whitespace errors.
> > >>
> > >> Could you address these please?
> > >
> > > git-am should take care of them, no?
> > >
> > > Alex
> > 
> > It doesn't fix them, just complains.
> > 
> 
> --whitespace=strip

Ah, ok. Anyway I prefer patch author to fix these up in source, rather
then rely on tools.

-- 
MST

[Qemu-devel] Re: [PATCH 00/10] PPC NewWorld fixery v4

[Alexander Graf]

On 09.02.2010, at 21:39, Michael S. Tsirkin wrote:

> On Tue, Feb 09, 2010 at 09:37:18PM +0100, aurelien@aurel32.net wrote:
>> On Tue, Feb 09, 2010 at 10:30:19PM +0200, Michael S. Tsirkin wrote:
>>> On Tue, Feb 09, 2010 at 07:26:45PM +0100, Alexander Graf wrote:
>>>> 
>>>> Am 09.02.2010 um 18:01 schrieb "Michael S. Tsirkin" <mst@redhat.com>:
>>>> 
>>>>> On Tue, Feb 09, 2010 at 05:37:00PM +0100, Alexander Graf wrote:
>>>>>> I'm trying to get the PPC64 system emulation target working finally.
>>>>>> While doing so, I ran into several issues, most related to PCI this  
>>>>>> time.
>>>>>> 
>>>>>> This patchset fixes all the PCI config space access and PCI interrupt
>>>>>> mapping issues I've found on PPC64. Using this and a patched OpenBIOS
>>>>>> version, I can successfully access IDE devices and was booting a  
>>>>>> guest
>>>>>> into the shell from IDE using serial console.
>>>>> 
>>>>> Trying to apply these I run into:
>>>>> 
>>>>> Applying: PPC: Make interrupts work
>>>>> /scm/qemu/.git/rebase-apply/patch:27: trailing whitespace.
>>>>> 
>>>>> /scm/qemu/.git/rebase-apply/patch:29: trailing whitespace.
>>>>> 
>>>>> warning: 2 lines add whitespace errors.
>>>>> Applying: PPC: tell the guest about the time base frequency
>>>>> /scm/qemu/.git/rebase-apply/patch:83: new blank line at EOF.
>>>>> +
>>>>> warning: 1 line adds whitespace errors.
>>>>> 
>>>>> Could you address these please?
>>>> 
>>>> git-am should take care of them, no?
>>>> 
>>>> Alex
>>> 
>>> It doesn't fix them, just complains.
>>> 
>> 
>> --whitespace=strip
> 
> Ah, ok. Anyway I prefer patch author to fix these up in source, rather
> then rely on tools.

What do we have tools for then? :)

Alex

[Qemu-devel] Re: [PATCH 00/10] PPC NewWorld fixery v4

[Michael S. Tsirkin]

On Tue, Feb 09, 2010 at 10:24:22PM +0100, Alexander Graf wrote:
> 
> On 09.02.2010, at 21:39, Michael S. Tsirkin wrote:
> 
> > On Tue, Feb 09, 2010 at 09:37:18PM +0100, aurelien@aurel32.net wrote:
> >> On Tue, Feb 09, 2010 at 10:30:19PM +0200, Michael S. Tsirkin wrote:
> >>> On Tue, Feb 09, 2010 at 07:26:45PM +0100, Alexander Graf wrote:
> >>>> 
> >>>> Am 09.02.2010 um 18:01 schrieb "Michael S. Tsirkin" <mst@redhat.com>:
> >>>> 
> >>>>> On Tue, Feb 09, 2010 at 05:37:00PM +0100, Alexander Graf wrote:
> >>>>>> I'm trying to get the PPC64 system emulation target working finally.
> >>>>>> While doing so, I ran into several issues, most related to PCI this  
> >>>>>> time.
> >>>>>> 
> >>>>>> This patchset fixes all the PCI config space access and PCI interrupt
> >>>>>> mapping issues I've found on PPC64. Using this and a patched OpenBIOS
> >>>>>> version, I can successfully access IDE devices and was booting a  
> >>>>>> guest
> >>>>>> into the shell from IDE using serial console.
> >>>>> 
> >>>>> Trying to apply these I run into:
> >>>>> 
> >>>>> Applying: PPC: Make interrupts work
> >>>>> /scm/qemu/.git/rebase-apply/patch:27: trailing whitespace.
> >>>>> 
> >>>>> /scm/qemu/.git/rebase-apply/patch:29: trailing whitespace.
> >>>>> 
> >>>>> warning: 2 lines add whitespace errors.
> >>>>> Applying: PPC: tell the guest about the time base frequency
> >>>>> /scm/qemu/.git/rebase-apply/patch:83: new blank line at EOF.
> >>>>> +
> >>>>> warning: 1 line adds whitespace errors.
> >>>>> 
> >>>>> Could you address these please?
> >>>> 
> >>>> git-am should take care of them, no?
> >>>> 
> >>>> Alex
> >>> 
> >>> It doesn't fix them, just complains.
> >>> 
> >> 
> >> --whitespace=strip
> > 
> > Ah, ok. Anyway I prefer patch author to fix these up in source, rather
> > then rely on tools.
> 
> What do we have tools for then? :)
> 
> Alex

OK, I did that for now.
Please fix trivial stuff before post in the future.

-- 
MST

[Qemu-devel] Re: [PATCH 00/10] PPC NewWorld fixery v4

[Michael S. Tsirkin]

On Tue, Feb 09, 2010 at 05:37:00PM +0100, Alexander Graf wrote:
> I'm trying to get the PPC64 system emulation target working finally.
> While doing so, I ran into several issues, most related to PCI this time.
> 
> This patchset fixes all the PCI config space access and PCI interrupt
> mapping issues I've found on PPC64. Using this and a patched OpenBIOS
> version, I can successfully access IDE devices and was booting a guest
> into the shell from IDE using serial console.
> 
> To leverage this patch, you also need a few patches to OpenBIOS. I'll
> present them to the OpenBIOS list, but in general getting patches into
> Qemu is harder than getting them into OpenBIOS. So I want to wait for
> the review process here first.
> 
> Find the OpenBIOS patch at: http://alex.csgraf.de/openbios-ppc-u3.patch
> 
> WARNING: This patchset is based on top of mst's rwhandler patches. You
>          can find those here:
> 
>          git://git.kernel.org/pub/scm/linux/kernel/git/mst/qemu.git
> 

So, I put this whole patchset onto my pci tree.  Not that I intend to
maintain ppc - just to simplify the dependencies for the specific
patchset.  Waiting for ack from people who have more of a clue about
ppc.

> v1 -> v2:
> 
>   - use decoding function for config space bits
>   - merge config space data access functions
>   - introduce encoding function for x86 style encodings
>   - convert Uninorth to use config space decoder
> 
> v2 -> v3:
> 
>   - call pci_addr_to_devfn pci_addr_to_config_reg
>   - split out debug fix
>   - call convert functions config_addr instead of config_reg
>   - no spaces between braces
>   - dropped: Enable secondary cmd64x
>   - new: Tell the guest about the time base frequency
>   - new: Use macio IDE controller for Newworld
>   - new: Get rid of segfaults in DBDMA emulation
>   - new: Add USB per default on U3
> 
> v3 -> v4:
> 
>   - fix fgets warning
>   - use self-contained config space data functions
>   - use mst's rwhandler
>   - move lspci output up
>   - new: Fix large pages
>   - new: Add timer when running KVM
> 
> Alexander Graf (10):
>   PPC: Uninorth config space accessor
>   PPC: Use Mac99_U3 type on ppc64
>   PPC: Include dump of lspci -nn on real G5
>   PPC: Make interrupts work
>   PPC: tell the guest about the time base frequency
>   PPC: Use macio IDE controller for Newworld
>   PPC: Get rid of segfaults in DBDMA emulation
>   PPC: Add USB per default on U3
>   PPC: Fix large pages
>   PPC: Add timer when running KVM
> 
>  hw/mac_dbdma.c       |   10 ++-
>  hw/pci_ids.h         |    1 +
>  hw/ppc.h             |    2 +
>  hw/ppc_mac.h         |    1 +
>  hw/ppc_newworld.c    |   73 +++++++++++++++++++++---
>  hw/ppc_oldworld.c    |    9 +++
>  hw/unin_pci.c        |  151 ++++++++++++++++++++++++++++++++++++++++++++++++-
>  target-ppc/helper.c  |    9 +--
>  target-ppc/kvm.c     |   70 +++++++++++++++++++++++
>  target-ppc/kvm_ppc.h |    2 +
>  10 files changed, 308 insertions(+), 20 deletions(-)