From: Nathan Froyd <froydnj@codesourcery.com>
To: qemu-devel@nongnu.org
Cc: aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH] target-mips: fix CpU exception for coprocessor 0
Date: Sat, 20 Feb 2010 10:19:09 -0800 [thread overview]
Message-ID: <1266689949-13585-1-git-send-email-froydnj@codesourcery.com> (raw)
When we signal a CpU exception for coprocessor 0, we should indicate
that it's for coprocessor 0 instead of coprocessor 1.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
---
target-mips/translate.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index dfea6f6..f3522f5 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -830,7 +830,7 @@ static inline void gen_op_addr_add (DisasContext *ctx, TCGv ret, TCGv arg0, TCGv
static inline void check_cp0_enabled(DisasContext *ctx)
{
if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0)))
- generate_exception_err(ctx, EXCP_CpU, 1);
+ generate_exception_err(ctx, EXCP_CpU, 0);
}
static inline void check_cp1_enabled(DisasContext *ctx)
--
1.6.3.2
next reply other threads:[~2010-02-20 18:19 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-02-20 18:19 Nathan Froyd [this message]
2010-02-23 19:03 ` [Qemu-devel] [PATCH] target-mips: fix CpU exception for coprocessor 0 Aurelien Jarno
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