From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NmDG6-0003ub-Mr for qemu-devel@nongnu.org; Mon, 01 Mar 2010 16:34:34 -0500 Received: from [199.232.76.173] (port=54287 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NmDG6-0003tt-7m for qemu-devel@nongnu.org; Mon, 01 Mar 2010 16:34:34 -0500 Received: from Debian-exim by monty-python.gnu.org with spam-scanned (Exim 4.60) (envelope-from ) id 1NmDG3-0000xz-TT for qemu-devel@nongnu.org; Mon, 01 Mar 2010 16:34:33 -0500 Received: from hall.aurel32.net ([88.191.82.174]:41342) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1NmDG3-0000xh-HB for qemu-devel@nongnu.org; Mon, 01 Mar 2010 16:34:31 -0500 From: Aurelien Jarno Date: Mon, 1 Mar 2010 22:33:48 +0100 Message-Id: <1267479230-1964-3-git-send-email-aurelien@aurel32.net> In-Reply-To: <1267479230-1964-1-git-send-email-aurelien@aurel32.net> References: <1267479230-1964-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH 2/4] tcg/arm: implement setcond List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Andrzej Zaborowski , Aurelien Jarno Signed-off-by: Aurelien Jarno --- tcg/arm/tcg-target.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 7bdfda9..9a76ecb 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -1531,6 +1531,14 @@ static inline void tcg_out_op(TCGContext *s, int opc, args[0], args[2], SHIFT_IMM_LSL(0)); tcg_out_goto_label(s, tcg_cond_to_arm_cond[args[4]], args[5]); break; + case INDEX_op_setcond_i32: + tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, + args[1], args[2], SHIFT_IMM_LSL(0)); + tcg_out_dat_imm(s, tcg_cond_to_arm_cond[args[3]], + ARITH_MOV, args[0], 0, 1); + tcg_out_dat_imm(s, tcg_cond_to_arm_cond[tcg_invert_cond(args[3])], + ARITH_MOV, args[0], 0, 0); + break; case INDEX_op_qemu_ld8u: tcg_out_qemu_ld(s, COND_AL, args, 0); @@ -1629,6 +1637,7 @@ static const TCGTargetOpDef arm_op_defs[] = { { INDEX_op_sar_i32, { "r", "r", "ri" } }, { INDEX_op_brcond_i32, { "r", "r" } }, + { INDEX_op_setcond_i32, { "r", "r", "r" } }, /* TODO: "r", "r", "r", "r", "ri", "ri" */ { INDEX_op_add2_i32, { "r", "r", "r", "r", "r", "r" } }, -- 1.7.0