From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NnxOr-0006AL-NS for qemu-devel@nongnu.org; Sat, 06 Mar 2010 12:02:49 -0500 Received: from [199.232.76.173] (port=44260 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NnxOr-0006AA-1e for qemu-devel@nongnu.org; Sat, 06 Mar 2010 12:02:49 -0500 Received: from Debian-exim by monty-python.gnu.org with spam-scanned (Exim 4.60) (envelope-from ) id 1NnxOp-0003BF-K2 for qemu-devel@nongnu.org; Sat, 06 Mar 2010 12:02:48 -0500 Received: from hall.aurel32.net ([88.191.82.174]:41385) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1NnxOp-0003B4-8k for qemu-devel@nongnu.org; Sat, 06 Mar 2010 12:02:47 -0500 From: Aurelien Jarno Date: Sat, 6 Mar 2010 18:02:31 +0100 Message-Id: <1267894951-12437-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH] target-i386: fix SIB decoding with index = 4 List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Clemens Kolbitsch , Avi Kivity , Aurelien Jarno A SIB byte with an index of 4 means "no scaled index", even if the scale value is not 0. In 64-bit mode, if REX.X is used, an index of 4 selects %r12. This is correctly handled by the computation of the index variable, which includes the index bits, and also the REX.X prefix: index = ((code >> 3) & 7) | REX_X(s); Thanks to Avi Kivity, Jamie Lokier and Malc for the analysis of the problem and the initial patch. Signed-off-by: Aurelien Jarno --- target-i386/translate.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index a597e80..dc6f511 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -2047,8 +2047,8 @@ static void gen_lea_modrm(DisasContext *s, int modrm, int *reg_ptr, int *offset_ gen_op_movl_A0_im(disp); } } - /* XXX: index == 4 is always invalid */ - if (havesib && (index != 4 || scale != 0)) { + /* index == 4 means no index */ + if (havesib && (index != 4)) { #ifdef TARGET_X86_64 if (s->aflag == 2) { gen_op_addq_A0_reg_sN(scale, index); -- 1.7.0