From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Andrzej Zaborowski <balrog@zabor.org>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH 07/18] tcg/arm: sxtb and sxth are available starting with ARMv6
Date: Wed, 7 Apr 2010 19:51:14 +0200 [thread overview]
Message-ID: <1270662685-7379-8-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1270662685-7379-1-git-send-email-aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
tcg/arm/tcg-target.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index cae6385..777c4ac 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -1454,7 +1454,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_ext8s_i32:
-#ifdef USE_ARMV7_INSTRUCTIONS
+#ifdef USE_ARMV6_INSTRUCTIONS
/* sxtb */
tcg_out32(s, 0xe6af0070 | (args[0] << 12) | args[1]);
#else
@@ -1465,7 +1465,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
#endif
break;
case INDEX_op_ext16s_i32:
-#ifdef USE_ARMV7_INSTRUCTIONS
+#ifdef USE_ARMV6_INSTRUCTIONS
/* sxth */
tcg_out32(s, 0xe6bf0070 | (args[0] << 12) | args[1]);
#else
--
1.7.0.4
next prev parent reply other threads:[~2010-04-07 17:52 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-07 17:51 [Qemu-devel] [PATCH 0/18] tcg/arm: cleanup and improvements Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 01/18] tcg/arm: remove SAVE_LR code Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 02/18] tcg/arm: explicitely list clobbered/reserved regs Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 03/18] tcg/arm: remove store signed functions Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 04/18] tcg/arm: replace integer values by registers enum Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 05/18] tcg/arm: align 64-bit arguments in function calls Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 06/18] tcg/arm: add defines for the allowed instructions set Aurelien Jarno
2010-04-08 13:46 ` Paul Brook
2010-04-08 16:46 ` Richard Henderson
2010-04-07 17:51 ` Aurelien Jarno [this message]
2010-04-07 17:51 ` [Qemu-devel] [PATCH 08/18] tcg/arm: use the blx instruction when possible Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 09/18] tcg/arm: add rotation ops Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 10/18] tcg/arm: add ext16u op Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 11/18] tcg/arm: add bswap ops Aurelien Jarno
2010-04-08 23:32 ` Paul Brook
2010-04-09 17:11 ` Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 12/18] tcg/arm: remove conditional argument for qemu_ld/st Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 13/18] tcg/arm: use ext* ops in qemu_ld Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 14/18] tcg/arm: bswap arguments in qemu_ld/st if needed Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 15/18] tcg/arm: remove useless register tests in qemu_ld/st Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 16/18] tcg/arm: fix argument alignment in qemu_st64 Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 17/18] tcg/arm: optimize register allocation order Aurelien Jarno
2010-04-07 17:51 ` [Qemu-devel] [PATCH 18/18] tcg/arm: don't try to load constants using pc Aurelien Jarno
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