[Qemu-devel] [PATCH] tcp/mips: Change TCG_AREG0 (fp -> s0)

[Stefan Weil <weil@mail.berlios.de>]

Register fp is a bad choice for compilations without
optimisation, because the compiler makes heavy use
of this register (so the resulting code crashes).

Register s0 was used for TCG_AREG1 in earlier releases,
but was no longer used and is now free for TCG_AREG0.

The resulting code works for compilations without
optimisation (tested with qemu mips in qemu mips
on x86 host).

Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
---
 dyngen-exec.h         |    2 +-
 tcg/mips/tcg-target.h |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/dyngen-exec.h b/dyngen-exec.h
index b9f6969..85a2616 100644
--- a/dyngen-exec.h
+++ b/dyngen-exec.h
@@ -61,7 +61,7 @@ extern int printf(const char *, ...);
 #elif defined(__hppa__)
 #define AREG0 "r17"
 #elif defined(__mips__)
-#define AREG0 "fp"
+#define AREG0 "s0"
 #elif defined(__sparc__)
 #ifdef CONFIG_SOLARIS
 #define AREG0 "g2"
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index 0292d33..0028bfa 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -97,7 +97,7 @@ enum {
 #undef TCG_TARGET_HAS_ext16u_i32   /* andi rt, rs, 0xffff */
 
 /* Note: must be synced with dyngen-exec.h */
-#define TCG_AREG0 TCG_REG_FP
+#define TCG_AREG0 TCG_REG_S0
 
 /* guest base is supported */
 #define TCG_TARGET_HAS_GUEST_BASE
-- 
1.5.6.5