From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Nzrx7-0005vX-ED for qemu-devel@nongnu.org; Thu, 08 Apr 2010 09:39:25 -0400 Received: from [140.186.70.92] (port=46071 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Nzrx1-0005uk-GT for qemu-devel@nongnu.org; Thu, 08 Apr 2010 09:39:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Nzrwz-0006Fr-Mh for qemu-devel@nongnu.org; Thu, 08 Apr 2010 09:39:19 -0400 Received: from moutng.kundenserver.de ([212.227.126.171]:56887) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Nzrwz-0006Ey-B0 for qemu-devel@nongnu.org; Thu, 08 Apr 2010 09:39:17 -0400 From: Stefan Weil Date: Thu, 8 Apr 2010 15:38:52 +0200 Message-Id: <1270733932-7906-1-git-send-email-weil@mail.berlios.de> Subject: [Qemu-devel] [PATCH] tcp/mips: Change TCG_AREG0 (fp -> s0) List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: QEMU Developers Cc: Aurelien Jarno Register fp is a bad choice for compilations without optimisation, because the compiler makes heavy use of this register (so the resulting code crashes). Register s0 was used for TCG_AREG1 in earlier releases, but was no longer used and is now free for TCG_AREG0. The resulting code works for compilations without optimisation (tested with qemu mips in qemu mips on x86 host). Cc: Aurelien Jarno Signed-off-by: Stefan Weil --- dyngen-exec.h | 2 +- tcg/mips/tcg-target.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/dyngen-exec.h b/dyngen-exec.h index b9f6969..85a2616 100644 --- a/dyngen-exec.h +++ b/dyngen-exec.h @@ -61,7 +61,7 @@ extern int printf(const char *, ...); #elif defined(__hppa__) #define AREG0 "r17" #elif defined(__mips__) -#define AREG0 "fp" +#define AREG0 "s0" #elif defined(__sparc__) #ifdef CONFIG_SOLARIS #define AREG0 "g2" diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 0292d33..0028bfa 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -97,7 +97,7 @@ enum { #undef TCG_TARGET_HAS_ext16u_i32 /* andi rt, rs, 0xffff */ /* Note: must be synced with dyngen-exec.h */ -#define TCG_AREG0 TCG_REG_FP +#define TCG_AREG0 TCG_REG_S0 /* guest base is supported */ #define TCG_TARGET_HAS_GUEST_BASE -- 1.5.6.5