From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1OAlFa-0001wX-6r for qemu-devel@nongnu.org; Sat, 08 May 2010 10:43:30 -0400 Received: from [140.186.70.92] (port=35839 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OAlFX-0001uw-AP for qemu-devel@nongnu.org; Sat, 08 May 2010 10:43:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OAlFV-0005K8-VG for qemu-devel@nongnu.org; Sat, 08 May 2010 10:43:27 -0400 Received: from mail-ew0-f227.google.com ([209.85.219.227]:52826) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OAlFV-0005K1-QD for qemu-devel@nongnu.org; Sat, 08 May 2010 10:43:25 -0400 Received: by ewy27 with SMTP id 27so482783ewy.10 for ; Sat, 08 May 2010 07:43:24 -0700 (PDT) From: Lars Munch Date: Sat, 8 May 2010 22:42:43 +0200 Message-Id: <1273351363-9864-1-git-send-email-lars@segv.dk> Subject: [Qemu-devel] [PATCH] arm: prevent coprocessor IO reset List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Lars Munch This prevent coprocessor IO structure from being reset on cpu reset. This was a problem for PXA which uses coprocessor 6 and 14. Signed-off-by: Lars Munch --- target-arm/cpu.h | 14 +++++++------- 1 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 1e34541..f3d138d 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -148,13 +148,6 @@ typedef struct CPUARMState { int pending_exception; } v7m; - /* Coprocessor IO used by peripherals */ - struct { - ARMReadCPFunc *cp_read; - ARMWriteCPFunc *cp_write; - void *opaque; - } cp[15]; - /* Thumb-2 EE state. */ uint32_t teecr; uint32_t teehbr; @@ -204,6 +197,13 @@ typedef struct CPUARMState { CPU_COMMON /* These fields after the common ones so they are preserved on reset. */ + + /* Coprocessor IO used by peripherals */ + struct { + ARMReadCPFunc *cp_read; + ARMWriteCPFunc *cp_write; + void *opaque; + } cp[15]; void *nvic; struct arm_boot_info *boot_info; } CPUARMState; -- 1.7.1