From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=44816 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OF772-00013u-2X for qemu-devel@nongnu.org; Thu, 20 May 2010 10:53:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OF76v-00080s-Bh for qemu-devel@nongnu.org; Thu, 20 May 2010 10:52:39 -0400 Received: from mail.codesourcery.com ([38.113.113.100]:35476) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OF76u-00080F-VY for qemu-devel@nongnu.org; Thu, 20 May 2010 10:52:33 -0400 From: Nathan Froyd Date: Thu, 20 May 2010 07:52:20 -0700 Message-Id: <1274367150-26576-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 00/10] target-mips: add microMIPS ASE support List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aurelien@aurel32.net This patch series adds support for the microMIPS ASE. microMIPS is a new ASE similar to MIPS16, but re-encodes the entire instruction set into 16-bit and 32-bit instructions--in contrast to MIPS16, which re-encodes only integer instructions. The mechanisms for going in and out of microMIPS mode are identical to those for MIPS16; a given chip cannot support both ASEs simultaneously. The first half of the series consists of small refactorings to make it easier to delegate microMIPS instruction decoding to the usual gen_* functions. The second half adds support for microMIPS in all the necessary places. The patch has been tested extensively in our QEMU tree; this patch has been tested against our compilers (GNU/Linux emulation), which include microMIPS support. We have obtained identical test results for MIPS32 and microMIPS testing. (The microMIPS patch for binutils has been posted upstream; the microMIPS patch for GCC is forthcoming.) It is possible to boot kernels compiled for microMIPS, but we have been unsuccessful in consistently being able to do so, and have not yet tracked down the root issue(s). Nathan Froyd (10): target-mips: break out [ls][wd]c1 and rdhwr insn generation target-mips: add microMIPS-specific bits to mips-defs.h target-mips: add enum constants for various invocations of FOP target-mips: refactor {c,abs}.cond.fmt insns target-mips: small changes to use new FMT_ enums target-mips: add microMIPS ASE support target-mips: add microMIPS CPUs target-mips: add microMIPS exception handler support linux-user: honor low bit of entry PC for MIPS hw: honor low bit in mipssim machine hw/mips_mipssim.c | 4 +- linux-user/main.c | 4 +- target-mips/cpu.h | 3 + target-mips/helper.c | 21 +- target-mips/helper.h | 9 + target-mips/mips-defs.h | 1 + target-mips/op_helper.c | 136 ++ target-mips/translate.c | 3050 ++++++++++++++++++++++++++++++++++++++---- target-mips/translate_init.c | 61 + 9 files changed, 3047 insertions(+), 242 deletions(-)