* [Qemu-devel] [PATCH 1/5] tcg-i386: Tidy data16 prefixes.
2010-05-21 16:02 [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code Richard Henderson
@ 2010-05-21 16:03 ` Richard Henderson
2010-05-21 16:03 ` [Qemu-devel] [PATCH 2/5] tcg-i386: Split out TLB Hit path from qemu_ld/st Richard Henderson
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Richard Henderson @ 2010-05-21 16:03 UTC (permalink / raw)
To: qemu-devel; +Cc: aurelien
Include it in the opcode as an extension, as with P_EXT
or the REX bits in the x86-64 port.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/i386/tcg-target.c | 28 ++++++++++++++++++----------
1 files changed, 18 insertions(+), 10 deletions(-)
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index 396a2f1..9226c1e 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -156,7 +156,8 @@ static inline int tcg_target_const_match(tcg_target_long val,
return 0;
}
-#define P_EXT 0x100 /* 0x0f opcode prefix */
+#define P_EXT 0x100 /* 0x0f opcode prefix */
+#define P_DATA16 0x200 /* 0x66 opcode prefix */
#define OPC_ARITH_EvIz (0x81)
#define OPC_ARITH_EvIb (0x83)
@@ -262,8 +263,12 @@ static const uint8_t tcg_cond_to_jcc[10] = {
static inline void tcg_out_opc(TCGContext *s, int opc)
{
- if (opc & P_EXT)
+ if (opc & P_DATA16) {
+ tcg_out8(s, 0x66);
+ }
+ if (opc & P_EXT) {
tcg_out8(s, 0x0f);
+ }
tcg_out8(s, opc);
}
@@ -396,10 +401,14 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
static void tcg_out_shifti(TCGContext *s, int subopc, int reg, int count)
{
+ /* Propagate an opcode prefix, such as P_DATA16. */
+ int ext = subopc & ~0x7;
+ subopc &= 0x7;
+
if (count == 1) {
- tcg_out_modrm(s, OPC_SHIFT_1, subopc, reg);
+ tcg_out_modrm(s, OPC_SHIFT_1 | ext, subopc, reg);
} else {
- tcg_out_modrm(s, OPC_SHIFT_Ib, subopc, reg);
+ tcg_out_modrm(s, OPC_SHIFT_Ib | ext, subopc, reg);
tcg_out8(s, count);
}
}
@@ -411,8 +420,7 @@ static inline void tcg_out_bswap32(TCGContext *s, int reg)
static inline void tcg_out_rolw_8(TCGContext *s, int reg)
{
- tcg_out8(s, 0x66);
- tcg_out_shifti(s, SHIFT_ROL, reg, 8);
+ tcg_out_shifti(s, SHIFT_ROL | P_DATA16, reg, 8);
}
static inline void tcg_out_ext8u(TCGContext *s, int dest, int src)
@@ -1053,8 +1061,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
data_reg = r1;
}
/* movw */
- tcg_out8(s, 0x66);
- tcg_out_modrm_offset(s, OPC_MOVL_EvGv, data_reg, r0, GUEST_BASE);
+ tcg_out_modrm_offset(s, OPC_MOVL_EvGv | P_DATA16,
+ data_reg, r0, GUEST_BASE);
break;
case 2:
if (bswap) {
@@ -1159,8 +1167,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_st16_i32:
/* movw */
- tcg_out8(s, 0x66);
- tcg_out_modrm_offset(s, OPC_MOVL_EvGv, args[0], args[1], args[2]);
+ tcg_out_modrm_offset(s, OPC_MOVL_EvGv | P_DATA16,
+ args[0], args[1], args[2]);
break;
case INDEX_op_st_i32:
tcg_out_st(s, TCG_TYPE_I32, args[0], args[1], args[2]);
--
1.7.0.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [Qemu-devel] [PATCH 2/5] tcg-i386: Split out TLB Hit path from qemu_ld/st.
2010-05-21 16:02 [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code Richard Henderson
2010-05-21 16:03 ` [Qemu-devel] [PATCH 1/5] tcg-i386: Tidy data16 prefixes Richard Henderson
@ 2010-05-21 16:03 ` Richard Henderson
2010-05-21 16:03 ` [Qemu-devel] [PATCH 3/5] tcg-i386: Swap order of TLB hit and miss paths Richard Henderson
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Richard Henderson @ 2010-05-21 16:03 UTC (permalink / raw)
To: qemu-devel; +Cc: aurelien
Splitting out these functions will allow further cleanups.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/i386/tcg-target.c | 197 +++++++++++++++++++++++++------------------------
1 files changed, 102 insertions(+), 95 deletions(-)
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index 9226c1e..30c933c 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -704,9 +704,66 @@ static void *qemu_st_helpers[4] = {
};
#endif
-#ifndef CONFIG_USER_ONLY
-#define GUEST_BASE 0
+static void tcg_out_qemu_ld_direct(TCGContext *s, int datalo, int datahi,
+ int base, tcg_target_long ofs, int sizeop)
+{
+#ifdef TARGET_WORDS_BIGENDIAN
+ const int bswap = 1;
+#else
+ const int bswap = 0;
#endif
+ switch (sizeop) {
+ case 0:
+ /* movzbl */
+ tcg_out_modrm_offset(s, OPC_MOVZBL, datalo, base, ofs);
+ break;
+ case 0 | 4:
+ /* movsbl */
+ tcg_out_modrm_offset(s, OPC_MOVSBL, datalo, base, ofs);
+ break;
+ case 1:
+ /* movzwl */
+ tcg_out_modrm_offset(s, OPC_MOVZWL, datalo, base, ofs);
+ if (bswap) {
+ tcg_out_rolw_8(s, datalo);
+ }
+ break;
+ case 1 | 4:
+ /* movswl */
+ tcg_out_modrm_offset(s, OPC_MOVSWL, datalo, base, ofs);
+ if (bswap) {
+ tcg_out_rolw_8(s, datalo);
+ tcg_out_modrm(s, OPC_MOVSWL, datalo, datalo);
+ }
+ break;
+ case 2:
+ tcg_out_ld(s, TCG_TYPE_I32, datalo, base, ofs);
+ if (bswap) {
+ tcg_out_bswap32(s, datalo);
+ }
+ break;
+ case 3:
+ if (bswap) {
+ int t = datalo;
+ datalo = datahi;
+ datahi = t;
+ }
+ if (base != datalo) {
+ tcg_out_ld(s, TCG_TYPE_I32, datalo, base, ofs);
+ tcg_out_ld(s, TCG_TYPE_I32, datahi, base, ofs + 4);
+ } else {
+ tcg_out_ld(s, TCG_TYPE_I32, datahi, base, ofs + 4);
+ tcg_out_ld(s, TCG_TYPE_I32, datalo, base, ofs);
+ }
+ if (bswap) {
+ tcg_out_bswap32(s, datalo);
+ tcg_out_bswap32(s, datahi);
+ }
+ break;
+ default:
+ tcg_abort();
+ }
+}
/* XXX: qemu_ld and qemu_st could be modified to clobber only EDX and
EAX. It will be useful once fixed registers globals are less
@@ -714,7 +771,7 @@ static void *qemu_st_helpers[4] = {
static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
int opc)
{
- int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
+ int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits;
#if defined(CONFIG_SOFTMMU)
uint8_t *label1_ptr, *label2_ptr;
#endif
@@ -831,80 +888,74 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1,
offsetof(CPUTLBEntry, addend) -
offsetof(CPUTLBEntry, addr_read));
+
+ tcg_out_qemu_ld_direct(s, data_reg, data_reg2, r0, 0, opc);
+
+ /* label2: */
+ *label2_ptr = s->code_ptr - label2_ptr - 1;
#else
- r0 = addr_reg;
+ tcg_out_qemu_ld_direct(s, data_reg, data_reg2, addr_reg, GUEST_BASE, opc);
#endif
+}
+static void tcg_out_qemu_st_direct(TCGContext *s, int datalo, int datahi,
+ int base, tcg_target_long ofs, int sizeop)
+{
#ifdef TARGET_WORDS_BIGENDIAN
- bswap = 1;
+ const int bswap = 1;
#else
- bswap = 0;
+ const int bswap = 0;
#endif
- switch(opc) {
+ /* ??? Ideally we wouldn't need a scratch register. For user-only,
+ we could perform the bswap twice to restore the original value
+ instead of moving to the scratch. But as it is, the L constraint
+ means that EDX is definitely free here. */
+ int scratch = TCG_REG_EDX;
+
+ switch (sizeop) {
case 0:
- /* movzbl */
- tcg_out_modrm_offset(s, OPC_MOVZBL, data_reg, r0, GUEST_BASE);
- break;
- case 0 | 4:
- /* movsbl */
- tcg_out_modrm_offset(s, OPC_MOVSBL, data_reg, r0, GUEST_BASE);
+ tcg_out_modrm_offset(s, OPC_MOVB_EvGv, datalo, base, ofs);
break;
case 1:
- /* movzwl */
- tcg_out_modrm_offset(s, OPC_MOVZWL, data_reg, r0, GUEST_BASE);
- if (bswap) {
- tcg_out_rolw_8(s, data_reg);
- }
- break;
- case 1 | 4:
- /* movswl */
- tcg_out_modrm_offset(s, OPC_MOVSWL, data_reg, r0, GUEST_BASE);
if (bswap) {
- tcg_out_rolw_8(s, data_reg);
-
- /* movswl data_reg, data_reg */
- tcg_out_modrm(s, OPC_MOVSWL, data_reg, data_reg);
+ tcg_out_mov(s, scratch, datalo);
+ tcg_out_rolw_8(s, scratch);
+ datalo = scratch;
}
+ /* movw */
+ tcg_out_modrm_offset(s, OPC_MOVL_EvGv | P_DATA16,
+ datalo, base, ofs);
break;
case 2:
- tcg_out_ld(s, TCG_TYPE_I32, data_reg, r0, GUEST_BASE);
if (bswap) {
- tcg_out_bswap32(s, data_reg);
+ tcg_out_mov(s, scratch, datalo);
+ tcg_out_bswap32(s, scratch);
+ datalo = scratch;
}
+ tcg_out_st(s, TCG_TYPE_I32, datalo, base, ofs);
break;
case 3:
if (bswap) {
- int t = data_reg;
- data_reg = data_reg2;
- data_reg2 = t;
- }
- if (r0 != data_reg) {
- tcg_out_ld(s, TCG_TYPE_I32, data_reg, r0, GUEST_BASE);
- tcg_out_ld(s, TCG_TYPE_I32, data_reg2, r0, GUEST_BASE + 4);
+ tcg_out_mov(s, scratch, datahi);
+ tcg_out_bswap32(s, scratch);
+ tcg_out_st(s, TCG_TYPE_I32, scratch, base, ofs);
+ tcg_out_mov(s, scratch, datalo);
+ tcg_out_bswap32(s, scratch);
+ tcg_out_st(s, TCG_TYPE_I32, scratch, base, ofs + 4);
} else {
- tcg_out_ld(s, TCG_TYPE_I32, data_reg2, r0, GUEST_BASE + 4);
- tcg_out_ld(s, TCG_TYPE_I32, data_reg, r0, GUEST_BASE);
- }
- if (bswap) {
- tcg_out_bswap32(s, data_reg);
- tcg_out_bswap32(s, data_reg2);
+ tcg_out_st(s, TCG_TYPE_I32, datalo, base, ofs);
+ tcg_out_st(s, TCG_TYPE_I32, datahi, base, ofs + 4);
}
break;
default:
tcg_abort();
}
-
-#if defined(CONFIG_SOFTMMU)
- /* label2: */
- *label2_ptr = s->code_ptr - label2_ptr - 1;
-#endif
}
-
static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
int opc)
{
- int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
+ int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits;
#if defined(CONFIG_SOFTMMU)
int stack_adjust;
uint8_t *label1_ptr, *label2_ptr;
@@ -1041,57 +1092,13 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1,
offsetof(CPUTLBEntry, addend) -
offsetof(CPUTLBEntry, addr_write));
-#else
- r0 = addr_reg;
-#endif
-#ifdef TARGET_WORDS_BIGENDIAN
- bswap = 1;
-#else
- bswap = 0;
-#endif
- switch(opc) {
- case 0:
- tcg_out_modrm_offset(s, OPC_MOVB_EvGv, data_reg, r0, GUEST_BASE);
- break;
- case 1:
- if (bswap) {
- tcg_out_mov(s, r1, data_reg);
- tcg_out_rolw_8(s, r1);
- data_reg = r1;
- }
- /* movw */
- tcg_out_modrm_offset(s, OPC_MOVL_EvGv | P_DATA16,
- data_reg, r0, GUEST_BASE);
- break;
- case 2:
- if (bswap) {
- tcg_out_mov(s, r1, data_reg);
- tcg_out_bswap32(s, r1);
- data_reg = r1;
- }
- tcg_out_st(s, TCG_TYPE_I32, data_reg, r0, GUEST_BASE);
- break;
- case 3:
- if (bswap) {
- tcg_out_mov(s, r1, data_reg2);
- tcg_out_bswap32(s, r1);
- tcg_out_st(s, TCG_TYPE_I32, r1, r0, GUEST_BASE);
- tcg_out_mov(s, r1, data_reg);
- tcg_out_bswap32(s, r1);
- tcg_out_st(s, TCG_TYPE_I32, r1, r0, GUEST_BASE + 4);
- } else {
- tcg_out_st(s, TCG_TYPE_I32, data_reg, r0, GUEST_BASE);
- tcg_out_st(s, TCG_TYPE_I32, data_reg2, r0, GUEST_BASE + 4);
- }
- break;
- default:
- tcg_abort();
- }
+ tcg_out_qemu_st_direct(s, data_reg, data_reg2, r0, 0, opc);
-#if defined(CONFIG_SOFTMMU)
/* label2: */
*label2_ptr = s->code_ptr - label2_ptr - 1;
+#else
+ tcg_out_qemu_st_direct(s, data_reg, data_reg2, addr_reg, GUEST_BASE, opc);
#endif
}
--
1.7.0.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [Qemu-devel] [PATCH 3/5] tcg-i386: Swap order of TLB hit and miss paths.
2010-05-21 16:02 [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code Richard Henderson
2010-05-21 16:03 ` [Qemu-devel] [PATCH 1/5] tcg-i386: Tidy data16 prefixes Richard Henderson
2010-05-21 16:03 ` [Qemu-devel] [PATCH 2/5] tcg-i386: Split out TLB Hit path from qemu_ld/st Richard Henderson
@ 2010-05-21 16:03 ` Richard Henderson
2010-05-21 16:03 ` [Qemu-devel] [PATCH 4/5] tcg-i386: Split out tlb load function Richard Henderson
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Richard Henderson @ 2010-05-21 16:03 UTC (permalink / raw)
To: qemu-devel; +Cc: aurelien
Make fallthru be TLB hit and branch be TLB miss. Doing this
both improves branch prediction and will allow further cleanup.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/i386/tcg-target.c | 172 +++++++++++++++++++++++--------------------------
1 files changed, 80 insertions(+), 92 deletions(-)
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index 30c933c..0d85ec0 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -771,26 +771,21 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, int datalo, int datahi,
static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
int opc)
{
- int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits;
+ int addr_reg, addr_reg2 = 0;
+ int data_reg, data_reg2 = 0;
+ int r0, r1, mem_index, s_bits;
#if defined(CONFIG_SOFTMMU)
- uint8_t *label1_ptr, *label2_ptr;
-#endif
-#if TARGET_LONG_BITS == 64
-#if defined(CONFIG_SOFTMMU)
- uint8_t *label3_ptr;
-#endif
- int addr_reg2;
+ uint8_t *label_ptr[3];
#endif
data_reg = *args++;
- if (opc == 3)
+ if (opc == 3) {
data_reg2 = *args++;
- else
- data_reg2 = 0;
+ }
addr_reg = *args++;
-#if TARGET_LONG_BITS == 64
- addr_reg2 = *args++;
-#endif
+ if (TARGET_LONG_BITS == 64) {
+ addr_reg2 = *args++;
+ }
mem_index = *args;
s_bits = opc & 3;
@@ -815,28 +810,42 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
tcg_out_mov(s, r0, addr_reg);
-#if TARGET_LONG_BITS == 32
- /* je label1 */
- tcg_out8(s, OPC_JCC_short + JCC_JE);
- label1_ptr = s->code_ptr;
- s->code_ptr++;
-#else
- /* jne label3 */
+ /* jne label1 */
tcg_out8(s, OPC_JCC_short + JCC_JNE);
- label3_ptr = s->code_ptr;
+ label_ptr[0] = s->code_ptr;
s->code_ptr++;
- /* cmp 4(r1), addr_reg2 */
- tcg_out_modrm_offset(s, OPC_CMP_GvEv, addr_reg2, r1, 4);
+ if (TARGET_LONG_BITS == 64) {
+ /* cmp 4(r1), addr_reg2 */
+ tcg_out_modrm_offset(s, OPC_CMP_GvEv, addr_reg2, r1, 4);
+
+ /* jne label1 */
+ tcg_out8(s, OPC_JCC_short + JCC_JNE);
+ label_ptr[1] = s->code_ptr;
+ s->code_ptr++;
+ }
+
+ /* TLB Hit. */
+
+ /* add x(r1), r0 */
+ tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1,
+ offsetof(CPUTLBEntry, addend) -
+ offsetof(CPUTLBEntry, addr_read));
+
+ tcg_out_qemu_ld_direct(s, data_reg, data_reg2, r0, 0, opc);
- /* je label1 */
- tcg_out8(s, OPC_JCC_short + JCC_JE);
- label1_ptr = s->code_ptr;
+ /* jmp label2 */
+ tcg_out8(s, OPC_JMP_short);
+ label_ptr[2] = s->code_ptr;
s->code_ptr++;
- /* label3: */
- *label3_ptr = s->code_ptr - label3_ptr - 1;
-#endif
+ /* TLB Miss. */
+
+ /* label1: */
+ *label_ptr[0] = s->code_ptr - label_ptr[0] - 1;
+ if (TARGET_LONG_BITS == 64) {
+ *label_ptr[1] = s->code_ptr - label_ptr[1] - 1;
+ }
/* XXX: move that code at the end of the TB */
#if TARGET_LONG_BITS == 32
@@ -876,23 +885,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
break;
}
- /* jmp label2 */
- tcg_out8(s, OPC_JMP_short);
- label2_ptr = s->code_ptr;
- s->code_ptr++;
-
- /* label1: */
- *label1_ptr = s->code_ptr - label1_ptr - 1;
-
- /* add x(r1), r0 */
- tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1,
- offsetof(CPUTLBEntry, addend) -
- offsetof(CPUTLBEntry, addr_read));
-
- tcg_out_qemu_ld_direct(s, data_reg, data_reg2, r0, 0, opc);
-
/* label2: */
- *label2_ptr = s->code_ptr - label2_ptr - 1;
+ *label_ptr[2] = s->code_ptr - label_ptr[2] - 1;
#else
tcg_out_qemu_ld_direct(s, data_reg, data_reg2, addr_reg, GUEST_BASE, opc);
#endif
@@ -955,27 +949,22 @@ static void tcg_out_qemu_st_direct(TCGContext *s, int datalo, int datahi,
static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
int opc)
{
- int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits;
+ int addr_reg, addr_reg2 = 0;
+ int data_reg, data_reg2 = 0;
+ int r0, r1, mem_index, s_bits;
#if defined(CONFIG_SOFTMMU)
int stack_adjust;
- uint8_t *label1_ptr, *label2_ptr;
-#endif
-#if TARGET_LONG_BITS == 64
-#if defined(CONFIG_SOFTMMU)
- uint8_t *label3_ptr;
-#endif
- int addr_reg2;
+ uint8_t *label_ptr[3];
#endif
data_reg = *args++;
- if (opc == 3)
+ if (opc == 3) {
data_reg2 = *args++;
- else
- data_reg2 = 0;
+ }
addr_reg = *args++;
-#if TARGET_LONG_BITS == 64
- addr_reg2 = *args++;
-#endif
+ if (TARGET_LONG_BITS == 64) {
+ addr_reg2 = *args++;
+ }
mem_index = *args;
s_bits = opc;
@@ -1001,28 +990,42 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
tcg_out_mov(s, r0, addr_reg);
-#if TARGET_LONG_BITS == 32
- /* je label1 */
- tcg_out8(s, OPC_JCC_short + JCC_JE);
- label1_ptr = s->code_ptr;
- s->code_ptr++;
-#else
- /* jne label3 */
+ /* jne label1 */
tcg_out8(s, OPC_JCC_short + JCC_JNE);
- label3_ptr = s->code_ptr;
+ label_ptr[0] = s->code_ptr;
s->code_ptr++;
- /* cmp 4(r1), addr_reg2 */
- tcg_out_modrm_offset(s, OPC_CMP_GvEv, addr_reg2, r1, 4);
+ if (TARGET_LONG_BITS == 64) {
+ /* cmp 4(r1), addr_reg2 */
+ tcg_out_modrm_offset(s, OPC_CMP_GvEv, addr_reg2, r1, 4);
+
+ /* jne label1 */
+ tcg_out8(s, OPC_JCC_short + JCC_JNE);
+ label_ptr[1] = s->code_ptr;
+ s->code_ptr++;
+ }
+
+ /* TLB Hit. */
+
+ /* add x(r1), r0 */
+ tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1,
+ offsetof(CPUTLBEntry, addend) -
+ offsetof(CPUTLBEntry, addr_write));
+
+ tcg_out_qemu_st_direct(s, data_reg, data_reg2, r0, 0, opc);
- /* je label1 */
- tcg_out8(s, OPC_JCC_short + JCC_JE);
- label1_ptr = s->code_ptr;
+ /* jmp label2 */
+ tcg_out8(s, OPC_JMP_short);
+ label_ptr[2] = s->code_ptr;
s->code_ptr++;
- /* label3: */
- *label3_ptr = s->code_ptr - label3_ptr - 1;
-#endif
+ /* TLB Miss. */
+
+ /* label1: */
+ *label_ptr[0] = s->code_ptr - label_ptr[0] - 1;
+ if (TARGET_LONG_BITS == 64) {
+ *label_ptr[1] = s->code_ptr - label_ptr[1] - 1;
+ }
/* XXX: move that code at the end of the TB */
#if TARGET_LONG_BITS == 32
@@ -1080,23 +1083,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
tcg_out_addi(s, TCG_REG_ESP, stack_adjust);
}
- /* jmp label2 */
- tcg_out8(s, OPC_JMP_short);
- label2_ptr = s->code_ptr;
- s->code_ptr++;
-
- /* label1: */
- *label1_ptr = s->code_ptr - label1_ptr - 1;
-
- /* add x(r1), r0 */
- tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1,
- offsetof(CPUTLBEntry, addend) -
- offsetof(CPUTLBEntry, addr_write));
-
- tcg_out_qemu_st_direct(s, data_reg, data_reg2, r0, 0, opc);
-
/* label2: */
- *label2_ptr = s->code_ptr - label2_ptr - 1;
+ *label_ptr[2] = s->code_ptr - label_ptr[2] - 1;
#else
tcg_out_qemu_st_direct(s, data_reg, data_reg2, addr_reg, GUEST_BASE, opc);
#endif
--
1.7.0.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [Qemu-devel] [PATCH 4/5] tcg-i386: Split out tlb load function.
2010-05-21 16:02 [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code Richard Henderson
` (2 preceding siblings ...)
2010-05-21 16:03 ` [Qemu-devel] [PATCH 3/5] tcg-i386: Swap order of TLB hit and miss paths Richard Henderson
@ 2010-05-21 16:03 ` Richard Henderson
2010-05-21 16:03 ` [Qemu-devel] [PATCH 5/5] tcg-i386: Remove some ifdefs in qemu_ld/st Richard Henderson
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Richard Henderson @ 2010-05-21 16:03 UTC (permalink / raw)
To: qemu-devel; +Cc: aurelien
Share some code between qemu_ld and qemu_st.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/i386/tcg-target.c | 203 +++++++++++++++++++++++-------------------------
1 files changed, 97 insertions(+), 106 deletions(-)
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index 0d85ec0..cf621da 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -702,6 +702,74 @@ static void *qemu_st_helpers[4] = {
__stl_mmu,
__stq_mmu,
};
+
+/* Perform the TLB load and compare.
+
+ Inputs:
+ ADDRLO_IDX contains the index into ARGS of the low part of the
+ address; the high part of the address is at ADDR_LOW_IDX+1.
+
+ MEM_INDEX and S_BITS are the memory context and log2 size of the load.
+
+ WHICH is the offset into the CPUTLBEntry structure of the slot to read.
+ This should be offsetof addr_read or addr_write.
+
+ Outputs:
+ LABEL_PTRS is filled with 1 (32-bit addresses) or 2 (64-bit addresses)
+ positions of the displacements of forward jumps to the TLB miss case.
+
+ EAX is loaded with the low part of the address. In the TLB hit case,
+ it has been adjusted as indicated by the TLB and so is a host address.
+ In the TLB miss case, it continues to hold a guest address.
+
+ EDX is clobbered. */
+
+static void tcg_out_tlb_load(TCGContext *s, int addrlo_idx, int mem_index,
+ int s_bits, const TCGArg *args,
+ uint8_t **label_ptr, int which)
+{
+ const int addrlo = args[addrlo_idx];
+ const int r0 = TCG_REG_EAX;
+ const int r1 = TCG_REG_EDX;
+
+ tcg_out_mov(s, r1, addrlo);
+ tcg_out_mov(s, r0, addrlo);
+
+ tcg_out_shifti(s, SHIFT_SHR, r1, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
+
+ tgen_arithi(s, ARITH_AND, r0, TARGET_PAGE_MASK | ((1 << s_bits) - 1), 0);
+ tgen_arithi(s, ARITH_AND, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS, 0);
+
+ tcg_out_modrm_sib_offset(s, OPC_LEA, r1, TCG_AREG0, r1, 0,
+ offsetof(CPUState, tlb_table[mem_index][0])
+ + which);
+
+ /* cmp 0(r1), r0 */
+ tcg_out_modrm_offset(s, OPC_CMP_GvEv, r0, r1, 0);
+
+ tcg_out_mov(s, r0, addrlo);
+
+ /* jne label1 */
+ tcg_out8(s, OPC_JCC_short + JCC_JNE);
+ label_ptr[0] = s->code_ptr;
+ s->code_ptr++;
+
+ if (TARGET_LONG_BITS == 64) {
+ /* cmp 4(r1), addrhi */
+ tcg_out_modrm_offset(s, OPC_CMP_GvEv, args[addrlo_idx+1], r1, 4);
+
+ /* jne label1 */
+ tcg_out8(s, OPC_JCC_short + JCC_JNE);
+ label_ptr[1] = s->code_ptr;
+ s->code_ptr++;
+ }
+
+ /* TLB Hit. */
+
+ /* add addend(r1), r0 */
+ tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1,
+ offsetof(CPUTLBEntry, addend) - which);
+}
#endif
static void tcg_out_qemu_ld_direct(TCGContext *s, int datalo, int datahi,
@@ -771,68 +839,29 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, int datalo, int datahi,
static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
int opc)
{
- int addr_reg, addr_reg2 = 0;
int data_reg, data_reg2 = 0;
- int r0, r1, mem_index, s_bits;
+ int addrlo_idx;
#if defined(CONFIG_SOFTMMU)
+ int mem_index, s_bits;
uint8_t *label_ptr[3];
#endif
- data_reg = *args++;
+ data_reg = args[0];
+ addrlo_idx = 1;
if (opc == 3) {
- data_reg2 = *args++;
+ data_reg2 = args[1];
+ addrlo_idx = 2;
}
- addr_reg = *args++;
- if (TARGET_LONG_BITS == 64) {
- addr_reg2 = *args++;
- }
- mem_index = *args;
- s_bits = opc & 3;
-
- r0 = TCG_REG_EAX;
- r1 = TCG_REG_EDX;
#if defined(CONFIG_SOFTMMU)
- tcg_out_mov(s, r1, addr_reg);
- tcg_out_mov(s, r0, addr_reg);
-
- tcg_out_shifti(s, SHIFT_SHR, r1, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
-
- tgen_arithi(s, ARITH_AND, r0, TARGET_PAGE_MASK | ((1 << s_bits) - 1), 0);
- tgen_arithi(s, ARITH_AND, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS, 0);
-
- tcg_out_modrm_sib_offset(s, OPC_LEA, r1, TCG_AREG0, r1, 0,
- offsetof(CPUState,
- tlb_table[mem_index][0].addr_read));
-
- /* cmp 0(r1), r0 */
- tcg_out_modrm_offset(s, OPC_CMP_GvEv, r0, r1, 0);
-
- tcg_out_mov(s, r0, addr_reg);
-
- /* jne label1 */
- tcg_out8(s, OPC_JCC_short + JCC_JNE);
- label_ptr[0] = s->code_ptr;
- s->code_ptr++;
-
- if (TARGET_LONG_BITS == 64) {
- /* cmp 4(r1), addr_reg2 */
- tcg_out_modrm_offset(s, OPC_CMP_GvEv, addr_reg2, r1, 4);
+ mem_index = args[addrlo_idx + (TARGET_LONG_BITS / 32)];
+ s_bits = opc & 3;
- /* jne label1 */
- tcg_out8(s, OPC_JCC_short + JCC_JNE);
- label_ptr[1] = s->code_ptr;
- s->code_ptr++;
- }
+ tcg_out_tlb_load(s, addrlo_idx, mem_index, s_bits, args,
+ label_ptr, offsetof(CPUTLBEntry, addr_read));
/* TLB Hit. */
-
- /* add x(r1), r0 */
- tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1,
- offsetof(CPUTLBEntry, addend) -
- offsetof(CPUTLBEntry, addr_read));
-
- tcg_out_qemu_ld_direct(s, data_reg, data_reg2, r0, 0, opc);
+ tcg_out_qemu_ld_direct(s, data_reg, data_reg2, TCG_REG_EAX, 0, opc);
/* jmp label2 */
tcg_out8(s, OPC_JMP_short);
@@ -851,7 +880,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
#if TARGET_LONG_BITS == 32
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EDX, mem_index);
#else
- tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
+ tcg_out_mov(s, TCG_REG_EDX, args[addrlo_idx + 1]);
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
#endif
tcg_out_calli(s, (tcg_target_long)qemu_ld_helpers[s_bits]);
@@ -888,7 +917,8 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
/* label2: */
*label_ptr[2] = s->code_ptr - label_ptr[2] - 1;
#else
- tcg_out_qemu_ld_direct(s, data_reg, data_reg2, addr_reg, GUEST_BASE, opc);
+ tcg_out_qemu_ld_direct(s, data_reg, data_reg2,
+ args[addrlo_idx], GUEST_BASE, opc);
#endif
}
@@ -949,70 +979,30 @@ static void tcg_out_qemu_st_direct(TCGContext *s, int datalo, int datahi,
static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
int opc)
{
- int addr_reg, addr_reg2 = 0;
int data_reg, data_reg2 = 0;
- int r0, r1, mem_index, s_bits;
+ int addrlo_idx;
#if defined(CONFIG_SOFTMMU)
+ int mem_index, s_bits;
int stack_adjust;
uint8_t *label_ptr[3];
#endif
- data_reg = *args++;
+ data_reg = args[0];
+ addrlo_idx = 1;
if (opc == 3) {
- data_reg2 = *args++;
+ data_reg2 = args[1];
+ addrlo_idx = 2;
}
- addr_reg = *args++;
- if (TARGET_LONG_BITS == 64) {
- addr_reg2 = *args++;
- }
- mem_index = *args;
-
- s_bits = opc;
-
- r0 = TCG_REG_EAX;
- r1 = TCG_REG_EDX;
#if defined(CONFIG_SOFTMMU)
- tcg_out_mov(s, r1, addr_reg);
- tcg_out_mov(s, r0, addr_reg);
-
- tcg_out_shifti(s, SHIFT_SHR, r1, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
-
- tgen_arithi(s, ARITH_AND, r0, TARGET_PAGE_MASK | ((1 << s_bits) - 1), 0);
- tgen_arithi(s, ARITH_AND, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS, 0);
-
- tcg_out_modrm_sib_offset(s, OPC_LEA, r1, TCG_AREG0, r1, 0,
- offsetof(CPUState,
- tlb_table[mem_index][0].addr_write));
-
- /* cmp 0(r1), r0 */
- tcg_out_modrm_offset(s, OPC_CMP_GvEv, r0, r1, 0);
-
- tcg_out_mov(s, r0, addr_reg);
-
- /* jne label1 */
- tcg_out8(s, OPC_JCC_short + JCC_JNE);
- label_ptr[0] = s->code_ptr;
- s->code_ptr++;
-
- if (TARGET_LONG_BITS == 64) {
- /* cmp 4(r1), addr_reg2 */
- tcg_out_modrm_offset(s, OPC_CMP_GvEv, addr_reg2, r1, 4);
+ mem_index = args[addrlo_idx + (TARGET_LONG_BITS / 32)];
+ s_bits = opc;
- /* jne label1 */
- tcg_out8(s, OPC_JCC_short + JCC_JNE);
- label_ptr[1] = s->code_ptr;
- s->code_ptr++;
- }
+ tcg_out_tlb_load(s, addrlo_idx, mem_index, s_bits, args,
+ label_ptr, offsetof(CPUTLBEntry, addr_write));
/* TLB Hit. */
-
- /* add x(r1), r0 */
- tcg_out_modrm_offset(s, OPC_ADD_GvEv, r0, r1,
- offsetof(CPUTLBEntry, addend) -
- offsetof(CPUTLBEntry, addr_write));
-
- tcg_out_qemu_st_direct(s, data_reg, data_reg2, r0, 0, opc);
+ tcg_out_qemu_st_direct(s, data_reg, data_reg2, TCG_REG_EAX, 0, opc);
/* jmp label2 */
tcg_out8(s, OPC_JMP_short);
@@ -1051,13 +1041,13 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
}
#else
if (opc == 3) {
- tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
+ tcg_out_mov(s, TCG_REG_EDX, args[addrlo_idx + 1]);
tcg_out_pushi(s, mem_index);
tcg_out_push(s, data_reg2);
tcg_out_push(s, data_reg);
stack_adjust = 12;
} else {
- tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
+ tcg_out_mov(s, TCG_REG_EDX, args[addrlo_idx + 1]);
switch(opc) {
case 0:
tcg_out_ext8u(s, TCG_REG_ECX, data_reg);
@@ -1086,7 +1076,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
/* label2: */
*label_ptr[2] = s->code_ptr - label_ptr[2] - 1;
#else
- tcg_out_qemu_st_direct(s, data_reg, data_reg2, addr_reg, GUEST_BASE, opc);
+ tcg_out_qemu_st_direct(s, data_reg, data_reg2,
+ args[addrlo_idx], GUEST_BASE, opc);
#endif
}
--
1.7.0.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [Qemu-devel] [PATCH 5/5] tcg-i386: Remove some ifdefs in qemu_ld/st.
2010-05-21 16:02 [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code Richard Henderson
` (3 preceding siblings ...)
2010-05-21 16:03 ` [Qemu-devel] [PATCH 4/5] tcg-i386: Split out tlb load function Richard Henderson
@ 2010-05-21 16:03 ` Richard Henderson
2010-05-21 16:58 ` [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code Richard Henderson
2010-06-02 20:51 ` Aurelien Jarno
6 siblings, 0 replies; 8+ messages in thread
From: Richard Henderson @ 2010-05-21 16:03 UTC (permalink / raw)
To: qemu-devel; +Cc: aurelien
Tidy some code by replacing ifdefs by C ifs.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/i386/tcg-target.c | 85 ++++++++++++++++++++++---------------------------
1 files changed, 38 insertions(+), 47 deletions(-)
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index cf621da..8a9122c 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -842,7 +842,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
int data_reg, data_reg2 = 0;
int addrlo_idx;
#if defined(CONFIG_SOFTMMU)
- int mem_index, s_bits;
+ int mem_index, s_bits, arg_idx;
uint8_t *label_ptr[3];
#endif
@@ -877,12 +877,14 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
}
/* XXX: move that code at the end of the TB */
-#if TARGET_LONG_BITS == 32
- tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EDX, mem_index);
-#else
- tcg_out_mov(s, TCG_REG_EDX, args[addrlo_idx + 1]);
- tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
-#endif
+ /* EAX is already loaded. */
+ arg_idx = 1;
+ if (TARGET_LONG_BITS == 64) {
+ tcg_out_mov(s, tcg_target_call_iarg_regs[arg_idx++],
+ args[addrlo_idx + 1]);
+ }
+ tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[arg_idx],
+ mem_index);
tcg_out_calli(s, (tcg_target_long)qemu_ld_helpers[s_bits]);
switch(opc) {
@@ -1018,51 +1020,40 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
}
/* XXX: move that code at the end of the TB */
-#if TARGET_LONG_BITS == 32
- if (opc == 3) {
+ if (TARGET_LONG_BITS == 32) {
tcg_out_mov(s, TCG_REG_EDX, data_reg);
- tcg_out_mov(s, TCG_REG_ECX, data_reg2);
- tcg_out_pushi(s, mem_index);
- stack_adjust = 4;
- } else {
- switch(opc) {
- case 0:
- tcg_out_ext8u(s, TCG_REG_EDX, data_reg);
- break;
- case 1:
- tcg_out_ext16u(s, TCG_REG_EDX, data_reg);
- break;
- case 2:
- tcg_out_mov(s, TCG_REG_EDX, data_reg);
- break;
+ if (opc == 3) {
+ tcg_out_mov(s, TCG_REG_ECX, data_reg2);
+ tcg_out_pushi(s, mem_index);
+ stack_adjust = 4;
+ } else {
+ tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
+ stack_adjust = 0;
}
- tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
- stack_adjust = 0;
- }
-#else
- if (opc == 3) {
- tcg_out_mov(s, TCG_REG_EDX, args[addrlo_idx + 1]);
- tcg_out_pushi(s, mem_index);
- tcg_out_push(s, data_reg2);
- tcg_out_push(s, data_reg);
- stack_adjust = 12;
} else {
- tcg_out_mov(s, TCG_REG_EDX, args[addrlo_idx + 1]);
- switch(opc) {
- case 0:
- tcg_out_ext8u(s, TCG_REG_ECX, data_reg);
- break;
- case 1:
- tcg_out_ext16u(s, TCG_REG_ECX, data_reg);
- break;
- case 2:
- tcg_out_mov(s, TCG_REG_ECX, data_reg);
- break;
+ if (opc == 3) {
+ tcg_out_mov(s, TCG_REG_EDX, args[addrlo_idx + 1]);
+ tcg_out_pushi(s, mem_index);
+ tcg_out_push(s, data_reg2);
+ tcg_out_push(s, data_reg);
+ stack_adjust = 12;
+ } else {
+ tcg_out_mov(s, TCG_REG_EDX, args[addrlo_idx + 1]);
+ switch(opc) {
+ case 0:
+ tcg_out_ext8u(s, TCG_REG_ECX, data_reg);
+ break;
+ case 1:
+ tcg_out_ext16u(s, TCG_REG_ECX, data_reg);
+ break;
+ case 2:
+ tcg_out_mov(s, TCG_REG_ECX, data_reg);
+ break;
+ }
+ tcg_out_pushi(s, mem_index);
+ stack_adjust = 4;
}
- tcg_out_pushi(s, mem_index);
- stack_adjust = 4;
}
-#endif
tcg_out_calli(s, (tcg_target_long)qemu_st_helpers[s_bits]);
--
1.7.0.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code
2010-05-21 16:02 [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code Richard Henderson
` (4 preceding siblings ...)
2010-05-21 16:03 ` [Qemu-devel] [PATCH 5/5] tcg-i386: Remove some ifdefs in qemu_ld/st Richard Henderson
@ 2010-05-21 16:58 ` Richard Henderson
2010-06-02 20:51 ` Aurelien Jarno
6 siblings, 0 replies; 8+ messages in thread
From: Richard Henderson @ 2010-05-21 16:58 UTC (permalink / raw)
To: qemu-devel
On 05/21/2010 09:02 AM, Richard Henderson wrote:
> This is sort-of part 2 of the patch series that I just edited and
> re-posted for you. The majority of the patch series deals with
> the SOFTMMU code.
Gah. Sorry for the re-post of parts 10-15 of the previous series.
r~
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code
2010-05-21 16:02 [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code Richard Henderson
` (5 preceding siblings ...)
2010-05-21 16:58 ` [Qemu-devel] [PATCH 0/5] tcg-i386: tidy softmmu code Richard Henderson
@ 2010-06-02 20:51 ` Aurelien Jarno
6 siblings, 0 replies; 8+ messages in thread
From: Aurelien Jarno @ 2010-06-02 20:51 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
On Fri, May 21, 2010 at 09:02:59AM -0700, Richard Henderson wrote:
> This is sort-of part 2 of the patch series that I just edited and
> re-posted for you. The majority of the patch series deals with
> the SOFTMMU code.
>
> I think you saw a patch about the data16 prefix before, but this
> one's different. It's written the way it is here because I have
> a third patch series pending that merges the i386 and x86_64 targets,
> and in addition to propagating P_DATA16 for rolw we'll have P_REXW
> for all the shifts.
>
>
> r~
>
>
> Richard Henderson (5):
> tcg-i386: Tidy data16 prefixes.
> tcg-i386: Split out TLB Hit path from qemu_ld/st.
> tcg-i386: Swap order of TLB hit and miss paths.
> tcg-i386: Split out tlb load function.
> tcg-i386: Remove some ifdefs in qemu_ld/st.
>
> tcg/i386/tcg-target.c | 549 ++++++++++++++++++++++++-------------------------
> 1 files changed, 267 insertions(+), 282 deletions(-)
>
>
Thanks, all applied.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 8+ messages in thread