[Qemu-devel] [PATCH 00/10] target-mips: add microMIPS ASE support, v2

[Nathan Froyd <froydnj@codesourcery.com>]

This patch series adds support for the microMIPS ASE.  microMIPS is a
new ASE similar to MIPS16, but re-encodes the entire instruction set
into 16-bit and 32-bit instructions--in contrast to MIPS16, which
re-encodes only integer instructions.  The mechanisms for going in and
out of microMIPS mode are identical to those for MIPS16; a given chip
cannot support both ASEs simultaneously.

changes from v1:
  fix re-introduction of previously deleted code noted by rth

Nathan Froyd (10):
  target-mips: break out [ls][wd]c1 and rdhwr insn generation
  target-mips: add microMIPS-specific bits to mips-defs.h
  target-mips: add enum constants for various invocations of FOP
  target-mips: refactor {c,abs}.cond.fmt insns
  target-mips: small changes to use new FMT_ enums
  target-mips: add microMIPS ASE support
  target-mips: add microMIPS CPUs
  target-mips: add microMIPS exception handler support
  linux-user: honor low bit of entry PC for MIPS
  hw: honor low bit in mipssim machine

 hw/mips_mipssim.c            |    4 +-
 linux-user/main.c            |    4 +-
 target-mips/cpu.h            |    3 +
 target-mips/helper.c         |   21 +-
 target-mips/helper.h         |    9 +
 target-mips/mips-defs.h      |    1 +
 target-mips/op_helper.c      |  136 ++
 target-mips/translate.c      | 3050 ++++++++++++++++++++++++++++++++++++++----
 target-mips/translate_init.c |   61 +
 9 files changed, 3047 insertions(+), 242 deletions(-)