From: Artyom Tarasenko <atar4qemu@googlemail.com>
To: qemu-devel@nongnu.org
Cc: blauwirbel@gmail.com, Artyom Tarasenko <atar4qemu@gmail.com>
Subject: [Qemu-devel] [PATCH] sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix)
Date: Sat, 29 May 2010 22:48:25 +0200 [thread overview]
Message-ID: <1275166105-4277-1-git-send-email-atar4qemu@gmail.com> (raw)
SuperSPARC MMU Breakpoint Action register is used by OBP at boot
The patch allows booting Solaris and some other OS with
SPARCStation-20 OBP.
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
---
target-sparc/op_helper.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index aaacfc4..ef3504f 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -1745,6 +1745,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign)
case 0x31: // Turbosparc RAM snoop
case 0x32: // Turbosparc page table descriptor diagnostic
case 0x39: /* data cache diagnostic register */
+ case 0x4c: /* SuperSPARC MMU Breakpoint Action register */
ret = 0;
break;
case 0x38: /* SuperSPARC MMU Breakpoint Control Registers */
--
1.6.2.5
next reply other threads:[~2010-05-29 20:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-29 20:48 Artyom Tarasenko [this message]
2010-05-29 21:27 ` [Qemu-devel] Re: [PATCH] sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix) Blue Swirl
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