From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=56519 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OISxN-0007Qj-4B for qemu-devel@nongnu.org; Sat, 29 May 2010 16:48:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OISxI-00068a-O3 for qemu-devel@nongnu.org; Sat, 29 May 2010 16:48:29 -0400 Received: from fg-out-1718.google.com ([72.14.220.153]:13115) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OISxI-00068R-Je for qemu-devel@nongnu.org; Sat, 29 May 2010 16:48:28 -0400 Received: by fg-out-1718.google.com with SMTP id 16so184159fgg.10 for ; Sat, 29 May 2010 13:48:27 -0700 (PDT) From: Artyom Tarasenko Date: Sat, 29 May 2010 22:48:25 +0200 Message-Id: <1275166105-4277-1-git-send-email-atar4qemu@gmail.com> Subject: [Qemu-devel] [PATCH] sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix) List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: blauwirbel@gmail.com, Artyom Tarasenko SuperSPARC MMU Breakpoint Action register is used by OBP at boot The patch allows booting Solaris and some other OS with SPARCStation-20 OBP. Signed-off-by: Artyom Tarasenko --- target-sparc/op_helper.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index aaacfc4..ef3504f 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -1745,6 +1745,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) case 0x31: // Turbosparc RAM snoop case 0x32: // Turbosparc page table descriptor diagnostic case 0x39: /* data cache diagnostic register */ + case 0x4c: /* SuperSPARC MMU Breakpoint Action register */ ret = 0; break; case 0x38: /* SuperSPARC MMU Breakpoint Control Registers */ -- 1.6.2.5