qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Paolo Bonzini <pbonzini@redhat.com>
To: Kuo-Jung Su <dantesu@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Igor Mitsyanko <i.mitsyanko@samsung.com>,
	qemu-devel@nongnu.org, Blue Swirl <blauwirbel@gmail.com>,
	Paul Brook <paul@codesourcery.com>, Andreas <afaerber@suse.de>,
	fred konrad <fred.konrad@greensocs.com>
Subject: Re: [Qemu-devel] [PATCH v6 07/24] hw/arm: add Faraday FTWDT010 watchdog timer support
Date: Wed, 6 Mar 2013 05:46:25 -0500 (EST)	[thread overview]
Message-ID: <1275401492.3147913.1362566785770.JavaMail.root@redhat.com> (raw)
In-Reply-To: <CAK65tU68b4iCiWXGmeLib2rWaB5hcjvUJXxvREfsMikiAW3Ogw@mail.gmail.com>

> > > It doesn't work while running under ROM mode. ( no -kernel )
> > > Because Faraday SoC Platform usually designed to boot from ROM and
> > > followed by an AHB remapping process (i.e. remap ROM/RAM address).
> >
> > What doesn't work exactly?  Why aren't these called?  Or are
> > you forcing a particular reset order?
> >
> > Paolo
> 
> While booting from ROM, the faraday soc usually remap the ROM / RAM
> before jumping into linux.
> 
> In other words,  the system mapping is:
> 
> 1. Power-On:
> 
>     ROM: 0x00000000
>     RAM: N/A
>     SRAM: 0xA0000000
> 
> 2. AHB Remap (u-boot/linux)
> 
>     ROM: 0x20000000
>     RAM: 0x00000000
> 
> So I have to register my own reset handler to
> 
> 1. Undo the ROM/RAM remap (i.e. device_reset(s->ahbc))
> 2. Reset CPU

----- Messaggio originale -----
> Da: "Kuo-Jung Su" <dantesu@gmail.com>
> A: "Paolo Bonzini" <pbonzini@redhat.com>
> Inviato: Mercoledì, 6 marzo 2013 11:00:49
> Oggetto: Re: [PATCH v6 07/24] hw/arm: add Faraday FTWDT010 watchdog timer support
> 
> 2013/3/6 Paolo Bonzini <pbonzini@redhat.com>:
> >
> >> 2013/3/6 Paolo Bonzini <pbonzini@redhat.com>:
> >> > Il 06/03/2013 08:27, Kuo-Jung Su ha scritto:
> >> >> The FTWDT010 is used to prevent system from infinite loop
> >> >> while software gets trapped in the deadlock.
> >> >>
> >> >> Under the normal operation, users should restart FTWDT010
> >> >> at the regular intervals before counter counts down to 0.
> >> >>
> >> >> If the counter does reach 0, FTWDT010 will try to reset
> >> >> the system by generating one or a combination of signals,
> >> >> system reset, system interrupt, and external interrupt.
> >> >>
> >> >> Signed-off-by: Kuo-Jung Su <dantesu@gmail.com>
> >> >> ---
> >> >>  hw/arm/Makefile.objs      |    1 +
> >> >>  hw/arm/faraday_a369_soc.c |   23 +++++
> >> >>  hw/arm/ftwdt010.c         |  212
> >> >>  +++++++++++++++++++++++++++++++++++++++++++++
> >> >>  hw/arm/ftwdt010.h         |   35 ++++++++
> >> >>  4 files changed, 271 insertions(+)
> >> >>  create mode 100644 hw/arm/ftwdt010.c
> >> >>  create mode 100644 hw/arm/ftwdt010.h
> >> >>
> >> >> diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
> >> >> index 2190edd..bc8e2de 100644
> >> >> --- a/hw/arm/Makefile.objs
> >> >> +++ b/hw/arm/Makefile.objs
> >> >> @@ -41,3 +41,4 @@ obj-y += ftintc020.o
> >> >>  obj-y += ftahbc020.o
> >> >>  obj-y += ftddrii030.o
> >> >>  obj-y += ftpwmtmr010.o
> >> >> +obj-y += ftwdt010.o
> >> >> diff --git a/hw/arm/faraday_a369_soc.c
> >> >> b/hw/arm/faraday_a369_soc.c
> >> >> index 66d9891..1bf64d4 100644
> >> >> --- a/hw/arm/faraday_a369_soc.c
> >> >> +++ b/hw/arm/faraday_a369_soc.c
> >> >> @@ -68,6 +68,25 @@ static void a369soc_reset(DeviceState *ds)
> >> >>  }
> >> >>
> >> >>  static void
> >> >> +a369soc_system_reset(void *opaque)
> >> >> +{
> >> >> +    FaradaySoCState *s = FARADAY_SOC(opaque);
> >> >> +
> >> >> +    if (s->scu) {
> >> >> +        device_reset(s->scu);
> >> >> +    }
> >> >> +    if (s->ddrc) {
> >> >> +        device_reset(s->ddrc);
> >> >> +    }
> >> >> +    if (s->ahbc) {
> >> >> +        device_reset(s->ahbc);
> >> >> +    }
> >> >> +    if (s->cpu) {
> >> >> +        cpu_reset(CPU(s->cpu));
> >> >> +    }
> >> >> +}
> >> >
> >> > Why is this needed?  Aren't they called already by
> >> >
> >> >     qemu_register_reset(qbus_reset_all_fn,
> >> >     sysbus_get_default());
> >> >
> >> > ?
> >> >
> >>
> >> It doesn't work while running under ROM mode. ( no -kernel )
> >> Because Faraday SoC Platform usually designed to boot from ROM and
> >> followed by an AHB remapping process (i.e. remap ROM/RAM address).
> >
> > What doesn't work exactly?  Why aren't these called?  Or are
> > you forcing a particular reset order?
> >
> > Paolo
> 
> While booting from ROM, the faraday soc usually remap the ROM / RAM
> before jumping into linux.
> 
> In other words,  the system mapping is:
> 
> 1. Power-On:
> 
>     ROM: 0x00000000
>     RAM: N/A
>     SRAM: 0xA0000000
> 
> 2. AHB Remap (u-boot/linux)
> 
>     ROM: 0x20000000
>     RAM: 0x00000000
> 
> So I have to register my own reset handler to
> 
> 1. Undo the ROM/RAM remap (i.e. device_reset(s->ahbc))
> 2. Reset CPU

I understand that.  What I'm missing is, why these reset handlers aren't
called anyway when QEMU does qemu_devices_reset(), for example from
qemu_system_reset().

Also, I do not understand who performs this again:

+        /* Remap AHB slave 4 (ROM) & slave 6 (RAM) */
+        /* 1. Remap RAM to base of ROM */
+        s->ram_base = s->ahb_slave[4] & 0xfff00000;
+        s->ahb_slave[6] = s->ram_base | (s->ahb_slave[6] & 0x000f0000);
+        /* 2. Remap ROM to base of ROM + size of RAM */
+        s->rom_base = s->ram_base
+                    + ((1 << extract32(s->ahb_slave[6], 16, 4)) << 20);
+        s->ahb_slave[4] = s->rom_base | (s->ahb_slave[4] & 0x000f0000);

when you do a system_reset and the board was started in kernel mode.

Paolo

  reply	other threads:[~2013-03-06 10:46 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-06  7:27 [Qemu-devel] [PATCH v6 00/24] Add Faraday A369 SoC platform support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 01/24] target-arm: add Faraday ARMv5TE processors support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 02/24] hw/arm: add Faraday a369 SoC platform support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 03/24] hw/arm: add Faraday FTINTC020 interrupt controller support Kuo-Jung Su
2013-03-12  3:42   ` Peter Crosthwaite
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 04/24] hw/arm: add Faraday FTAHBC020 support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 05/24] hw/arm: add Faraday FTDDRII030 support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 06/24] hw/arm: add Faraday FTPWMTMR010 timer support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 07/24] hw/arm: add Faraday FTWDT010 watchdog " Kuo-Jung Su
2013-03-06  8:22   ` Paolo Bonzini
2013-03-06  8:56     ` Kuo-Jung Su
2013-03-06 10:46       ` Paolo Bonzini [this message]
2013-03-07  2:44         ` Kuo-Jung Su
2013-03-07  5:53           ` Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 08/24] hw/arm: add Faraday FTRTC011 RTC " Kuo-Jung Su
2013-03-06  8:24   ` Paolo Bonzini
2013-03-07  6:39     ` Kuo-Jung Su
2013-03-07  7:24       ` Paolo Bonzini
2013-03-07  7:27       ` 陳韋任 (Wei-Ren Chen)
2013-03-07  7:41         ` Paolo Bonzini
2013-03-07  8:01           ` 陳韋任 (Wei-Ren Chen)
2013-03-07  8:08           ` Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 09/24] hw/arm: add Faraday FTDMAC020 AHB DMA support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 10/24] hw/arm: add Faraday FTAPBBRG020 APB " Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 11/24] hw/nand.c: correct the sense of the BUSY/READY status bit Kuo-Jung Su
2013-03-07  2:11   ` Peter Crosthwaite
2013-03-07  3:40     ` Kuo-Jung Su
2013-03-07  8:37     ` Edgar E. Iglesias
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 12/24] hw/nand.c: bug fix to erase operation Kuo-Jung Su
2013-03-07  2:18   ` Peter Crosthwaite
2013-03-07  2:28     ` Peter Maydell
2013-03-07  3:32       ` Peter Crosthwaite
2013-03-07  4:10         ` Kuo-Jung Su
2013-03-07  3:35       ` Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 13/24] hw/arm: add Faraday FTNANDC021 nand flash controller support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 14/24] hw/arm: add Faraday FTI2C010 I2C " Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 15/24] hw: add WM8731 codec support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 16/24] hw/arm: add Faraday FTSSP010 multi-function controller support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 17/24] qemu/bitops.h: add the bit ordering reversal functions stolen from linux Kuo-Jung Su
2013-03-06  8:26   ` Paolo Bonzini
2013-03-07  2:58     ` Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 18/24] hw/arm: add Faraday FTGMAC100 1Gbps ethernet support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 19/24] hw/arm: add Faraday FTLCDC200 LCD controller support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 20/24] hw/arm: add Faraday FTTSC010 touchscreen " Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 21/24] hw/arm: add Faraday FTSDC010 MMC/SD " Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 22/24] hw/arm: add Faraday FTMAC110 10/100Mbps ethernet support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 23/24] hw/arm: add Faraday FTTMR010 timer support Kuo-Jung Su
2013-03-06  7:27 ` [Qemu-devel] [PATCH v6 24/24] hw/arm: add Faraday FTSPI020 SPI flash controller support Kuo-Jung Su

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1275401492.3147913.1362566785770.JavaMail.root@redhat.com \
    --to=pbonzini@redhat.com \
    --cc=afaerber@suse.de \
    --cc=blauwirbel@gmail.com \
    --cc=dantesu@gmail.com \
    --cc=fred.konrad@greensocs.com \
    --cc=i.mitsyanko@samsung.com \
    --cc=paul@codesourcery.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).