From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH 2/2] tcg: Make some tcg-target.c routines static.
Date: Wed, 2 Jun 2010 17:26:56 -0700 [thread overview]
Message-ID: <1275524816-4187-3-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1275524816-4187-1-git-send-email-rth@twiddle.net>
Both tcg_target_init and tcg_target_qemu_prologue
are unused outside of tcg.c.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/arm/tcg-target.c | 4 ++--
tcg/hppa/tcg-target.c | 4 ++--
tcg/i386/tcg-target.c | 4 ++--
tcg/ia64/tcg-target.c | 4 ++--
tcg/mips/tcg-target.c | 4 ++--
tcg/ppc/tcg-target.c | 4 ++--
tcg/ppc64/tcg-target.c | 4 ++--
tcg/s390/tcg-target.c | 4 ++--
tcg/sparc/tcg-target.c | 4 ++--
tcg/tcg.c | 2 ++
tcg/tcg.h | 3 ---
tcg/x86_64/tcg-target.c | 4 ++--
12 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index b3169a9..a3af5b2 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -1746,7 +1746,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
{ -1 },
};
-void tcg_target_init(TCGContext *s)
+static void tcg_target_init(TCGContext *s)
{
#if !defined(CONFIG_USER_ONLY)
/* fail safe */
@@ -1809,7 +1809,7 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type,
tcg_out_movi32(s, COND_AL, ret, arg);
}
-void tcg_target_qemu_prologue(TCGContext *s)
+static void tcg_target_qemu_prologue(TCGContext *s)
{
/* There is no need to save r7, it is used to store the address
of the env structure and is not modified by GCC. */
diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c
index a5f2162..7f4653e 100644
--- a/tcg/hppa/tcg-target.c
+++ b/tcg/hppa/tcg-target.c
@@ -1600,7 +1600,7 @@ static int tcg_target_callee_save_regs[] = {
TCG_REG_R18
};
-void tcg_target_qemu_prologue(TCGContext *s)
+static void tcg_target_qemu_prologue(TCGContext *s)
{
int frame_size, i;
@@ -1652,7 +1652,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
TCG_REG_SP, -frame_size, INSN_LDWM);
}
-void tcg_target_init(TCGContext *s)
+static void tcg_target_init(TCGContext *s)
{
tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index 8745ad1..147ba17 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -1430,7 +1430,7 @@ static int tcg_target_callee_save_regs[] = {
};
/* Generate global QEMU prologue and epilogue code */
-void tcg_target_qemu_prologue(TCGContext *s)
+static void tcg_target_qemu_prologue(TCGContext *s)
{
int i, frame_size, push_size, stack_addend;
@@ -1458,7 +1458,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
tcg_out_opc(s, OPC_RET);
}
-void tcg_target_init(TCGContext *s)
+static void tcg_target_init(TCGContext *s)
{
#if !defined(CONFIG_USER_ONLY)
/* fail safe */
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index 0d275e9..a0f3877 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@ -2266,7 +2266,7 @@ static const TCGTargetOpDef ia64_op_defs[] = {
};
/* Generate global QEMU prologue and epilogue code */
-void tcg_target_qemu_prologue(TCGContext *s)
+static void tcg_target_qemu_prologue(TCGContext *s)
{
int frame_size;
@@ -2321,7 +2321,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
TCG_REG_B0));
}
-void tcg_target_init(TCGContext *s)
+static void tcg_target_init(TCGContext *s)
{
tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32],
0xffffffffffffffffull);
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 8d9c12f..2af7a2e 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -1466,7 +1466,7 @@ static int tcg_target_callee_save_regs[] = {
};
/* Generate global QEMU prologue and epilogue code */
-void tcg_target_qemu_prologue(TCGContext *s)
+static void tcg_target_qemu_prologue(TCGContext *s)
{
int i, frame_size;
@@ -1498,7 +1498,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
tcg_out_addi(s, TCG_REG_SP, frame_size);
}
-void tcg_target_init(TCGContext *s)
+static void tcg_target_init(TCGContext *s)
{
tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32], 0xffffffff);
tcg_regset_set(tcg_target_call_clobber_regs,
diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
index ce078e4..2e5bb9f 100644
--- a/tcg/ppc/tcg-target.c
+++ b/tcg/ppc/tcg-target.c
@@ -900,7 +900,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
#endif
}
-void tcg_target_qemu_prologue (TCGContext *s)
+static void tcg_target_qemu_prologue (TCGContext *s)
{
int i, frame_size;
@@ -1885,7 +1885,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ -1 },
};
-void tcg_target_init(TCGContext *s)
+static void tcg_target_init(TCGContext *s)
{
tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
tcg_regset_set32(tcg_target_call_clobber_regs, 0,
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 2d436a5..0483d6b 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -860,7 +860,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
#endif
}
-void tcg_target_qemu_prologue (TCGContext *s)
+static void tcg_target_qemu_prologue (TCGContext *s)
{
int i, frame_size;
#ifndef __APPLE__
@@ -1663,7 +1663,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ -1 },
};
-void tcg_target_init (TCGContext *s)
+static void tcg_target_init (TCGContext *s)
{
tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 06b6db3..6f08aa4 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -84,12 +84,12 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_abort();
}
-void tcg_target_init(TCGContext *s)
+static void tcg_target_init(TCGContext *s)
{
/* gets called with KVM */
}
-void tcg_target_qemu_prologue(TCGContext *s)
+static void tcg_target_qemu_prologue(TCGContext *s)
{
/* gets called with KVM */
}
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 9f970cd..5f1353a 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -691,7 +691,7 @@ static void tcg_out_setcond2_i32(TCGContext *s, TCGCond cond, TCGArg ret,
#endif
/* Generate global QEMU prologue and epilogue code */
-void tcg_target_qemu_prologue(TCGContext *s)
+static void tcg_target_qemu_prologue(TCGContext *s)
{
tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) |
INSN_IMM13(-TCG_TARGET_STACK_MINFRAME));
@@ -1533,7 +1533,7 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ -1 },
};
-void tcg_target_init(TCGContext *s)
+static void tcg_target_init(TCGContext *s)
{
tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
#if TCG_TARGET_REG_BITS == 64
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 32f9e17..3368d93 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -63,6 +63,8 @@
#error GUEST_BASE not supported on this host.
#endif
+static void tcg_target_init(TCGContext *s);
+static void tcg_target_qemu_prologue(TCGContext *s);
static void patch_reloc(uint8_t *code_ptr, int type,
tcg_target_long value, tcg_target_long addend);
diff --git a/tcg/tcg.h b/tcg/tcg.h
index d6cb9e7..9134700 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -435,9 +435,6 @@ typedef struct TCGTargetOpDef {
const char *args_ct_str[TCG_MAX_OP_ARGS];
} TCGTargetOpDef;
-void tcg_target_init(TCGContext *s);
-void tcg_target_qemu_prologue(TCGContext *s);
-
#define tcg_abort() \
do {\
fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
index 9844a57..490666e 100644
--- a/tcg/x86_64/tcg-target.c
+++ b/tcg/x86_64/tcg-target.c
@@ -1279,7 +1279,7 @@ static inline void tcg_out_pop(TCGContext *s, int reg)
}
/* Generate global QEMU prologue and epilogue code */
-void tcg_target_qemu_prologue(TCGContext *s)
+static void tcg_target_qemu_prologue(TCGContext *s)
{
int i, frame_size, push_size, stack_addend;
@@ -1417,7 +1417,7 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
{ -1 },
};
-void tcg_target_init(TCGContext *s)
+static void tcg_target_init(TCGContext *s)
{
#if !defined(CONFIG_USER_ONLY)
/* fail safe */
--
1.7.0.1
next prev parent reply other threads:[~2010-06-03 0:27 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-03 0:26 [Qemu-devel] [PATCH 0/2] tcg cleanups, part 4 Richard Henderson
2010-06-03 0:26 ` [Qemu-devel] [PATCH 1/2] tcg: Add TYPE parameter to tcg_out_mov Richard Henderson
2010-06-04 19:19 ` Blue Swirl
2010-06-04 19:34 ` Richard Henderson
2010-06-03 0:26 ` Richard Henderson [this message]
2010-06-03 9:23 ` [Qemu-devel] [PATCH 0/2] tcg cleanups, part 4 malc
2010-06-04 0:35 ` [Qemu-devel] [PATCH 0/2] tcg-i386: merge 64-bit, guest_base improvement Richard Henderson
2010-06-04 0:35 ` [Qemu-devel] [PATCH 1/2] tcg-i386: Merge 64-bit generation Richard Henderson
2010-06-09 22:18 ` Aurelien Jarno
2010-06-04 0:35 ` [Qemu-devel] [PATCH 2/2] tcg-i386: Use segment registers to implement GUEST_BASE Richard Henderson
2010-06-04 6:35 ` Alexander Graf
2010-06-07 19:45 ` Richard Henderson
2010-06-09 9:42 ` [Qemu-devel] [PATCH 0/2] tcg cleanups, part 4 Aurelien Jarno
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