[Qemu-devel] [PATCH 0/0] fix ARM parallel instructions implementation bug

[Qemu-devel] [PATCH 0/0] fix ARM parallel instructions implementation bug

[Chih-Min Chao]

 The three patches focuse on Bugs 595906 & Bug 591320. The first is related to
 Bug 595906 and the other solve Bug 591320.

 The series are also attached in the threads, listed below
 https://bugs.launchpad.net/qemu/+bug/595906
 https://bugs.launchpad.net/qemu/+bug/591320

 [PATCH 1/3] target-arm: fix addsub/subadd implementation
 [PATCH 2/3] target-arm : fix thumb2 parallel add/sub opcode decoding
 [PATCH 3/3] target-arm : fix parallel saturated subtraction implementation

[Qemu-devel] [PATCH 1/3] target-arm: fix addsub/subadd implementation

[Chih-Min Chao]

Signed-off-by: Chih-Min Chao <cmchao@gmail.com>
---
 target-arm/op_addsub.h |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/target-arm/op_addsub.h b/target-arm/op_addsub.h
index 29f77ba..c02c92a 100644
--- a/target-arm/op_addsub.h
+++ b/target-arm/op_addsub.h
@@ -73,8 +73,8 @@ uint32_t HELPER(glue(PFX,subaddx))(uint32_t a, uint32_t b GE_ARG)
     uint32_t res = 0;
     DECLARE_GE;
 
-    ADD16(a, b, 0);
-    SUB16(a >> 16, b >> 16, 1);
+    ADD16(a, b >> 16, 0);
+    SUB16(a >> 16, b, 1);
     SET_GE;
     return res;
 }
@@ -84,8 +84,8 @@ uint32_t HELPER(glue(PFX,addsubx))(uint32_t a, uint32_t b GE_ARG)
     uint32_t res = 0;
     DECLARE_GE;
 
-    SUB16(a, b, 0);
-    ADD16(a >> 16, b >> 16, 1);
+    SUB16(a, b >> 16, 0);
+    ADD16(a >> 16, b, 1);
     SET_GE;
     return res;
 }
-- 
1.7.0.4

[Qemu-devel] [PATCH 2/3] target-arm : fix thumb2 parallel add/sub opcode decoding ref : DDI0406B_arm_architecture_reference_manual_errata_markup_4_0.pdf section A6.3.1[34]

[Chih-Min Chao]

Signed-off-by: Chih-Min Chao <cmchao@gmail.com>
---
 target-arm/translate.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index a28e2ff..6fcdd7e 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -561,7 +561,7 @@ static void gen_arm_parallel_addsub(int op1, int op2, TCGv a, TCGv b)
 
 /* For unknown reasons Arm and Thumb-2 use arbitrarily different encodings.  */
 #define PAS_OP(pfx) \
-    switch (op2) {  \
+    switch (op1) {  \
     case 0: gen_pas_helper(glue(pfx,add8)); break; \
     case 1: gen_pas_helper(glue(pfx,add16)); break; \
     case 2: gen_pas_helper(glue(pfx,addsubx)); break; \
@@ -573,7 +573,7 @@ static void gen_thumb2_parallel_addsub(int op1, int op2, TCGv a, TCGv b)
 {
     TCGv_ptr tmp;
 
-    switch (op1) {
+    switch (op2) {
 #define gen_pas_helper(name) glue(gen_helper_,name)(a, a, b, tmp)
     case 0:
         tmp = tcg_temp_new_ptr();
-- 
1.7.0.4

[Qemu-devel] [PATCH 3/3] target-arm : fix parallel saturated subtraction implementation

[Chih-Min Chao]

Signed-off-by: Chih-Min Chao <cmchao@gmail.com>
---
 target-arm/helper.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 63e5dc7..2dd64d9 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2047,7 +2047,7 @@ static inline uint16_t add16_usat(uint16_t a, uint16_t b)
 
 static inline uint16_t sub16_usat(uint16_t a, uint16_t b)
 {
-    if (a < b)
+    if (a > b)
         return a - b;
     else
         return 0;
@@ -2064,7 +2064,7 @@ static inline uint8_t add8_usat(uint8_t a, uint8_t b)
 
 static inline uint8_t sub8_usat(uint8_t a, uint8_t b)
 {
-    if (a < b)
+    if (a > b)
         return a - b;
     else
         return 0;
-- 
1.7.0.4

Re: [Qemu-devel] [PATCH 0/0] fix ARM parallel instructions implementation bug

[Aurelien Jarno]

On Mon, Jun 28, 2010 at 11:54:03PM +0800, Chih-Min Chao wrote:
>  The three patches focuse on Bugs 595906 & Bug 591320. The first is related to
>  Bug 595906 and the other solve Bug 591320.
> 
>  The series are also attached in the threads, listed below
>  https://bugs.launchpad.net/qemu/+bug/595906
>  https://bugs.launchpad.net/qemu/+bug/591320
> 
>  [PATCH 1/3] target-arm: fix addsub/subadd implementation
>  [PATCH 2/3] target-arm : fix thumb2 parallel add/sub opcode decoding
>  [PATCH 3/3] target-arm : fix parallel saturated subtraction implementation
> 
> 

Thanks, all applied.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net