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([2001:8003:c020:6900:324d:cbc2:5f8b:3a9d]) by smtp.gmail.com with ESMTPSA id e27-20020a056a0000db00b006d9bf71461asm7105954pfj.86.2023.12.28.15.35.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 28 Dec 2023 15:35:20 -0800 (PST) Message-ID: <127b5fc3-b852-4d5c-b53b-1fafcf22cd1f@linaro.org> Date: Fri, 29 Dec 2023 10:35:15 +1100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/6] target/riscv: Add helper functions to calculate current number of masked bits for pointer masking Content-Language: en-US To: Alexey Baturo Cc: zhiwei_liu@linux.alibaba.com, palmer@dabbelt.com, Alistair.Francis@wdc.com, sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de, qemu-devel@nongnu.org, qemu-riscv@nongnu.org References: <20231224044812.2072140-1-me@deliversmonkey.space> <20231224044812.2072140-4-me@deliversmonkey.space> From: Richard Henderson In-Reply-To: <20231224044812.2072140-4-me@deliversmonkey.space> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/24/23 15:48, Alexey Baturo wrote: > From: Alexey Baturo > > Signed-off-by: Alexey Baturo > --- > target/riscv/cpu.h | 4 +++ > target/riscv/cpu_helper.c | 54 +++++++++++++++++++++++++++++++++++++++ > 2 files changed, 58 insertions(+) > > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > index bd379ee653..c607a94bba 100644 > --- a/target/riscv/cpu.h > +++ b/target/riscv/cpu.h > @@ -672,6 +672,10 @@ static inline uint32_t vext_get_vlmax(RISCVCPU *cpu, target_ulong vtype) > void cpu_get_tb_cpu_state(CPURISCVState *env, vaddr *pc, > uint64_t *cs_base, uint32_t *pflags); > > +bool riscv_cpu_bare_mode(CPURISCVState *env); > +RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env); > +int riscv_pm_get_pmlen(RISCVPmPmm pmm); > + > RISCVException riscv_csrrw(CPURISCVState *env, int csrno, > target_ulong *ret_value, > target_ulong new_value, target_ulong write_mask); > diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c > index a3d477d226..47f325294e 100644 > --- a/target/riscv/cpu_helper.c > +++ b/target/riscv/cpu_helper.c > @@ -139,6 +139,60 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, vaddr *pc, > *pflags = flags; > } > > +RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env) > +{ > +#ifndef CONFIG_USER_ONLY > + int priv_mode = cpu_address_mode(env); > + int pmm = 0; > + /* Get current PMM field */ > + switch (priv_mode) { > + case PRV_M: > + pmm = riscv_cpu_cfg(env)->ext_smmpm ? > + get_field(env->mseccfg, MSECCFG_PMM) : PMM_FIELD_DISABLED; > + break; > + case PRV_S: > + pmm = riscv_cpu_cfg(env)->ext_smnpm ? > + get_field(env->menvcfg, MENVCFG_PMM) : PMM_FIELD_DISABLED; > + break; > + case PRV_U: > + pmm = riscv_cpu_cfg(env)->ext_ssnpm ? > + get_field(env->senvcfg, SENVCFG_PMM) : PMM_FIELD_DISABLED; > + break; > + default: > + g_assert_not_reached(); > + } > + return pmm; > +#endif > +} > + > +bool riscv_cpu_bare_mode(CPURISCVState *env) > +{ > +#ifndef CONFIG_USER_ONLY > + int satp_mode = 0; > + if (riscv_cpu_mxl(env) == MXL_RV32) { > + satp_mode = get_field(env->satp, SATP32_MODE); > + } else { > + satp_mode = get_field(env->satp, SATP64_MODE); > + } > + return (satp_mode == VM_1_10_MBARE); > +#endif > +} You can't leave these with no return statement for CONFIG_USER_ONLY. You probably don't need the ifdef at all, come to that. r~