From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=41731 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Ofczj-0006im-Um for qemu-devel@nongnu.org; Sun, 01 Aug 2010 14:10:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1Ofczi-0005sB-Lq for qemu-devel@nongnu.org; Sun, 01 Aug 2010 14:10:43 -0400 Received: from smtp5-g21.free.fr ([212.27.42.5]:42920) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1Ofczh-0005ro-Tt for qemu-devel@nongnu.org; Sun, 01 Aug 2010 14:10:42 -0400 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Sun, 1 Aug 2010 19:37:04 +0200 Message-Id: <1280684242-19611-2-git-send-email-hpoussin@reactos.org> In-Reply-To: <4C5579DA.8050508@reactos.org> References: <4C5579DA.8050508@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 02/20] [MIPS] cpu: convert to qdev List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Add a qdev device representing a whole MIPS CPU, ie the core, the interru= pt controller, and the timer. Export a qdev bus, so other devices can use MIPS CPU interrupts Signed-off-by: Herv=C3=A9 Poussineau --- hw/mips_cpudevs.h | 4 ++ hw/mips_int.c | 81 +++++++++++++++++++++++++++++++++++++++++++++++= ++++++ 2 files changed, 85 insertions(+), 0 deletions(-) diff --git a/hw/mips_cpudevs.h b/hw/mips_cpudevs.h index db82b41..495b3fd 100644 --- a/hw/mips_cpudevs.h +++ b/hw/mips_cpudevs.h @@ -1,5 +1,7 @@ #ifndef HW_MIPS_CPUDEVS_H #define HW_MIPS_CPUDEVS_H +#include "qdev.h" + /* Definitions for MIPS CPU internal devices. */ =20 /* mips_addr.c */ @@ -8,6 +10,8 @@ uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t a= ddr); =20 /* mips_int.c */ void cpu_mips_irq_init_cpu(CPUState *env); +BusState *cpu_mips_init_cpu(const char *model); +void cpu_mips_register(DeviceInfo *info); =20 /* mips_timer.c */ void cpu_mips_clock_init(CPUState *); diff --git a/hw/mips_int.c b/hw/mips_int.c index 477f6ab..8e868be 100644 --- a/hw/mips_int.c +++ b/hw/mips_int.c @@ -22,6 +22,7 @@ =20 #include "hw.h" #include "mips_cpudevs.h" +#include "sysbus.h" #include "cpu.h" =20 static void cpu_mips_irq_request(void *opaque, int irq, int level) @@ -63,3 +64,83 @@ void cpu_mips_soft_irq(CPUState *env, int irq, int lev= el) =20 qemu_set_irq(env->irq[irq], level); } + +typedef struct CPUMIPS +{ + SysBusDevice busdev; + BusState qbus; + char *model; + CPUState state; +} CPUMIPS; + +static void cpu_mips_irq_request1(void *opaque, int irq, int level) +{ + CPUMIPS *s =3D FROM_SYSBUS(CPUMIPS, sysbus_from_qdev(opaque)); + CPUState *env =3D &s->state; + cpu_mips_irq_request(env, irq, level); +} + +static void cpu_device_reset(DeviceState *d) +{ + CPUMIPS *s =3D FROM_SYSBUS(CPUMIPS, sysbus_from_qdev(d)); + cpu_reset(&s->state); +} + +static struct BusInfo cpu_bus_info =3D { + .name =3D "cpu", + .size =3D 0, +}; + +void cpu_mips_register(DeviceInfo *info) +{ + info->bus_info =3D &cpu_bus_info; + qdev_register(info); +} + +static int cpu_device_init(SysBusDevice *dev) +{ + CPUMIPS* cpu =3D FROM_SYSBUS(CPUMIPS, dev); + + if (cpu_mips_init_inplace(&cpu->state, cpu->model) < 0) + return -1; + + cpu_mips_clock_init(&cpu->state); + + qbus_create_inplace(&cpu->qbus, &cpu_bus_info, &dev->qdev, NULL); + qdev_init_gpio_in(cpu->qbus.parent, cpu_mips_irq_request1, 8); + return 0; +} + +static SysBusDeviceInfo cpu_device_info =3D { + .qdev.name =3D "cpu-mips", + .qdev.size =3D sizeof(CPUMIPS), + .qdev.reset =3D cpu_device_reset, + .init =3D cpu_device_init, + .qdev.props =3D (Property[]) { + DEFINE_PROP_STRING("model", CPUMIPS, model), + DEFINE_PROP_END_OF_LIST(), + }, +}; + +static void mips_register_devices(void) +{ + sysbus_register_withprop(&cpu_device_info); +} + +device_init(mips_register_devices) + +BusState *cpu_mips_init_cpu(const char *cpu_model) +{ + DeviceState *dev; + + dev =3D qdev_create(NULL, "cpu-mips"); + if (!dev) { + return NULL; + } + qdev_prop_set_string(dev, "model", qemu_strdup(cpu_model)); + if (qdev_init(dev) < 0) { + return NULL; + } + return &container_of(dev, CPUMIPS, busdev.qdev)->qbus; +} + --=20 1.7.1.GIT