From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=51295 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PKy0C-00048C-Ne for qemu-devel@nongnu.org; Tue, 23 Nov 2010 13:54:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PKy0A-0007Ab-Ac for qemu-devel@nongnu.org; Tue, 23 Nov 2010 13:54:04 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:30456) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PKy0A-00079W-1O for qemu-devel@nongnu.org; Tue, 23 Nov 2010 13:54:02 -0500 From: Peter Maydell Date: Tue, 23 Nov 2010 18:53:40 +0000 Message-Id: <1290538431-13170-2-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1290538431-13170-1-git-send-email-peter.maydell@linaro.org> References: <1290538431-13170-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 01/12] target-arm: Add support for PKHxx in thumb2 List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori , qemu-devel@nongnu.org From: Johan Bengtsson The PKHxx instructions were not recognized by the thumb2 decoder. The solution provided in this changeset is identical to the arm-mode implementation. Signed-off-by: Johan Bengtsson Signed-off-by: Peter Maydell --- target-arm/translate.c | 63 ++++++++++++++++++++++++++++++++++------------- 1 files changed, 45 insertions(+), 18 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 99464ab..183928b 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7601,27 +7601,54 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1) } } break; - case 5: /* Data processing register constant shift. */ - if (rn == 15) { - tmp = new_tmp(); - tcg_gen_movi_i32(tmp, 0); - } else { - tmp = load_reg(s, rn); - } - tmp2 = load_reg(s, rm); + case 5: + op = (insn >> 21) & 0xf; - shiftop = (insn >> 4) & 3; - shift = ((insn >> 6) & 3) | ((insn >> 10) & 0x1c); - conds = (insn & (1 << 20)) != 0; - logic_cc = (conds && thumb2_logic_op(op)); - gen_arm_shift_im(tmp2, shiftop, shift, logic_cc); - if (gen_thumb2_data_op(s, op, conds, 0, tmp, tmp2)) - goto illegal_op; - dead_tmp(tmp2); - if (rd != 15) { + if (op == 6) { + /* Halfword pack. */ + tmp = load_reg(s, rn); + tmp2 = load_reg(s, rm); + shift = ((insn >> 10) & 0x1c) | ((insn >> 6) & 0x3); + if (insn & (1 << 5)) { + /* pkhtb */ + if (shift == 0) + shift = 31; + tcg_gen_sari_i32(tmp2, tmp2, shift); + tcg_gen_andi_i32(tmp, tmp, 0xffff0000); + tcg_gen_ext16u_i32(tmp2, tmp2); + } else { + /* pkhbt */ + if (shift) + tcg_gen_shli_i32(tmp2, tmp2, shift); + tcg_gen_ext16u_i32(tmp, tmp); + tcg_gen_andi_i32(tmp2, tmp2, 0xffff0000); + } + tcg_gen_or_i32(tmp, tmp, tmp2); + dead_tmp(tmp2); store_reg(s, rd, tmp); } else { - dead_tmp(tmp); + /* Data processing register constant shift. */ + if (rn == 15) { + tmp = new_tmp(); + tcg_gen_movi_i32(tmp, 0); + } else { + tmp = load_reg(s, rn); + } + tmp2 = load_reg(s, rm); + + shiftop = (insn >> 4) & 3; + shift = ((insn >> 6) & 3) | ((insn >> 10) & 0x1c); + conds = (insn & (1 << 20)) != 0; + logic_cc = (conds && thumb2_logic_op(op)); + gen_arm_shift_im(tmp2, shiftop, shift, logic_cc); + if (gen_thumb2_data_op(s, op, conds, 0, tmp, tmp2)) + goto illegal_op; + dead_tmp(tmp2); + if (rd != 15) { + store_reg(s, rd, tmp); + } else { + dead_tmp(tmp); + } } break; case 13: /* Misc data processing. */ -- 1.6.3.3