From: Peter Maydell <peter.maydell@linaro.org>
To: Anthony Liguori <anthony@codemonkey.ws>, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 01/14] target-arm: Add support for PKHxx in thumb2
Date: Tue, 7 Dec 2010 15:43:30 +0000 [thread overview]
Message-ID: <1291736623-3695-2-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1291736623-3695-1-git-send-email-peter.maydell@linaro.org>
From: Johan Bengtsson <teofrastius@gmail.com>
The PKHxx instructions were not recognized by the thumb2 decoder. The
solution provided in this changeset is identical to the arm-mode
implementation.
Signed-off-by: Johan Bengtsson <teofrastius@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
---
target-arm/translate.c | 63 ++++++++++++++++++++++++++++++++++-------------
1 files changed, 45 insertions(+), 18 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 99464ab..183928b 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7601,27 +7601,54 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
}
}
break;
- case 5: /* Data processing register constant shift. */
- if (rn == 15) {
- tmp = new_tmp();
- tcg_gen_movi_i32(tmp, 0);
- } else {
- tmp = load_reg(s, rn);
- }
- tmp2 = load_reg(s, rm);
+ case 5:
+
op = (insn >> 21) & 0xf;
- shiftop = (insn >> 4) & 3;
- shift = ((insn >> 6) & 3) | ((insn >> 10) & 0x1c);
- conds = (insn & (1 << 20)) != 0;
- logic_cc = (conds && thumb2_logic_op(op));
- gen_arm_shift_im(tmp2, shiftop, shift, logic_cc);
- if (gen_thumb2_data_op(s, op, conds, 0, tmp, tmp2))
- goto illegal_op;
- dead_tmp(tmp2);
- if (rd != 15) {
+ if (op == 6) {
+ /* Halfword pack. */
+ tmp = load_reg(s, rn);
+ tmp2 = load_reg(s, rm);
+ shift = ((insn >> 10) & 0x1c) | ((insn >> 6) & 0x3);
+ if (insn & (1 << 5)) {
+ /* pkhtb */
+ if (shift == 0)
+ shift = 31;
+ tcg_gen_sari_i32(tmp2, tmp2, shift);
+ tcg_gen_andi_i32(tmp, tmp, 0xffff0000);
+ tcg_gen_ext16u_i32(tmp2, tmp2);
+ } else {
+ /* pkhbt */
+ if (shift)
+ tcg_gen_shli_i32(tmp2, tmp2, shift);
+ tcg_gen_ext16u_i32(tmp, tmp);
+ tcg_gen_andi_i32(tmp2, tmp2, 0xffff0000);
+ }
+ tcg_gen_or_i32(tmp, tmp, tmp2);
+ dead_tmp(tmp2);
store_reg(s, rd, tmp);
} else {
- dead_tmp(tmp);
+ /* Data processing register constant shift. */
+ if (rn == 15) {
+ tmp = new_tmp();
+ tcg_gen_movi_i32(tmp, 0);
+ } else {
+ tmp = load_reg(s, rn);
+ }
+ tmp2 = load_reg(s, rm);
+
+ shiftop = (insn >> 4) & 3;
+ shift = ((insn >> 6) & 3) | ((insn >> 10) & 0x1c);
+ conds = (insn & (1 << 20)) != 0;
+ logic_cc = (conds && thumb2_logic_op(op));
+ gen_arm_shift_im(tmp2, shiftop, shift, logic_cc);
+ if (gen_thumb2_data_op(s, op, conds, 0, tmp, tmp2))
+ goto illegal_op;
+ dead_tmp(tmp2);
+ if (rd != 15) {
+ store_reg(s, rd, tmp);
+ } else {
+ dead_tmp(tmp);
+ }
}
break;
case 13: /* Misc data processing. */
--
1.6.3.3
next prev parent reply other threads:[~2010-12-07 15:44 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-07 15:43 [Qemu-devel] [PATCH 00/14] [PULL] ARM fixes, v2 Peter Maydell
2010-12-07 15:43 ` Peter Maydell [this message]
2010-12-07 15:43 ` [Qemu-devel] [PATCH 02/14] target-arm: Fix mixup in decoding of saturating add and sub Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 03/14] target-arm: Handle 'smc' as an undefined instruction Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 04/14] ARM: fix ldrexd/strexd Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 05/14] ARM: Fix decoding of VFP forms of VCVT between float and int/fixed Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 06/14] ARM: Fix decoding of Neon forms of VCVT between float and fixed point Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 07/14] ARM: Fix sense of to_integer bit in Neon VCVT float/int conversion Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 08/14] softfloat: Add float*_is_any_nan() functions Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 09/14] ARM: Return correct result for float-to-integer conversion of NaN Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 10/14] softfloat: Add float*_maybe_silence_nan() functions Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 11/14] ARM: Return correct result for single<->double conversion of NaN Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 12/14] ARM: Ignore top 16 bits when doing VCVT from 16 bit fixed point Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 13/14] softfloat: Add float/double to 16 bit integer conversion functions Peter Maydell
2010-12-07 15:43 ` [Qemu-devel] [PATCH 14/14] ARM: Implement VCVT to 16 bit integer using new softfloat routines Peter Maydell
2010-12-07 15:50 ` [Qemu-devel] [PATCH 00/14] [PULL] ARM fixes, v2 Peter Maydell
2010-12-16 18:07 ` Peter Maydell
2010-12-17 14:49 ` Anthony Liguori
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1291736623-3695-2-git-send-email-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=anthony@codemonkey.ws \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).