From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=42297 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PZnAa-0001F9-00 for qemu-devel@nongnu.org; Mon, 03 Jan 2011 11:22:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PZn9U-0005re-SZ for qemu-devel@nongnu.org; Mon, 03 Jan 2011 11:20:58 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:5668) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PZn9U-0005pJ-L6 for qemu-devel@nongnu.org; Mon, 03 Jan 2011 11:20:56 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.69) (envelope-from ) id 1PZn9M-0000Zg-Aq for qemu-devel@nongnu.org; Mon, 03 Jan 2011 16:20:48 +0000 From: Peter Maydell Date: Mon, 3 Jan 2011 16:20:47 +0000 Message-Id: <1294071648-2182-2-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1294071648-2182-1-git-send-email-peter.maydell@linaro.org> References: <1294071648-2182-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH 1/2] ARM: add neon helpers for VQSHLU List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Add neon helper functions to implement VQSHLU, which is a signed-to-unsigned version of VQSHL available only as an immediate form. Signed-off-by: Juha Riihimäki Reviewed-by: Peter Maydell --- target-arm/helpers.h | 4 +++ target-arm/neon_helper.c | 47 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+), 0 deletions(-) diff --git a/target-arm/helpers.h b/target-arm/helpers.h index 0d1bc47..b88ebae 100644 --- a/target-arm/helpers.h +++ b/target-arm/helpers.h @@ -249,6 +249,10 @@ DEF_HELPER_3(neon_qshl_u32, i32, env, i32, i32) DEF_HELPER_3(neon_qshl_s32, i32, env, i32, i32) DEF_HELPER_3(neon_qshl_u64, i64, env, i64, i64) DEF_HELPER_3(neon_qshl_s64, i64, env, i64, i64) +DEF_HELPER_3(neon_qshlu_s8, i32, env, i32, i32); +DEF_HELPER_3(neon_qshlu_s16, i32, env, i32, i32); +DEF_HELPER_3(neon_qshlu_s32, i32, env, i32, i32); +DEF_HELPER_3(neon_qshlu_s64, i64, env, i64, i64); DEF_HELPER_3(neon_qrshl_u8, i32, env, i32, i32) DEF_HELPER_3(neon_qrshl_s8, i32, env, i32, i32) DEF_HELPER_3(neon_qrshl_u16, i32, env, i32, i32) diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index dae063e..20f3c16 100644 --- a/target-arm/neon_helper.c +++ b/target-arm/neon_helper.c @@ -632,6 +632,53 @@ uint64_t HELPER(neon_qshl_s64)(CPUState *env, uint64_t valop, uint64_t shiftop) return val; } +#define NEON_FN(dest, src1, src2) do { \ + if (src1 & (1 << (sizeof(src1) * 8 - 1))) { \ + SET_QC(); \ + dest = 0; \ + } else { \ + int8_t tmp; \ + tmp = (int8_t)src2; \ + if (tmp >= (ssize_t)sizeof(src1) * 8) { \ + if (src1) { \ + SET_QC(); \ + dest = ~0; \ + } else { \ + dest = 0; \ + } \ + } else if (tmp <= -(ssize_t)sizeof(src1) * 8) { \ + dest = 0; \ + } else if (tmp < 0) { \ + dest = src1 >> -tmp; \ + } else { \ + dest = src1 << tmp; \ + if ((dest >> tmp) != src1) { \ + SET_QC(); \ + dest = ~0; \ + } \ + } \ + }} while (0) +NEON_VOP_ENV(qshlu_s8, neon_u8, 4) +NEON_VOP_ENV(qshlu_s16, neon_u16, 2) +#undef NEON_FN + +uint32_t HELPER(neon_qshlu_s32)(CPUState *env, uint32_t valop, uint32_t shiftop) +{ + if ((int32_t)valop < 0) { + SET_QC(); + return 0; + } + return helper_neon_qshl_u32(env, valop, shiftop); +} + +uint64_t HELPER(neon_qshlu_s64)(CPUState *env, uint64_t valop, uint64_t shiftop) +{ + if ((int64_t)valop < 0) { + SET_QC(); + return 0; + } + return helper_neon_qshl_u64(env, valop, shiftop); +} /* FIXME: This is wrong. */ #define NEON_FN(dest, src1, src2) do { \ -- 1.6.3.3