* [Qemu-devel] [PATCH] softfloat: Fix function signature mismatches by using POSIX integer types @ 2010-12-17 17:31 Andreas Färber 2010-12-17 22:39 ` [Qemu-devel] [PATCH v2] " Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2010-12-17 17:31 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Michael Lotz Don't reinvent C99 types like uint8_t by typedef'ing uint8 etc. On BeOS and Haiku, system headers {be,os}/support/SupportDefs.h do define [u]int{8,16,32,64}, but they define [u]int32 as long, so assumptions that int32 and int can be used interchangeably must be avoided. Inspired by mmlr's original port to Haiku. Fix stray occurrences of softfloat-internal types outside fpu/. Cc: Michael Lotz <mmlr@mlotz.ch> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- Available for testing from: git://repo.or.cz/qemu/afaerber.git softfloat fpu/softfloat-macros.h | 44 +++--- fpu/softfloat-specialize.h | 2 +- fpu/softfloat.c | 352 ++++++++++++++++++++++---------------------- fpu/softfloat.h | 55 +++----- hw/apic.c | 2 +- hw/wdt_ib700.c | 2 +- target-i386/cpu.h | 8 +- 7 files changed, 226 insertions(+), 239 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index 7838228..d635779 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -39,7 +39,7 @@ these four paragraphs for those parts of this code that are retained. | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) +INLINE void shift32RightJamming( bits32 a, int16_t count, bits32 *zPtr ) { bits32 z; @@ -65,7 +65,7 @@ INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) +INLINE void shift64RightJamming( bits64 a, int16_t count, bits64 *zPtr ) { bits64 z; @@ -101,10 +101,10 @@ INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) INLINE void shift64ExtraRightJamming( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + bits64 a0, bits64 a1, int16_t count, bits64 *z0Ptr, bits64 *z1Ptr ) { bits64 z0, z1; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -138,10 +138,10 @@ INLINE void INLINE void shift128Right( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + bits64 a0, bits64 a1, int16_t count, bits64 *z0Ptr, bits64 *z1Ptr ) { bits64 z0, z1; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -173,10 +173,10 @@ INLINE void INLINE void shift128RightJamming( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + bits64 a0, bits64 a1, int16_t count, bits64 *z0Ptr, bits64 *z1Ptr ) { bits64 z0, z1; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -227,14 +227,14 @@ INLINE void bits64 a0, bits64 a1, bits64 a2, - int16 count, + int16_t count, bits64 *z0Ptr, bits64 *z1Ptr, bits64 *z2Ptr ) { bits64 z0, z1, z2; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z2 = a2; @@ -282,7 +282,7 @@ INLINE void INLINE void shortShift128Left( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + bits64 a0, bits64 a1, int16_t count, bits64 *z0Ptr, bits64 *z1Ptr ) { *z1Ptr = a1<<count; @@ -304,14 +304,14 @@ INLINE void bits64 a0, bits64 a1, bits64 a2, - int16 count, + int16_t count, bits64 *z0Ptr, bits64 *z1Ptr, bits64 *z2Ptr ) { bits64 z0, z1, z2; - int8 negCount; + int8_t negCount; z2 = a2<<count; z1 = a1<<count; @@ -368,7 +368,7 @@ INLINE void ) { bits64 z0, z1, z2; - int8 carry0, carry1; + int8_t carry0, carry1; z2 = a2 + b2; carry1 = ( z2 < a2 ); @@ -424,7 +424,7 @@ INLINE void ) { bits64 z0, z1, z2; - int8 borrow0, borrow1; + int8_t borrow0, borrow1; z2 = a2 - b2; borrow1 = ( a2 < b2 ); @@ -575,7 +575,7 @@ static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b ) | value. *----------------------------------------------------------------------------*/ -static bits32 estimateSqrt32( int16 aExp, bits32 a ) +static bits32 estimateSqrt32( int16_t aExp, bits32 a ) { static const bits16 sqrtOddAdjustments[] = { 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, @@ -585,7 +585,7 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) 0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E, 0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002 }; - int8 index; + int8_t index; bits32 z; index = ( a>>27 ) & 15; @@ -609,9 +609,9 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) | `a'. If `a' is zero, 32 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros32( bits32 a ) +static int8_t countLeadingZeros32( bits32 a ) { - static const int8 countLeadingZerosHigh[] = { + static const int8_t countLeadingZerosHigh[] = { 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, @@ -629,7 +629,7 @@ static int8 countLeadingZeros32( bits32 a ) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - int8 shiftCount; + int8_t shiftCount; shiftCount = 0; if ( a < 0x10000 ) { @@ -650,9 +650,9 @@ static int8 countLeadingZeros32( bits32 a ) | `a'. If `a' is zero, 64 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros64( bits64 a ) +static int8_t countLeadingZeros64( bits64 a ) { - int8 shiftCount; + int8_t shiftCount; shiftCount = 0; if ( a < ( (bits64) 1 )<<32 ) { diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 8e6aceb..f5d3ec2 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -43,7 +43,7 @@ these four paragraphs for those parts of this code that are retained. | should be simply `float_exception_flags |= flags;'. *----------------------------------------------------------------------------*/ -void float_raise( int8 flags STATUS_PARAM ) +void float_raise( int8_t flags STATUS_PARAM ) { STATUS(float_exception_flags) |= flags; } diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 0b82797..9ebc1b2 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -79,12 +79,12 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM) | positive or negative integer is returned. *----------------------------------------------------------------------------*/ -static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) +static int32_t roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven; - int8 roundIncrement, roundBits; - int32 z; + int8_t roundIncrement, roundBits; + int32_t z; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -129,11 +129,11 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) | returned. *----------------------------------------------------------------------------*/ -static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM) +static int64_t roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven, increment; - int64 z; + int64_t z; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -185,7 +185,7 @@ INLINE bits32 extractFloat32Frac( float32 a ) | Returns the exponent bits of the single-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat32Exp( float32 a ) +INLINE int16_t extractFloat32Exp( float32 a ) { return ( float32_val(a)>>23 ) & 0xFF; @@ -211,9 +211,9 @@ INLINE flag extractFloat32Sign( float32 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr ) + normalizeFloat32Subnormal( bits32 aSig, int16_t *zExpPtr, bits32 *zSigPtr ) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros32( aSig ) - 8; *zSigPtr = aSig<<shiftCount; @@ -232,7 +232,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) +INLINE float32 packFloat32( flag zSign, int16_t zExp, bits32 zSig ) { return make_float32( @@ -262,11 +262,11 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) +static float32 roundAndPackFloat32( flag zSign, int16_t zExp, bits32 zSig STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven; - int8 roundIncrement, roundBits; + int8_t roundIncrement, roundBits; flag isTiny; roundingMode = STATUS(float_rounding_mode); @@ -325,9 +325,9 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_P *----------------------------------------------------------------------------*/ static float32 - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) + normalizeRoundAndPackFloat32( flag zSign, int16_t zExp, bits32 zSig STATUS_PARAM) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros32( zSig ) - 1; return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR); @@ -349,7 +349,7 @@ INLINE bits64 extractFloat64Frac( float64 a ) | Returns the exponent bits of the double-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat64Exp( float64 a ) +INLINE int16_t extractFloat64Exp( float64 a ) { return ( float64_val(a)>>52 ) & 0x7FF; @@ -375,9 +375,9 @@ INLINE flag extractFloat64Sign( float64 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr ) + normalizeFloat64Subnormal( bits64 aSig, int16_t *zExpPtr, bits64 *zSigPtr ) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros64( aSig ) - 11; *zSigPtr = aSig<<shiftCount; @@ -396,7 +396,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) +INLINE float64 packFloat64( flag zSign, int16_t zExp, bits64 zSig ) { return make_float64( @@ -426,11 +426,11 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) +static float64 roundAndPackFloat64( flag zSign, int16_t zExp, bits64 zSig STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven; - int16 roundIncrement, roundBits; + int16_t roundIncrement, roundBits; flag isTiny; roundingMode = STATUS(float_rounding_mode); @@ -489,9 +489,9 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_P *----------------------------------------------------------------------------*/ static float64 - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) + normalizeRoundAndPackFloat64( flag zSign, int16_t zExp, bits64 zSig STATUS_PARAM) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros64( zSig ) - 1; return roundAndPackFloat64( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR); @@ -517,7 +517,7 @@ INLINE bits64 extractFloatx80Frac( floatx80 a ) | value `a'. *----------------------------------------------------------------------------*/ -INLINE int32 extractFloatx80Exp( floatx80 a ) +INLINE int32_t extractFloatx80Exp( floatx80 a ) { return a.high & 0x7FFF; @@ -544,9 +544,9 @@ INLINE flag extractFloatx80Sign( floatx80 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr ) + normalizeFloatx80Subnormal( bits64 aSig, int32_t *zExpPtr, bits64 *zSigPtr ) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros64( aSig ); *zSigPtr = aSig<<shiftCount; @@ -559,7 +559,7 @@ static void | extended double-precision floating-point value, returning the result. *----------------------------------------------------------------------------*/ -INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) +INLINE floatx80 packFloatx80( flag zSign, int32_t zExp, bits64 zSig ) { floatx80 z; @@ -595,12 +595,12 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) static floatx80 roundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 + int8_t roundingPrecision, flag zSign, int32_t zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven, increment, isTiny; - int64 roundIncrement, roundMask, roundBits; + int64_t roundIncrement, roundMask, roundBits; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -764,10 +764,10 @@ static floatx80 static floatx80 normalizeRoundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 + int8_t roundingPrecision, flag zSign, int32_t zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) { - int8 shiftCount; + int8_t shiftCount; if ( zSig0 == 0 ) { zSig0 = zSig1; @@ -815,7 +815,7 @@ INLINE bits64 extractFloat128Frac0( float128 a ) | `a'. *----------------------------------------------------------------------------*/ -INLINE int32 extractFloat128Exp( float128 a ) +INLINE int32_t extractFloat128Exp( float128 a ) { return ( a.high>>48 ) & 0x7FFF; @@ -847,12 +847,12 @@ static void normalizeFloat128Subnormal( bits64 aSig0, bits64 aSig1, - int32 *zExpPtr, + int32_t *zExpPtr, bits64 *zSig0Ptr, bits64 *zSig1Ptr ) { - int8 shiftCount; + int8_t shiftCount; if ( aSig0 == 0 ) { shiftCount = countLeadingZeros64( aSig1 ) - 15; @@ -888,7 +888,7 @@ static void *----------------------------------------------------------------------------*/ INLINE float128 - packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 ) + packFloat128( flag zSign, int32_t zExp, bits64 zSig0, bits64 zSig1 ) { float128 z; @@ -921,9 +921,9 @@ INLINE float128 static float128 roundAndPackFloat128( - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 STATUS_PARAM) + flag zSign, int32_t zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven, increment, isTiny; roundingMode = STATUS(float_rounding_mode); @@ -1022,9 +1022,9 @@ static float128 static float128 normalizeRoundAndPackFloat128( - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) + flag zSign, int32_t zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) { - int8 shiftCount; + int8_t shiftCount; bits64 zSig2; if ( zSig0 == 0 ) { @@ -1054,7 +1054,7 @@ static float128 | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float32 int32_to_float32( int32 a STATUS_PARAM ) +float32 int32_to_float32( int32_t a STATUS_PARAM ) { flag zSign; @@ -1071,11 +1071,11 @@ float32 int32_to_float32( int32 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float64 int32_to_float64( int32 a STATUS_PARAM ) +float64 int32_to_float64( int32_t a STATUS_PARAM ) { flag zSign; - uint32 absA; - int8 shiftCount; + uint32_t absA; + int8_t shiftCount; bits64 zSig; if ( a == 0 ) return float64_zero; @@ -1096,11 +1096,11 @@ float64 int32_to_float64( int32 a STATUS_PARAM ) | Arithmetic. *----------------------------------------------------------------------------*/ -floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) +floatx80 int32_to_floatx80( int32_t a STATUS_PARAM ) { flag zSign; - uint32 absA; - int8 shiftCount; + uint32_t absA; + int8_t shiftCount; bits64 zSig; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); @@ -1122,11 +1122,11 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float128 int32_to_float128( int32 a STATUS_PARAM ) +float128 int32_to_float128( int32_t a STATUS_PARAM ) { flag zSign; - uint32 absA; - int8 shiftCount; + uint32_t absA; + int8_t shiftCount; bits64 zSig0; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); @@ -1146,11 +1146,11 @@ float128 int32_to_float128( int32 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float32 int64_to_float32( int64 a STATUS_PARAM ) +float32 int64_to_float32( int64_t a STATUS_PARAM ) { flag zSign; - uint64 absA; - int8 shiftCount; + uint64_t absA; + int8_t shiftCount; if ( a == 0 ) return float32_zero; zSign = ( a < 0 ); @@ -1172,9 +1172,9 @@ float32 int64_to_float32( int64 a STATUS_PARAM ) } -float32 uint64_to_float32( uint64 a STATUS_PARAM ) +float32 uint64_to_float32( uint64_t a STATUS_PARAM ) { - int8 shiftCount; + int8_t shiftCount; if ( a == 0 ) return float32_zero; shiftCount = countLeadingZeros64( a ) - 40; @@ -1199,7 +1199,7 @@ float32 uint64_to_float32( uint64 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float64 int64_to_float64( int64 a STATUS_PARAM ) +float64 int64_to_float64( int64_t a STATUS_PARAM ) { flag zSign; @@ -1212,7 +1212,7 @@ float64 int64_to_float64( int64 a STATUS_PARAM ) } -float64 uint64_to_float64( uint64 a STATUS_PARAM ) +float64 uint64_to_float64( uint64_t a STATUS_PARAM ) { if ( a == 0 ) return float64_zero; return normalizeRoundAndPackFloat64( 0, 0x43C, a STATUS_VAR ); @@ -1228,11 +1228,11 @@ float64 uint64_to_float64( uint64 a STATUS_PARAM ) | Arithmetic. *----------------------------------------------------------------------------*/ -floatx80 int64_to_floatx80( int64 a STATUS_PARAM ) +floatx80 int64_to_floatx80( int64_t a STATUS_PARAM ) { flag zSign; - uint64 absA; - int8 shiftCount; + uint64_t absA; + int8_t shiftCount; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); zSign = ( a < 0 ); @@ -1252,12 +1252,12 @@ floatx80 int64_to_floatx80( int64 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float128 int64_to_float128( int64 a STATUS_PARAM ) +float128 int64_to_float128( int64_t a STATUS_PARAM ) { flag zSign; - uint64 absA; - int8 shiftCount; - int32 zExp; + uint64_t absA; + int8_t shiftCount; + int32_t zExp; bits64 zSig0, zSig1; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); @@ -1291,10 +1291,10 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 float32_to_int32( float32 a STATUS_PARAM ) +int32_t float32_to_int32( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits32 aSig; bits64 aSig64; @@ -1321,12 +1321,12 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) +int32_t float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits32 aSig; - int32 z; + int32_t z; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1363,10 +1363,10 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 float32_to_int64( float32 a STATUS_PARAM ) +int64_t float32_to_int64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits32 aSig; bits64 aSig64, aSigExtra; @@ -1399,13 +1399,13 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) +int64_t float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits32 aSig; bits64 aSig64; - int64 z; + int64_t z; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1445,7 +1445,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) float64 float32_to_float64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; aSig = extractFloat32Frac( a ); @@ -1476,7 +1476,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; aSig = extractFloat32Frac( a ); @@ -1509,7 +1509,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) float128 float32_to_float128( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; aSig = extractFloat32Frac( a ); @@ -1540,9 +1540,9 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) float32 float32_round_to_int( float32 a STATUS_PARAM) { flag aSign; - int16 aExp; + int16_t aExp; bits32 lastBitMask, roundBitsMask; - int8 roundingMode; + int8_t roundingMode; bits32 z; aExp = extractFloat32Exp( a ); @@ -1599,9 +1599,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits32 aSig, bSig, zSig; - int16 expDiff; + int16_t expDiff; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1673,9 +1673,9 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits32 aSig, bSig, zSig; - int16 expDiff; + int16_t expDiff; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1789,7 +1789,7 @@ float32 float32_sub( float32 a, float32 b STATUS_PARAM ) float32 float32_mul( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits32 aSig, bSig; bits64 zSig64; bits32 zSig; @@ -1849,7 +1849,7 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) float32 float32_div( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits32 aSig, bSig, zSig; aSig = extractFloat32Frac( a ); @@ -1911,7 +1911,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) float32 float32_rem( float32 a, float32 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int16_t aExp, bExp, expDiff; bits32 aSig, bSig; bits32 q; bits64 aSig64, bSig64, q64; @@ -2010,7 +2010,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) float32 float32_sqrt( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int16_t aExp, zExp; bits32 aSig, zSig; bits64 rem, term; @@ -2095,7 +2095,7 @@ static const float64 float32_exp2_coefficients[15] = float32 float32_exp2( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; float64 r, x, xn; int i; @@ -2142,7 +2142,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) float32 float32_log2( float32 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int16_t aExp; bits32 aSig, zSig, i; aSig = extractFloat32Frac( a ); @@ -2347,10 +2347,10 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 float64_to_int32( float64 a STATUS_PARAM ) +int32_t float64_to_int32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits64 aSig; aSig = extractFloat64Frac( a ); @@ -2374,12 +2374,12 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) +int32_t float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits64 aSig, savedASig; - int32 z; + int32_t z; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2420,10 +2420,10 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 float64_to_int64( float64 a STATUS_PARAM ) +int64_t float64_to_int64( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits64 aSig, aSigExtra; aSig = extractFloat64Frac( a ); @@ -2462,12 +2462,12 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) +int64_t float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits64 aSig; - int64 z; + int64_t z; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2514,7 +2514,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) float32 float64_to_float32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig; bits32 zSig; @@ -2546,7 +2546,7 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) | than the desired result exponent whenever `zSig' is a complete, normalized | significand. *----------------------------------------------------------------------------*/ -static bits16 packFloat16(flag zSign, int16 zExp, bits16 zSig) +static bits16 packFloat16(flag zSign, int16_t zExp, bits16 zSig) { return (((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig; } @@ -2557,7 +2557,7 @@ static bits16 packFloat16(flag zSign, int16 zExp, bits16 zSig) float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; aSign = a >> 15; @@ -2573,7 +2573,7 @@ float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM ) return packFloat32(aSign, 0xff, aSig << 13); } if (aExp == 0) { - int8 shiftCount; + int8_t shiftCount; if (aSig == 0) { return packFloat32(aSign, 0, 0); @@ -2589,11 +2589,11 @@ float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM ) bits16 float32_to_float16( float32 a, flag ieee STATUS_PARAM) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; bits32 mask; bits32 increment; - int8 roundingMode; + int8_t roundingMode; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -2685,7 +2685,7 @@ bits16 float32_to_float16( float32 a, flag ieee STATUS_PARAM) floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig; aSig = extractFloat64Frac( a ); @@ -2719,7 +2719,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) float128 float64_to_float128( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); @@ -2751,9 +2751,9 @@ float128 float64_to_float128( float64 a STATUS_PARAM ) float64 float64_round_to_int( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 lastBitMask, roundBitsMask; - int8 roundingMode; + int8_t roundingMode; bits64 z; aExp = extractFloat64Exp( a ); @@ -2823,9 +2823,9 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM) static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits64 aSig, bSig, zSig; - int16 expDiff; + int16_t expDiff; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2897,9 +2897,9 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits64 aSig, bSig, zSig; - int16 expDiff; + int16_t expDiff; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3013,7 +3013,7 @@ float64 float64_sub( float64 a, float64 b STATUS_PARAM ) float64 float64_mul( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits64 aSig, bSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); @@ -3071,7 +3071,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) float64 float64_div( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits64 aSig, bSig, zSig; bits64 rem0, rem1; bits64 term0, term1; @@ -3141,7 +3141,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) float64 float64_rem( float64 a, float64 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int16_t aExp, bExp, expDiff; bits64 aSig, bSig; bits64 q, alternateASig; sbits64 sigMean; @@ -3225,7 +3225,7 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) float64 float64_sqrt( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int16_t aExp, zExp; bits64 aSig, zSig, doubleZSig; bits64 rem0, rem1, term0, term1; @@ -3275,7 +3275,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) float64 float64_log2( float64 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int16_t aExp; bits64 aSig, aSig0, aSig1, zSig, i; aSig = extractFloat64Frac( a ); @@ -3483,10 +3483,10 @@ int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) | overflows, the largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) +int32_t floatx80_to_int32( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig; aSig = extractFloatx80Frac( a ); @@ -3510,12 +3510,12 @@ int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) | sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) +int32_t floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig, savedASig; - int32 z; + int32_t z; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -3555,10 +3555,10 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) | overflows, the largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) +int64_t floatx80_to_int64( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig, aSigExtra; aSig = extractFloatx80Frac( a ); @@ -3595,12 +3595,12 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) | sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) +int64_t floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig; - int64 z; + int64_t z; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -3639,7 +3639,7 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig; aSig = extractFloatx80Frac( a ); @@ -3667,7 +3667,7 @@ float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig, zSig; aSig = extractFloatx80Frac( a ); @@ -3697,7 +3697,7 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig, zSig0, zSig1; aSig = extractFloatx80Frac( a ); @@ -3723,9 +3723,9 @@ float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 lastBitMask, roundBitsMask; - int8 roundingMode; + int8_t roundingMode; floatx80 z; aExp = extractFloatx80Exp( a ); @@ -3796,9 +3796,9 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM) { - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig, bSig, zSig0, zSig1; - int32 expDiff; + int32_t expDiff; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -3862,9 +3862,9 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM ) { - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig, bSig, zSig0, zSig1; - int32 expDiff; + int32_t expDiff; floatx80 z; aSig = extractFloatx80Frac( a ); @@ -3971,7 +3971,7 @@ floatx80 floatx80_sub( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig, bSig, zSig0, zSig1; floatx80 z; @@ -4030,7 +4030,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig, bSig, zSig0, zSig1; bits64 rem0, rem1, rem2, term0, term1, term2; floatx80 z; @@ -4110,7 +4110,7 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, zSign; - int32 aExp, bExp, expDiff; + int32_t aExp, bExp, expDiff; bits64 aSig0, aSig1, bSig; bits64 q, term0, term1, alternateASig0, alternateASig1; floatx80 z; @@ -4206,7 +4206,7 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, zExp; + int32_t aExp, zExp; bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0; bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; floatx80 z; @@ -4476,10 +4476,10 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 float128_to_int32( float128 a STATUS_PARAM ) +int32_t float128_to_int32( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4505,12 +4505,12 @@ int32 float128_to_int32( float128 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) +int32_t float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig0, aSig1, savedASig; - int32 z; + int32_t z; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4553,10 +4553,10 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 float128_to_int64( float128 a STATUS_PARAM ) +int64_t float128_to_int64( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4596,12 +4596,12 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) +int64_t float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig0, aSig1; - int64 z; + int64_t z; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4657,7 +4657,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) float32 float128_to_float32( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig0, aSig1; bits32 zSig; @@ -4692,7 +4692,7 @@ float32 float128_to_float32( float128 a STATUS_PARAM ) float64 float128_to_float64( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4727,7 +4727,7 @@ float64 float128_to_float64( float128 a STATUS_PARAM ) floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4764,9 +4764,9 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) float128 float128_round_to_int( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 lastBitMask, roundBitsMask; - int8 roundingMode; + int8_t roundingMode; float128 z; aExp = extractFloat128Exp( a ); @@ -4867,9 +4867,9 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; - int32 expDiff; + int32_t expDiff; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4948,9 +4948,9 @@ static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM static float128 subFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; - int32 expDiff; + int32_t expDiff; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5073,7 +5073,7 @@ float128 float128_sub( float128 a, float128 b STATUS_PARAM ) float128 float128_mul( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; float128 z; @@ -5137,7 +5137,7 @@ float128 float128_mul( float128 a, float128 b STATUS_PARAM ) float128 float128_div( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; @@ -5221,7 +5221,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) float128 float128_rem( float128 a, float128 b STATUS_PARAM ) { flag aSign, zSign; - int32 aExp, bExp, expDiff; + int32_t aExp, bExp, expDiff; bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; bits64 allZero, alternateASig0, alternateASig1, sigMean1; sbits64 sigMean0; @@ -5330,7 +5330,7 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) float128 float128_sqrt( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, zExp; + int32_t aExp, zExp; bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; @@ -5586,17 +5586,17 @@ int float128_lt_quiet( float128 a, float128 b STATUS_PARAM ) #endif /* misc functions */ -float32 uint32_to_float32( unsigned int a STATUS_PARAM ) +float32 uint32_to_float32( uint32_t a STATUS_PARAM ) { return int64_to_float32(a STATUS_VAR); } -float64 uint32_to_float64( unsigned int a STATUS_PARAM ) +float64 uint32_to_float64( uint32_t a STATUS_PARAM ) { return int64_to_float64(a STATUS_VAR); } -unsigned int float32_to_uint32( float32 a STATUS_PARAM ) +uint32_t float32_to_uint32( float32 a STATUS_PARAM ) { int64_t v; unsigned int res; @@ -5614,7 +5614,7 @@ unsigned int float32_to_uint32( float32 a STATUS_PARAM ) return res; } -unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) +uint32_t float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) { int64_t v; unsigned int res; @@ -5632,7 +5632,7 @@ unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) return res; } -unsigned int float64_to_uint32( float64 a STATUS_PARAM ) +uint32_t float64_to_uint32( float64 a STATUS_PARAM ) { int64_t v; unsigned int res; @@ -5650,7 +5650,7 @@ unsigned int float64_to_uint32( float64 a STATUS_PARAM ) return res; } -unsigned int float64_to_uint32_round_to_zero( float64 a STATUS_PARAM ) +uint32_t float64_to_uint32_round_to_zero( float64 a STATUS_PARAM ) { int64_t v; unsigned int res; @@ -5790,7 +5790,7 @@ int float128_compare_quiet( float128 a, float128 b STATUS_PARAM ) float32 float32_scalbn( float32 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; aSig = extractFloat32Frac( a ); @@ -5813,7 +5813,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM ) float64 float64_scalbn( float64 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig; aSig = extractFloat64Frac( a ); @@ -5837,7 +5837,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM ) floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig; aSig = extractFloatx80Frac( a ); @@ -5860,7 +5860,7 @@ floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) float128 float128_scalbn( float128 a, int n STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 9528825..8f0dfbd 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -41,23 +41,10 @@ these four paragraphs for those parts of this code that are retained. /*---------------------------------------------------------------------------- | Each of the following `typedef's defines the most convenient type that holds -| integers of at least as many bits as specified. For example, `uint8' should -| be the most convenient type that can hold unsigned integers of as many as -| 8 bits. The `flag' type must be able to hold either a 0 or 1. For most -| implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed -| to the same as `int'. +| integers of at least as many bits as specified. +| The `flag' type must be able to hold either a 0 or 1. *----------------------------------------------------------------------------*/ typedef uint8_t flag; -typedef uint8_t uint8; -typedef int8_t int8; -#ifndef _AIX -typedef int uint16; -typedef int int16; -#endif -typedef unsigned int uint32; -typedef signed int int32; -typedef uint64_t uint64; -typedef int64_t int64; /*---------------------------------------------------------------------------- | Each of the following `typedef's defines a type that holds integers @@ -216,20 +203,20 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM); | Routine to raise any or all of the software IEC/IEEE floating-point | exception flags. *----------------------------------------------------------------------------*/ -void float_raise( int8 flags STATUS_PARAM); +void float_raise( int8_t flags STATUS_PARAM); /*---------------------------------------------------------------------------- | Software IEC/IEEE integer-to-floating-point conversion routines. *----------------------------------------------------------------------------*/ -float32 int32_to_float32( int STATUS_PARAM ); -float64 int32_to_float64( int STATUS_PARAM ); -float32 uint32_to_float32( unsigned int STATUS_PARAM ); -float64 uint32_to_float64( unsigned int STATUS_PARAM ); +float32 int32_to_float32( int32_t STATUS_PARAM ); +float64 int32_to_float64( int32_t STATUS_PARAM ); +float32 uint32_to_float32( uint32_t STATUS_PARAM ); +float64 uint32_to_float64( uint32_t STATUS_PARAM ); #ifdef FLOATX80 -floatx80 int32_to_floatx80( int STATUS_PARAM ); +floatx80 int32_to_floatx80( int32_t STATUS_PARAM ); #endif #ifdef FLOAT128 -float128 int32_to_float128( int STATUS_PARAM ); +float128 int32_to_float128( int32_t STATUS_PARAM ); #endif float32 int64_to_float32( int64_t STATUS_PARAM ); float32 uint64_to_float32( uint64_t STATUS_PARAM ); @@ -251,10 +238,10 @@ float32 float16_to_float32( bits16, flag STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ -int float32_to_int32( float32 STATUS_PARAM ); -int float32_to_int32_round_to_zero( float32 STATUS_PARAM ); -unsigned int float32_to_uint32( float32 STATUS_PARAM ); -unsigned int float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); +int32_t float32_to_int32( float32 STATUS_PARAM ); +int32_t float32_to_int32_round_to_zero( float32 STATUS_PARAM ); +uint32_t float32_to_uint32( float32 STATUS_PARAM ); +uint32_t float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); int64_t float32_to_int64( float32 STATUS_PARAM ); int64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM ); float64 float32_to_float64( float32 STATUS_PARAM ); @@ -321,10 +308,10 @@ INLINE int float32_is_zero(float32 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ -int float64_to_int32( float64 STATUS_PARAM ); -int float64_to_int32_round_to_zero( float64 STATUS_PARAM ); -unsigned int float64_to_uint32( float64 STATUS_PARAM ); -unsigned int float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); +int32_t float64_to_int32( float64 STATUS_PARAM ); +int32_t float64_to_int32_round_to_zero( float64 STATUS_PARAM ); +uint32_t float64_to_uint32( float64 STATUS_PARAM ); +uint32_t float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); int64_t float64_to_int64( float64 STATUS_PARAM ); int64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); uint64_t float64_to_uint64 (float64 a STATUS_PARAM); @@ -395,8 +382,8 @@ INLINE int float64_is_zero(float64 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE extended double-precision conversion routines. *----------------------------------------------------------------------------*/ -int floatx80_to_int32( floatx80 STATUS_PARAM ); -int floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); +int32_t floatx80_to_int32( floatx80 STATUS_PARAM ); +int32_t floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); int64_t floatx80_to_int64( floatx80 STATUS_PARAM ); int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); float32 floatx80_to_float32( floatx80 STATUS_PARAM ); @@ -459,8 +446,8 @@ INLINE int floatx80_is_zero(floatx80 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE quadruple-precision conversion routines. *----------------------------------------------------------------------------*/ -int float128_to_int32( float128 STATUS_PARAM ); -int float128_to_int32_round_to_zero( float128 STATUS_PARAM ); +int32_t float128_to_int32( float128 STATUS_PARAM ); +int32_t float128_to_int32_round_to_zero( float128 STATUS_PARAM ); int64_t float128_to_int64( float128 STATUS_PARAM ); int64_t float128_to_int64_round_to_zero( float128 STATUS_PARAM ); float32 float128_to_float32( float128 STATUS_PARAM ); diff --git a/hw/apic.c b/hw/apic.c index a5a53fb..ff581f0 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -765,7 +765,7 @@ static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) return val; } -static void apic_send_msi(target_phys_addr_t addr, uint32 data) +static void apic_send_msi(target_phys_addr_t addr, uint32_t data) { uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; uint8_t vector = (data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c index b6235eb..1248464 100644 --- a/hw/wdt_ib700.c +++ b/hw/wdt_ib700.c @@ -53,7 +53,7 @@ static void ib700_write_enable_reg(void *vp, uint32_t addr, uint32_t data) 30, 28, 26, 24, 22, 20, 18, 16, 14, 12, 10, 8, 6, 4, 2, 0 }; - int64 timeout; + int64_t timeout; ib700_debug("addr = %x, data = %x\n", addr, data); diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 06e40f3..f0c07cd 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -737,10 +737,10 @@ typedef struct CPUX86State { user */ struct DeviceState *apic_state; - uint64 mcg_cap; - uint64 mcg_status; - uint64 mcg_ctl; - uint64 mce_banks[MCE_BANKS_DEF*4]; + uint64_t mcg_cap; + uint64_t mcg_status; + uint64_t mcg_ctl; + uint64_t mce_banks[MCE_BANKS_DEF*4]; uint64_t tsc_aux; -- 1.7.3 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v2] softfloat: Fix function signature mismatches by using POSIX integer types 2010-12-17 17:31 [Qemu-devel] [PATCH] softfloat: Fix function signature mismatches by using POSIX integer types Andreas Färber @ 2010-12-17 22:39 ` Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 1/7] apic: Don't use SoftFloat uint32 type Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2010-12-17 22:39 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Michael Lotz Don't reinvent C99 types like uint8_t by typedef'ing uint8 etc. On BeOS and Haiku, system headers {be,os}/support/SupportDefs.h do define [u]int{8,16,32,64}, but they define [u]int32 as long, so assumptions that int32 and int can be used interchangeably must be avoided. Inspired by mmlr's original port to Haiku. Fix stray occurrences of softfloat-internal types outside fpu/. v2: * Rebased. Fix two new instances of int16 and uint16. Cc: Michael Lotz <mmlr@mlotz.ch> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-macros.h | 44 +++--- fpu/softfloat-specialize.h | 2 +- fpu/softfloat.c | 368 ++++++++++++++++++++++---------------------- fpu/softfloat.h | 63 +++----- hw/apic.c | 2 +- hw/wdt_ib700.c | 2 +- target-i386/cpu.h | 8 +- 7 files changed, 238 insertions(+), 251 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index 7838228..d635779 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -39,7 +39,7 @@ these four paragraphs for those parts of this code that are retained. | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) +INLINE void shift32RightJamming( bits32 a, int16_t count, bits32 *zPtr ) { bits32 z; @@ -65,7 +65,7 @@ INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) +INLINE void shift64RightJamming( bits64 a, int16_t count, bits64 *zPtr ) { bits64 z; @@ -101,10 +101,10 @@ INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) INLINE void shift64ExtraRightJamming( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + bits64 a0, bits64 a1, int16_t count, bits64 *z0Ptr, bits64 *z1Ptr ) { bits64 z0, z1; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -138,10 +138,10 @@ INLINE void INLINE void shift128Right( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + bits64 a0, bits64 a1, int16_t count, bits64 *z0Ptr, bits64 *z1Ptr ) { bits64 z0, z1; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -173,10 +173,10 @@ INLINE void INLINE void shift128RightJamming( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + bits64 a0, bits64 a1, int16_t count, bits64 *z0Ptr, bits64 *z1Ptr ) { bits64 z0, z1; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -227,14 +227,14 @@ INLINE void bits64 a0, bits64 a1, bits64 a2, - int16 count, + int16_t count, bits64 *z0Ptr, bits64 *z1Ptr, bits64 *z2Ptr ) { bits64 z0, z1, z2; - int8 negCount = ( - count ) & 63; + int8_t negCount = ( - count ) & 63; if ( count == 0 ) { z2 = a2; @@ -282,7 +282,7 @@ INLINE void INLINE void shortShift128Left( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + bits64 a0, bits64 a1, int16_t count, bits64 *z0Ptr, bits64 *z1Ptr ) { *z1Ptr = a1<<count; @@ -304,14 +304,14 @@ INLINE void bits64 a0, bits64 a1, bits64 a2, - int16 count, + int16_t count, bits64 *z0Ptr, bits64 *z1Ptr, bits64 *z2Ptr ) { bits64 z0, z1, z2; - int8 negCount; + int8_t negCount; z2 = a2<<count; z1 = a1<<count; @@ -368,7 +368,7 @@ INLINE void ) { bits64 z0, z1, z2; - int8 carry0, carry1; + int8_t carry0, carry1; z2 = a2 + b2; carry1 = ( z2 < a2 ); @@ -424,7 +424,7 @@ INLINE void ) { bits64 z0, z1, z2; - int8 borrow0, borrow1; + int8_t borrow0, borrow1; z2 = a2 - b2; borrow1 = ( a2 < b2 ); @@ -575,7 +575,7 @@ static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b ) | value. *----------------------------------------------------------------------------*/ -static bits32 estimateSqrt32( int16 aExp, bits32 a ) +static bits32 estimateSqrt32( int16_t aExp, bits32 a ) { static const bits16 sqrtOddAdjustments[] = { 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, @@ -585,7 +585,7 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) 0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E, 0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002 }; - int8 index; + int8_t index; bits32 z; index = ( a>>27 ) & 15; @@ -609,9 +609,9 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) | `a'. If `a' is zero, 32 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros32( bits32 a ) +static int8_t countLeadingZeros32( bits32 a ) { - static const int8 countLeadingZerosHigh[] = { + static const int8_t countLeadingZerosHigh[] = { 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, @@ -629,7 +629,7 @@ static int8 countLeadingZeros32( bits32 a ) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - int8 shiftCount; + int8_t shiftCount; shiftCount = 0; if ( a < 0x10000 ) { @@ -650,9 +650,9 @@ static int8 countLeadingZeros32( bits32 a ) | `a'. If `a' is zero, 64 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros64( bits64 a ) +static int8_t countLeadingZeros64( bits64 a ) { - int8 shiftCount; + int8_t shiftCount; shiftCount = 0; if ( a < ( (bits64) 1 )<<32 ) { diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 0746878..0c36388 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -43,7 +43,7 @@ these four paragraphs for those parts of this code that are retained. | should be simply `float_exception_flags |= flags;'. *----------------------------------------------------------------------------*/ -void float_raise( int8 flags STATUS_PARAM ) +void float_raise( int8_t flags STATUS_PARAM ) { STATUS(float_exception_flags) |= flags; } diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 6f5b05d..20f1bc8 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -79,12 +79,12 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM) | positive or negative integer is returned. *----------------------------------------------------------------------------*/ -static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) +static int32_t roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven; - int8 roundIncrement, roundBits; - int32 z; + int8_t roundIncrement, roundBits; + int32_t z; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -129,11 +129,11 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) | returned. *----------------------------------------------------------------------------*/ -static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM) +static int64_t roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven, increment; - int64 z; + int64_t z; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -185,7 +185,7 @@ INLINE bits32 extractFloat32Frac( float32 a ) | Returns the exponent bits of the single-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat32Exp( float32 a ) +INLINE int16_t extractFloat32Exp( float32 a ) { return ( float32_val(a)>>23 ) & 0xFF; @@ -211,9 +211,9 @@ INLINE flag extractFloat32Sign( float32 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr ) + normalizeFloat32Subnormal( bits32 aSig, int16_t *zExpPtr, bits32 *zSigPtr ) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros32( aSig ) - 8; *zSigPtr = aSig<<shiftCount; @@ -232,7 +232,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) +INLINE float32 packFloat32( flag zSign, int16_t zExp, bits32 zSig ) { return make_float32( @@ -262,11 +262,11 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) +static float32 roundAndPackFloat32( flag zSign, int16_t zExp, bits32 zSig STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven; - int8 roundIncrement, roundBits; + int8_t roundIncrement, roundBits; flag isTiny; roundingMode = STATUS(float_rounding_mode); @@ -325,9 +325,9 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_P *----------------------------------------------------------------------------*/ static float32 - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) + normalizeRoundAndPackFloat32( flag zSign, int16_t zExp, bits32 zSig STATUS_PARAM) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros32( zSig ) - 1; return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR); @@ -349,7 +349,7 @@ INLINE bits64 extractFloat64Frac( float64 a ) | Returns the exponent bits of the double-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat64Exp( float64 a ) +INLINE int16_t extractFloat64Exp( float64 a ) { return ( float64_val(a)>>52 ) & 0x7FF; @@ -375,9 +375,9 @@ INLINE flag extractFloat64Sign( float64 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr ) + normalizeFloat64Subnormal( bits64 aSig, int16_t *zExpPtr, bits64 *zSigPtr ) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros64( aSig ) - 11; *zSigPtr = aSig<<shiftCount; @@ -396,7 +396,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) +INLINE float64 packFloat64( flag zSign, int16_t zExp, bits64 zSig ) { return make_float64( @@ -426,11 +426,11 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) +static float64 roundAndPackFloat64( flag zSign, int16_t zExp, bits64 zSig STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven; - int16 roundIncrement, roundBits; + int16_t roundIncrement, roundBits; flag isTiny; roundingMode = STATUS(float_rounding_mode); @@ -489,9 +489,9 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_P *----------------------------------------------------------------------------*/ static float64 - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) + normalizeRoundAndPackFloat64( flag zSign, int16_t zExp, bits64 zSig STATUS_PARAM) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros64( zSig ) - 1; return roundAndPackFloat64( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR); @@ -517,7 +517,7 @@ INLINE bits64 extractFloatx80Frac( floatx80 a ) | value `a'. *----------------------------------------------------------------------------*/ -INLINE int32 extractFloatx80Exp( floatx80 a ) +INLINE int32_t extractFloatx80Exp( floatx80 a ) { return a.high & 0x7FFF; @@ -544,9 +544,9 @@ INLINE flag extractFloatx80Sign( floatx80 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr ) + normalizeFloatx80Subnormal( bits64 aSig, int32_t *zExpPtr, bits64 *zSigPtr ) { - int8 shiftCount; + int8_t shiftCount; shiftCount = countLeadingZeros64( aSig ); *zSigPtr = aSig<<shiftCount; @@ -559,7 +559,7 @@ static void | extended double-precision floating-point value, returning the result. *----------------------------------------------------------------------------*/ -INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) +INLINE floatx80 packFloatx80( flag zSign, int32_t zExp, bits64 zSig ) { floatx80 z; @@ -595,12 +595,12 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) static floatx80 roundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 + int8_t roundingPrecision, flag zSign, int32_t zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven, increment, isTiny; - int64 roundIncrement, roundMask, roundBits; + int64_t roundIncrement, roundMask, roundBits; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -764,10 +764,10 @@ static floatx80 static floatx80 normalizeRoundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 + int8_t roundingPrecision, flag zSign, int32_t zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) { - int8 shiftCount; + int8_t shiftCount; if ( zSig0 == 0 ) { zSig0 = zSig1; @@ -815,7 +815,7 @@ INLINE bits64 extractFloat128Frac0( float128 a ) | `a'. *----------------------------------------------------------------------------*/ -INLINE int32 extractFloat128Exp( float128 a ) +INLINE int32_t extractFloat128Exp( float128 a ) { return ( a.high>>48 ) & 0x7FFF; @@ -847,12 +847,12 @@ static void normalizeFloat128Subnormal( bits64 aSig0, bits64 aSig1, - int32 *zExpPtr, + int32_t *zExpPtr, bits64 *zSig0Ptr, bits64 *zSig1Ptr ) { - int8 shiftCount; + int8_t shiftCount; if ( aSig0 == 0 ) { shiftCount = countLeadingZeros64( aSig1 ) - 15; @@ -888,7 +888,7 @@ static void *----------------------------------------------------------------------------*/ INLINE float128 - packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 ) + packFloat128( flag zSign, int32_t zExp, bits64 zSig0, bits64 zSig1 ) { float128 z; @@ -921,9 +921,9 @@ INLINE float128 static float128 roundAndPackFloat128( - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 STATUS_PARAM) + flag zSign, int32_t zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 STATUS_PARAM) { - int8 roundingMode; + int8_t roundingMode; flag roundNearestEven, increment, isTiny; roundingMode = STATUS(float_rounding_mode); @@ -1022,9 +1022,9 @@ static float128 static float128 normalizeRoundAndPackFloat128( - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) + flag zSign, int32_t zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) { - int8 shiftCount; + int8_t shiftCount; bits64 zSig2; if ( zSig0 == 0 ) { @@ -1054,7 +1054,7 @@ static float128 | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float32 int32_to_float32( int32 a STATUS_PARAM ) +float32 int32_to_float32( int32_t a STATUS_PARAM ) { flag zSign; @@ -1071,11 +1071,11 @@ float32 int32_to_float32( int32 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float64 int32_to_float64( int32 a STATUS_PARAM ) +float64 int32_to_float64( int32_t a STATUS_PARAM ) { flag zSign; - uint32 absA; - int8 shiftCount; + uint32_t absA; + int8_t shiftCount; bits64 zSig; if ( a == 0 ) return float64_zero; @@ -1096,11 +1096,11 @@ float64 int32_to_float64( int32 a STATUS_PARAM ) | Arithmetic. *----------------------------------------------------------------------------*/ -floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) +floatx80 int32_to_floatx80( int32_t a STATUS_PARAM ) { flag zSign; - uint32 absA; - int8 shiftCount; + uint32_t absA; + int8_t shiftCount; bits64 zSig; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); @@ -1122,11 +1122,11 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float128 int32_to_float128( int32 a STATUS_PARAM ) +float128 int32_to_float128( int32_t a STATUS_PARAM ) { flag zSign; - uint32 absA; - int8 shiftCount; + uint32_t absA; + int8_t shiftCount; bits64 zSig0; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); @@ -1146,11 +1146,11 @@ float128 int32_to_float128( int32 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float32 int64_to_float32( int64 a STATUS_PARAM ) +float32 int64_to_float32( int64_t a STATUS_PARAM ) { flag zSign; - uint64 absA; - int8 shiftCount; + uint64_t absA; + int8_t shiftCount; if ( a == 0 ) return float32_zero; zSign = ( a < 0 ); @@ -1172,9 +1172,9 @@ float32 int64_to_float32( int64 a STATUS_PARAM ) } -float32 uint64_to_float32( uint64 a STATUS_PARAM ) +float32 uint64_to_float32( uint64_t a STATUS_PARAM ) { - int8 shiftCount; + int8_t shiftCount; if ( a == 0 ) return float32_zero; shiftCount = countLeadingZeros64( a ) - 40; @@ -1199,7 +1199,7 @@ float32 uint64_to_float32( uint64 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float64 int64_to_float64( int64 a STATUS_PARAM ) +float64 int64_to_float64( int64_t a STATUS_PARAM ) { flag zSign; @@ -1212,7 +1212,7 @@ float64 int64_to_float64( int64 a STATUS_PARAM ) } -float64 uint64_to_float64( uint64 a STATUS_PARAM ) +float64 uint64_to_float64( uint64_t a STATUS_PARAM ) { if ( a == 0 ) return float64_zero; return normalizeRoundAndPackFloat64( 0, 0x43C, a STATUS_VAR ); @@ -1228,11 +1228,11 @@ float64 uint64_to_float64( uint64 a STATUS_PARAM ) | Arithmetic. *----------------------------------------------------------------------------*/ -floatx80 int64_to_floatx80( int64 a STATUS_PARAM ) +floatx80 int64_to_floatx80( int64_t a STATUS_PARAM ) { flag zSign; - uint64 absA; - int8 shiftCount; + uint64_t absA; + int8_t shiftCount; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); zSign = ( a < 0 ); @@ -1252,12 +1252,12 @@ floatx80 int64_to_floatx80( int64 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float128 int64_to_float128( int64 a STATUS_PARAM ) +float128 int64_to_float128( int64_t a STATUS_PARAM ) { flag zSign; - uint64 absA; - int8 shiftCount; - int32 zExp; + uint64_t absA; + int8_t shiftCount; + int32_t zExp; bits64 zSig0, zSig1; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); @@ -1291,10 +1291,10 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 float32_to_int32( float32 a STATUS_PARAM ) +int32_t float32_to_int32( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits32 aSig; bits64 aSig64; @@ -1321,12 +1321,12 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) +int32_t float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits32 aSig; - int32 z; + int32_t z; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1363,12 +1363,12 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) +int16_t float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits32 aSig; - int32 z; + int32_t z; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1412,10 +1412,10 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 float32_to_int64( float32 a STATUS_PARAM ) +int64_t float32_to_int64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits32 aSig; bits64 aSig64, aSigExtra; @@ -1448,13 +1448,13 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) +int64_t float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits32 aSig; bits64 aSig64; - int64 z; + int64_t z; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1494,7 +1494,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) float64 float32_to_float64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; aSig = extractFloat32Frac( a ); @@ -1525,7 +1525,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; aSig = extractFloat32Frac( a ); @@ -1558,7 +1558,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) float128 float32_to_float128( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; aSig = extractFloat32Frac( a ); @@ -1589,9 +1589,9 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) float32 float32_round_to_int( float32 a STATUS_PARAM) { flag aSign; - int16 aExp; + int16_t aExp; bits32 lastBitMask, roundBitsMask; - int8 roundingMode; + int8_t roundingMode; bits32 z; aExp = extractFloat32Exp( a ); @@ -1648,9 +1648,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits32 aSig, bSig, zSig; - int16 expDiff; + int16_t expDiff; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1722,9 +1722,9 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits32 aSig, bSig, zSig; - int16 expDiff; + int16_t expDiff; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1838,7 +1838,7 @@ float32 float32_sub( float32 a, float32 b STATUS_PARAM ) float32 float32_mul( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits32 aSig, bSig; bits64 zSig64; bits32 zSig; @@ -1898,7 +1898,7 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) float32 float32_div( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits32 aSig, bSig, zSig; aSig = extractFloat32Frac( a ); @@ -1960,7 +1960,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) float32 float32_rem( float32 a, float32 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int16_t aExp, bExp, expDiff; bits32 aSig, bSig; bits32 q; bits64 aSig64, bSig64, q64; @@ -2059,7 +2059,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) float32 float32_sqrt( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int16_t aExp, zExp; bits32 aSig, zSig; bits64 rem, term; @@ -2144,7 +2144,7 @@ static const float64 float32_exp2_coefficients[15] = float32 float32_exp2( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; float64 r, x, xn; int i; @@ -2191,7 +2191,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) float32 float32_log2( float32 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int16_t aExp; bits32 aSig, zSig, i; aSig = extractFloat32Frac( a ); @@ -2396,10 +2396,10 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 float64_to_int32( float64 a STATUS_PARAM ) +int32_t float64_to_int32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits64 aSig; aSig = extractFloat64Frac( a ); @@ -2423,12 +2423,12 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) +int32_t float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits64 aSig, savedASig; - int32 z; + int32_t z; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2469,12 +2469,12 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) +int16_t float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits64 aSig, savedASig; - int32 z; + int32_t z; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2520,10 +2520,10 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 float64_to_int64( float64 a STATUS_PARAM ) +int64_t float64_to_int64( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits64 aSig, aSigExtra; aSig = extractFloat64Frac( a ); @@ -2562,12 +2562,12 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) +int64_t float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int16_t aExp, shiftCount; bits64 aSig; - int64 z; + int64_t z; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2614,7 +2614,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) float32 float64_to_float32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig; bits32 zSig; @@ -2646,7 +2646,7 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) | than the desired result exponent whenever `zSig' is a complete, normalized | significand. *----------------------------------------------------------------------------*/ -static bits16 packFloat16(flag zSign, int16 zExp, bits16 zSig) +static bits16 packFloat16(flag zSign, int16_t zExp, bits16 zSig) { return (((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig; } @@ -2657,7 +2657,7 @@ static bits16 packFloat16(flag zSign, int16 zExp, bits16 zSig) float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; aSign = a >> 15; @@ -2673,7 +2673,7 @@ float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM ) return packFloat32(aSign, 0xff, aSig << 13); } if (aExp == 0) { - int8 shiftCount; + int8_t shiftCount; if (aSig == 0) { return packFloat32(aSign, 0, 0); @@ -2689,11 +2689,11 @@ float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM ) bits16 float32_to_float16( float32 a, flag ieee STATUS_PARAM) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; bits32 mask; bits32 increment; - int8 roundingMode; + int8_t roundingMode; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -2785,7 +2785,7 @@ bits16 float32_to_float16( float32 a, flag ieee STATUS_PARAM) floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig; aSig = extractFloat64Frac( a ); @@ -2819,7 +2819,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) float128 float64_to_float128( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); @@ -2851,9 +2851,9 @@ float128 float64_to_float128( float64 a STATUS_PARAM ) float64 float64_round_to_int( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 lastBitMask, roundBitsMask; - int8 roundingMode; + int8_t roundingMode; bits64 z; aExp = extractFloat64Exp( a ); @@ -2923,9 +2923,9 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM) static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits64 aSig, bSig, zSig; - int16 expDiff; + int16_t expDiff; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2997,9 +2997,9 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits64 aSig, bSig, zSig; - int16 expDiff; + int16_t expDiff; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3113,7 +3113,7 @@ float64 float64_sub( float64 a, float64 b STATUS_PARAM ) float64 float64_mul( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits64 aSig, bSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); @@ -3171,7 +3171,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) float64 float64_div( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int16_t aExp, bExp, zExp; bits64 aSig, bSig, zSig; bits64 rem0, rem1; bits64 term0, term1; @@ -3241,7 +3241,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) float64 float64_rem( float64 a, float64 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int16_t aExp, bExp, expDiff; bits64 aSig, bSig; bits64 q, alternateASig; sbits64 sigMean; @@ -3325,7 +3325,7 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) float64 float64_sqrt( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int16_t aExp, zExp; bits64 aSig, zSig, doubleZSig; bits64 rem0, rem1, term0, term1; @@ -3375,7 +3375,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) float64 float64_log2( float64 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int16_t aExp; bits64 aSig, aSig0, aSig1, zSig, i; aSig = extractFloat64Frac( a ); @@ -3583,10 +3583,10 @@ int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) | overflows, the largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) +int32_t floatx80_to_int32( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig; aSig = extractFloatx80Frac( a ); @@ -3610,12 +3610,12 @@ int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) | sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) +int32_t floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig, savedASig; - int32 z; + int32_t z; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -3655,10 +3655,10 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) | overflows, the largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) +int64_t floatx80_to_int64( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig, aSigExtra; aSig = extractFloatx80Frac( a ); @@ -3695,12 +3695,12 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) | sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) +int64_t floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig; - int64 z; + int64_t z; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -3739,7 +3739,7 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig; aSig = extractFloatx80Frac( a ); @@ -3767,7 +3767,7 @@ float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig, zSig; aSig = extractFloatx80Frac( a ); @@ -3797,7 +3797,7 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig, zSig0, zSig1; aSig = extractFloatx80Frac( a ); @@ -3823,9 +3823,9 @@ float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 lastBitMask, roundBitsMask; - int8 roundingMode; + int8_t roundingMode; floatx80 z; aExp = extractFloatx80Exp( a ); @@ -3896,9 +3896,9 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM) { - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig, bSig, zSig0, zSig1; - int32 expDiff; + int32_t expDiff; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -3962,9 +3962,9 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM ) { - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig, bSig, zSig0, zSig1; - int32 expDiff; + int32_t expDiff; floatx80 z; aSig = extractFloatx80Frac( a ); @@ -4071,7 +4071,7 @@ floatx80 floatx80_sub( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig, bSig, zSig0, zSig1; floatx80 z; @@ -4130,7 +4130,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig, bSig, zSig0, zSig1; bits64 rem0, rem1, rem2, term0, term1, term2; floatx80 z; @@ -4210,7 +4210,7 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, zSign; - int32 aExp, bExp, expDiff; + int32_t aExp, bExp, expDiff; bits64 aSig0, aSig1, bSig; bits64 q, term0, term1, alternateASig0, alternateASig1; floatx80 z; @@ -4306,7 +4306,7 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, zExp; + int32_t aExp, zExp; bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0; bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; floatx80 z; @@ -4576,10 +4576,10 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 float128_to_int32( float128 a STATUS_PARAM ) +int32_t float128_to_int32( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4605,12 +4605,12 @@ int32 float128_to_int32( float128 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) +int32_t float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig0, aSig1, savedASig; - int32 z; + int32_t z; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4653,10 +4653,10 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 float128_to_int64( float128 a STATUS_PARAM ) +int64_t float128_to_int64( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4696,12 +4696,12 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) +int64_t float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int32_t aExp, shiftCount; bits64 aSig0, aSig1; - int64 z; + int64_t z; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4757,7 +4757,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) float32 float128_to_float32( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig0, aSig1; bits32 zSig; @@ -4792,7 +4792,7 @@ float32 float128_to_float32( float128 a STATUS_PARAM ) float64 float128_to_float64( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4827,7 +4827,7 @@ float64 float128_to_float64( float128 a STATUS_PARAM ) floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4864,9 +4864,9 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) float128 float128_round_to_int( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 lastBitMask, roundBitsMask; - int8 roundingMode; + int8_t roundingMode; float128 z; aExp = extractFloat128Exp( a ); @@ -4967,9 +4967,9 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; - int32 expDiff; + int32_t expDiff; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -5048,9 +5048,9 @@ static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM static float128 subFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; - int32 expDiff; + int32_t expDiff; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5173,7 +5173,7 @@ float128 float128_sub( float128 a, float128 b STATUS_PARAM ) float128 float128_mul( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; float128 z; @@ -5237,7 +5237,7 @@ float128 float128_mul( float128 a, float128 b STATUS_PARAM ) float128 float128_div( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int32_t aExp, bExp, zExp; bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; @@ -5321,7 +5321,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) float128 float128_rem( float128 a, float128 b STATUS_PARAM ) { flag aSign, zSign; - int32 aExp, bExp, expDiff; + int32_t aExp, bExp, expDiff; bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; bits64 allZero, alternateASig0, alternateASig1, sigMean1; sbits64 sigMean0; @@ -5430,7 +5430,7 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) float128 float128_sqrt( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, zExp; + int32_t aExp, zExp; bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; @@ -5686,17 +5686,17 @@ int float128_lt_quiet( float128 a, float128 b STATUS_PARAM ) #endif /* misc functions */ -float32 uint32_to_float32( unsigned int a STATUS_PARAM ) +float32 uint32_to_float32( uint32_t a STATUS_PARAM ) { return int64_to_float32(a STATUS_VAR); } -float64 uint32_to_float64( unsigned int a STATUS_PARAM ) +float64 uint32_to_float64( uint32_t a STATUS_PARAM ) { return int64_to_float64(a STATUS_VAR); } -unsigned int float32_to_uint32( float32 a STATUS_PARAM ) +uint32_t float32_to_uint32( float32 a STATUS_PARAM ) { int64_t v; unsigned int res; @@ -5714,7 +5714,7 @@ unsigned int float32_to_uint32( float32 a STATUS_PARAM ) return res; } -unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) +uint32_t float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) { int64_t v; unsigned int res; @@ -5732,7 +5732,7 @@ unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) return res; } -unsigned int float32_to_uint16_round_to_zero( float32 a STATUS_PARAM ) +uint16_t float32_to_uint16_round_to_zero( float32 a STATUS_PARAM ) { int64_t v; unsigned int res; @@ -5750,7 +5750,7 @@ unsigned int float32_to_uint16_round_to_zero( float32 a STATUS_PARAM ) return res; } -unsigned int float64_to_uint32( float64 a STATUS_PARAM ) +uint32_t float64_to_uint32( float64 a STATUS_PARAM ) { int64_t v; unsigned int res; @@ -5768,7 +5768,7 @@ unsigned int float64_to_uint32( float64 a STATUS_PARAM ) return res; } -unsigned int float64_to_uint32_round_to_zero( float64 a STATUS_PARAM ) +uint32_t float64_to_uint32_round_to_zero( float64 a STATUS_PARAM ) { int64_t v; unsigned int res; @@ -5786,7 +5786,7 @@ unsigned int float64_to_uint32_round_to_zero( float64 a STATUS_PARAM ) return res; } -unsigned int float64_to_uint16_round_to_zero( float64 a STATUS_PARAM ) +uint16_t float64_to_uint16_round_to_zero( float64 a STATUS_PARAM ) { int64_t v; unsigned int res; @@ -5926,7 +5926,7 @@ int float128_compare_quiet( float128 a, float128 b STATUS_PARAM ) float32 float32_scalbn( float32 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits32 aSig; aSig = extractFloat32Frac( a ); @@ -5949,7 +5949,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM ) float64 float64_scalbn( float64 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig; aSig = extractFloat64Frac( a ); @@ -5973,7 +5973,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM ) floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int16_t aExp; bits64 aSig; aSig = extractFloatx80Frac( a ); @@ -5996,7 +5996,7 @@ floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) float128 float128_scalbn( float128 a, int n STATUS_PARAM ) { flag aSign; - int32 aExp; + int32_t aExp; bits64 aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 1c1004d..e97b11f 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -41,23 +41,10 @@ these four paragraphs for those parts of this code that are retained. /*---------------------------------------------------------------------------- | Each of the following `typedef's defines the most convenient type that holds -| integers of at least as many bits as specified. For example, `uint8' should -| be the most convenient type that can hold unsigned integers of as many as -| 8 bits. The `flag' type must be able to hold either a 0 or 1. For most -| implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed -| to the same as `int'. +| integers of at least as many bits as specified. +| The `flag' type must be able to hold either a 0 or 1. *----------------------------------------------------------------------------*/ typedef uint8_t flag; -typedef uint8_t uint8; -typedef int8_t int8; -#ifndef _AIX -typedef int uint16; -typedef int int16; -#endif -typedef unsigned int uint32; -typedef signed int int32; -typedef uint64_t uint64; -typedef int64_t int64; /*---------------------------------------------------------------------------- | Each of the following `typedef's defines a type that holds integers @@ -216,20 +203,20 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM); | Routine to raise any or all of the software IEC/IEEE floating-point | exception flags. *----------------------------------------------------------------------------*/ -void float_raise( int8 flags STATUS_PARAM); +void float_raise( int8_t flags STATUS_PARAM); /*---------------------------------------------------------------------------- | Software IEC/IEEE integer-to-floating-point conversion routines. *----------------------------------------------------------------------------*/ -float32 int32_to_float32( int STATUS_PARAM ); -float64 int32_to_float64( int STATUS_PARAM ); -float32 uint32_to_float32( unsigned int STATUS_PARAM ); -float64 uint32_to_float64( unsigned int STATUS_PARAM ); +float32 int32_to_float32( int32_t STATUS_PARAM ); +float64 int32_to_float64( int32_t STATUS_PARAM ); +float32 uint32_to_float32( uint32_t STATUS_PARAM ); +float64 uint32_to_float64( uint32_t STATUS_PARAM ); #ifdef FLOATX80 -floatx80 int32_to_floatx80( int STATUS_PARAM ); +floatx80 int32_to_floatx80( int32_t STATUS_PARAM ); #endif #ifdef FLOAT128 -float128 int32_to_float128( int STATUS_PARAM ); +float128 int32_to_float128( int32_t STATUS_PARAM ); #endif float32 int64_to_float32( int64_t STATUS_PARAM ); float32 uint64_to_float32( uint64_t STATUS_PARAM ); @@ -251,12 +238,12 @@ float32 float16_to_float32( bits16, flag STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ -int float32_to_int16_round_to_zero( float32 STATUS_PARAM ); -unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); -int float32_to_int32( float32 STATUS_PARAM ); -int float32_to_int32_round_to_zero( float32 STATUS_PARAM ); -unsigned int float32_to_uint32( float32 STATUS_PARAM ); -unsigned int float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); +int16_t float32_to_int16_round_to_zero( float32 STATUS_PARAM ); +uint16_t float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); +int32_t float32_to_int32( float32 STATUS_PARAM ); +int32_t float32_to_int32_round_to_zero( float32 STATUS_PARAM ); +uint32_t float32_to_uint32( float32 STATUS_PARAM ); +uint32_t float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); int64_t float32_to_int64( float32 STATUS_PARAM ); int64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM ); float64 float32_to_float64( float32 STATUS_PARAM ); @@ -329,12 +316,12 @@ INLINE int float32_is_any_nan(float32 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ -int float64_to_int16_round_to_zero( float64 STATUS_PARAM ); -unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); -int float64_to_int32( float64 STATUS_PARAM ); -int float64_to_int32_round_to_zero( float64 STATUS_PARAM ); -unsigned int float64_to_uint32( float64 STATUS_PARAM ); -unsigned int float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); +int16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); +uint16_t float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); +int32_t float64_to_int32( float64 STATUS_PARAM ); +int32_t float64_to_int32_round_to_zero( float64 STATUS_PARAM ); +uint32_t float64_to_uint32( float64 STATUS_PARAM ); +uint32_t float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); int64_t float64_to_int64( float64 STATUS_PARAM ); int64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); uint64_t float64_to_uint64 (float64 a STATUS_PARAM); @@ -411,8 +398,8 @@ INLINE int float64_is_any_nan(float64 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE extended double-precision conversion routines. *----------------------------------------------------------------------------*/ -int floatx80_to_int32( floatx80 STATUS_PARAM ); -int floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); +int32_t floatx80_to_int32( floatx80 STATUS_PARAM ); +int32_t floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); int64_t floatx80_to_int64( floatx80 STATUS_PARAM ); int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); float32 floatx80_to_float32( floatx80 STATUS_PARAM ); @@ -475,8 +462,8 @@ INLINE int floatx80_is_zero(floatx80 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE quadruple-precision conversion routines. *----------------------------------------------------------------------------*/ -int float128_to_int32( float128 STATUS_PARAM ); -int float128_to_int32_round_to_zero( float128 STATUS_PARAM ); +int32_t float128_to_int32( float128 STATUS_PARAM ); +int32_t float128_to_int32_round_to_zero( float128 STATUS_PARAM ); int64_t float128_to_int64( float128 STATUS_PARAM ); int64_t float128_to_int64_round_to_zero( float128 STATUS_PARAM ); float32 float128_to_float32( float128 STATUS_PARAM ); diff --git a/hw/apic.c b/hw/apic.c index a5a53fb..ff581f0 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -765,7 +765,7 @@ static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) return val; } -static void apic_send_msi(target_phys_addr_t addr, uint32 data) +static void apic_send_msi(target_phys_addr_t addr, uint32_t data) { uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; uint8_t vector = (data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c index b6235eb..1248464 100644 --- a/hw/wdt_ib700.c +++ b/hw/wdt_ib700.c @@ -53,7 +53,7 @@ static void ib700_write_enable_reg(void *vp, uint32_t addr, uint32_t data) 30, 28, 26, 24, 22, 20, 18, 16, 14, 12, 10, 8, 6, 4, 2, 0 }; - int64 timeout; + int64_t timeout; ib700_debug("addr = %x, data = %x\n", addr, data); diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 06e40f3..f0c07cd 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -737,10 +737,10 @@ typedef struct CPUX86State { user */ struct DeviceState *apic_state; - uint64 mcg_cap; - uint64 mcg_status; - uint64 mcg_ctl; - uint64 mce_banks[MCE_BANKS_DEF*4]; + uint64_t mcg_cap; + uint64_t mcg_status; + uint64_t mcg_ctl; + uint64_t mce_banks[MCE_BANKS_DEF*4]; uint64_t tsc_aux; -- 1.7.3 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v3 1/7] apic: Don't use SoftFloat uint32 type 2010-12-17 22:39 ` [Qemu-devel] [PATCH v2] " Andreas Färber @ 2010-12-18 16:25 ` Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type Andreas Färber 2010-12-19 11:20 ` [Qemu-devel] [PATCH v3 1/7] apic: Don't use SoftFloat uint32 type Blue Swirl 0 siblings, 2 replies; 55+ messages in thread From: Andreas Färber @ 2010-12-18 16:25 UTC (permalink / raw) To: qemu-devel; +Cc: Andreas Färber softfloat.h's uint32 type has least-width semantics, whereas surrounding code uses uint32_t, so use uint32_t too. v3: * Split off. Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- hw/apic.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/apic.c b/hw/apic.c index a5a53fb..ff581f0 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -765,7 +765,7 @@ static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) return val; } -static void apic_send_msi(target_phys_addr_t addr, uint32 data) +static void apic_send_msi(target_phys_addr_t addr, uint32_t data) { uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; uint8_t vector = (data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; -- 1.7.3 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 1/7] apic: Don't use SoftFloat uint32 type Andreas Färber @ 2010-12-18 16:25 ` Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type Andreas Färber 2010-12-18 16:47 ` [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type Richard W.M. Jones 2010-12-19 11:20 ` [Qemu-devel] [PATCH v3 1/7] apic: Don't use SoftFloat uint32 type Blue Swirl 1 sibling, 2 replies; 55+ messages in thread From: Andreas Färber @ 2010-12-18 16:25 UTC (permalink / raw) To: qemu-devel; +Cc: Andreas Färber, Richard W.M. Jones softfloat.h's int64 type has least-width semantics, but this doesn't seem intended here, so use plain int64_t. v3: * Split off. Cc: Richard W.M. Jones <rjones@redhat.com> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- hw/wdt_ib700.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c index b6235eb..1248464 100644 --- a/hw/wdt_ib700.c +++ b/hw/wdt_ib700.c @@ -53,7 +53,7 @@ static void ib700_write_enable_reg(void *vp, uint32_t addr, uint32_t data) 30, 28, 26, 24, 22, 20, 18, 16, 14, 12, 10, 8, 6, 4, 2, 0 }; - int64 timeout; + int64_t timeout; ib700_debug("addr = %x, data = %x\n", addr, data); -- 1.7.3 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type Andreas Färber @ 2010-12-18 16:25 ` Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber ` (2 more replies) 2010-12-18 16:47 ` [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type Richard W.M. Jones 1 sibling, 3 replies; 55+ messages in thread From: Andreas Färber @ 2010-12-18 16:25 UTC (permalink / raw) To: qemu-devel; +Cc: Andreas Färber, Juan Quintela, Huang Ying softfloat.h's uint64 type has least-width semantics, which seems unintended here since uint64_t is used in helpers. v3: * Split off. Cc: Huang Ying <ying.huang@intel.com> Cc: Juan Quintela <quintela@redhat.com> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- target-i386/cpu.h | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 06e40f3..f0c07cd 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -737,10 +737,10 @@ typedef struct CPUX86State { user */ struct DeviceState *apic_state; - uint64 mcg_cap; - uint64 mcg_status; - uint64 mcg_ctl; - uint64 mce_banks[MCE_BANKS_DEF*4]; + uint64_t mcg_cap; + uint64_t mcg_status; + uint64_t mcg_ctl; + uint64_t mce_banks[MCE_BANKS_DEF*4]; uint64_t tsc_aux; -- 1.7.3 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type Andreas Färber @ 2010-12-18 16:25 ` Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 5/7] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber 2010-12-19 11:28 ` [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation Blue Swirl 2010-12-18 20:19 ` [Qemu-devel] Re: [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type Juan Quintela 2010-12-20 0:52 ` Huang Ying 2 siblings, 2 replies; 55+ messages in thread From: Andreas Färber @ 2010-12-18 16:25 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Michael Lotz The original SoftFloat 2.0b library avoided the use of custom integer types in its public headers. This requires the definitions of int{8,16,32,64} to match the assumptions in the declarations. This breaks on BeOS R5 and Haiku/x86, where int32 is defined in {be,os}/support/SupportDefs.h in terms of a long rather than an int. Spotted by Michael Lotz. Since QEMU already breaks this distinction by defining those types just above, do use them for consistency and to allow #ifndef'ing them out as done for [u]int16 on AIX. Note that the BeOS/Haiku types are exact-width types though. v3: * Split off as intermediate step. v2: * Rebased. Cc: Michael Lotz <mmlr@mlotz.ch> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat.h | 68 +++++++++++++++++++++++++++--------------------------- 1 files changed, 34 insertions(+), 34 deletions(-) diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 1c1004d..c62e769 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -221,25 +221,25 @@ void float_raise( int8 flags STATUS_PARAM); /*---------------------------------------------------------------------------- | Software IEC/IEEE integer-to-floating-point conversion routines. *----------------------------------------------------------------------------*/ -float32 int32_to_float32( int STATUS_PARAM ); -float64 int32_to_float64( int STATUS_PARAM ); +float32 int32_to_float32( int32 STATUS_PARAM ); +float64 int32_to_float64( int32 STATUS_PARAM ); float32 uint32_to_float32( unsigned int STATUS_PARAM ); float64 uint32_to_float64( unsigned int STATUS_PARAM ); #ifdef FLOATX80 -floatx80 int32_to_floatx80( int STATUS_PARAM ); +floatx80 int32_to_floatx80( int32 STATUS_PARAM ); #endif #ifdef FLOAT128 -float128 int32_to_float128( int STATUS_PARAM ); +float128 int32_to_float128( int32 STATUS_PARAM ); #endif -float32 int64_to_float32( int64_t STATUS_PARAM ); -float32 uint64_to_float32( uint64_t STATUS_PARAM ); -float64 int64_to_float64( int64_t STATUS_PARAM ); -float64 uint64_to_float64( uint64_t STATUS_PARAM ); +float32 int64_to_float32( int64 STATUS_PARAM ); +float32 uint64_to_float32( uint64 STATUS_PARAM ); +float64 int64_to_float64( int64 STATUS_PARAM ); +float64 uint64_to_float64( uint64 STATUS_PARAM ); #ifdef FLOATX80 -floatx80 int64_to_floatx80( int64_t STATUS_PARAM ); +floatx80 int64_to_floatx80( int64 STATUS_PARAM ); #endif #ifdef FLOAT128 -float128 int64_to_float128( int64_t STATUS_PARAM ); +float128 int64_to_float128( int64 STATUS_PARAM ); #endif /*---------------------------------------------------------------------------- @@ -251,14 +251,14 @@ float32 float16_to_float32( bits16, flag STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ -int float32_to_int16_round_to_zero( float32 STATUS_PARAM ); +int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM ); unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); -int float32_to_int32( float32 STATUS_PARAM ); -int float32_to_int32_round_to_zero( float32 STATUS_PARAM ); -unsigned int float32_to_uint32( float32 STATUS_PARAM ); -unsigned int float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); -int64_t float32_to_int64( float32 STATUS_PARAM ); -int64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM ); +int32 float32_to_int32( float32 STATUS_PARAM ); +int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); +uint32 float32_to_uint32( float32 STATUS_PARAM ); +uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); +int64 float32_to_int64( float32 STATUS_PARAM ); +int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM ); float64 float32_to_float64( float32 STATUS_PARAM ); #ifdef FLOATX80 floatx80 float32_to_floatx80( float32 STATUS_PARAM ); @@ -329,16 +329,16 @@ INLINE int float32_is_any_nan(float32 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ -int float64_to_int16_round_to_zero( float64 STATUS_PARAM ); +int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM ); unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); -int float64_to_int32( float64 STATUS_PARAM ); -int float64_to_int32_round_to_zero( float64 STATUS_PARAM ); -unsigned int float64_to_uint32( float64 STATUS_PARAM ); -unsigned int float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); -int64_t float64_to_int64( float64 STATUS_PARAM ); -int64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); -uint64_t float64_to_uint64 (float64 a STATUS_PARAM); -uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM); +int32 float64_to_int32( float64 STATUS_PARAM ); +int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); +uint32 float64_to_uint32( float64 STATUS_PARAM ); +uint32 float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); +int64 float64_to_int64( float64 STATUS_PARAM ); +int64 float64_to_int64_round_to_zero( float64 STATUS_PARAM ); +uint64 float64_to_uint64 (float64 a STATUS_PARAM); +uint64 float64_to_uint64_round_to_zero (float64 a STATUS_PARAM); float32 float64_to_float32( float64 STATUS_PARAM ); #ifdef FLOATX80 floatx80 float64_to_floatx80( float64 STATUS_PARAM ); @@ -411,10 +411,10 @@ INLINE int float64_is_any_nan(float64 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE extended double-precision conversion routines. *----------------------------------------------------------------------------*/ -int floatx80_to_int32( floatx80 STATUS_PARAM ); -int floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); -int64_t floatx80_to_int64( floatx80 STATUS_PARAM ); -int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); +int32 floatx80_to_int32( floatx80 STATUS_PARAM ); +int32 floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); +int64 floatx80_to_int64( floatx80 STATUS_PARAM ); +int64 floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); float32 floatx80_to_float32( floatx80 STATUS_PARAM ); float64 floatx80_to_float64( floatx80 STATUS_PARAM ); #ifdef FLOAT128 @@ -475,10 +475,10 @@ INLINE int floatx80_is_zero(floatx80 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE quadruple-precision conversion routines. *----------------------------------------------------------------------------*/ -int float128_to_int32( float128 STATUS_PARAM ); -int float128_to_int32_round_to_zero( float128 STATUS_PARAM ); -int64_t float128_to_int64( float128 STATUS_PARAM ); -int64_t float128_to_int64_round_to_zero( float128 STATUS_PARAM ); +int32 float128_to_int32( float128 STATUS_PARAM ); +int32 float128_to_int32_round_to_zero( float128 STATUS_PARAM ); +int64 float128_to_int64( float128 STATUS_PARAM ); +int64 float128_to_int64_round_to_zero( float128 STATUS_PARAM ); float32 float128_to_float32( float128 STATUS_PARAM ); float64 float128_to_float64( float128 STATUS_PARAM ); #ifdef FLOATX80 -- 1.7.3 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v3 5/7] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber @ 2010-12-18 16:25 ` Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 6/7] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber 2010-12-19 11:28 ` [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation Blue Swirl 1 sibling, 1 reply; 55+ messages in thread From: Andreas Färber @ 2010-12-18 16:25 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber They are defined with the same semantics as the POSIX types, so prefer those for consistency. Suggested by Peter Maydell. v3: * Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-macros.h | 182 +++++++------- fpu/softfloat-native.c | 6 +- fpu/softfloat-specialize.h | 58 +++--- fpu/softfloat.c | 588 ++++++++++++++++++++++---------------------- fpu/softfloat.h | 19 +-- 5 files changed, 419 insertions(+), 434 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index 7838228..e007039 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -39,9 +39,9 @@ these four paragraphs for those parts of this code that are retained. | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) +INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) { - bits32 z; + uint32_t z; if ( count == 0 ) { z = a; @@ -65,9 +65,9 @@ INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) +INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) { - bits64 z; + uint64_t z; if ( count == 0 ) { z = a; @@ -101,9 +101,9 @@ INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) INLINE void shift64ExtraRightJamming( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z0, z1; + uint64_t z0, z1; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -138,9 +138,9 @@ INLINE void INLINE void shift128Right( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z0, z1; + uint64_t z0, z1; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -173,9 +173,9 @@ INLINE void INLINE void shift128RightJamming( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z0, z1; + uint64_t z0, z1; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -224,16 +224,16 @@ INLINE void INLINE void shift128ExtraRightJamming( - bits64 a0, - bits64 a1, - bits64 a2, + uint64_t a0, + uint64_t a1, + uint64_t a2, int16 count, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -282,7 +282,7 @@ INLINE void INLINE void shortShift128Left( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { *z1Ptr = a1<<count; @@ -301,16 +301,16 @@ INLINE void INLINE void shortShift192Left( - bits64 a0, - bits64 a1, - bits64 a2, + uint64_t a0, + uint64_t a1, + uint64_t a2, int16 count, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 negCount; z2 = a2<<count; @@ -336,9 +336,9 @@ INLINE void INLINE void add128( - bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z1; + uint64_t z1; z1 = a1 + b1; *z1Ptr = z1; @@ -356,18 +356,18 @@ INLINE void INLINE void add192( - bits64 a0, - bits64 a1, - bits64 a2, - bits64 b0, - bits64 b1, - bits64 b2, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t a0, + uint64_t a1, + uint64_t a2, + uint64_t b0, + uint64_t b1, + uint64_t b2, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 carry0, carry1; z2 = a2 + b2; @@ -394,7 +394,7 @@ INLINE void INLINE void sub128( - bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr ) { *z1Ptr = a1 - b1; @@ -412,18 +412,18 @@ INLINE void INLINE void sub192( - bits64 a0, - bits64 a1, - bits64 a2, - bits64 b0, - bits64 b1, - bits64 b2, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t a0, + uint64_t a1, + uint64_t a2, + uint64_t b0, + uint64_t b1, + uint64_t b2, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 borrow0, borrow1; z2 = a2 - b2; @@ -446,21 +446,21 @@ INLINE void | `z0Ptr' and `z1Ptr'. *----------------------------------------------------------------------------*/ -INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr ) +INLINE void mul64To128( uint64_t a, uint64_t b, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits32 aHigh, aLow, bHigh, bLow; - bits64 z0, zMiddleA, zMiddleB, z1; + uint32_t aHigh, aLow, bHigh, bLow; + uint64_t z0, zMiddleA, zMiddleB, z1; aLow = a; aHigh = a>>32; bLow = b; bHigh = b>>32; - z1 = ( (bits64) aLow ) * bLow; - zMiddleA = ( (bits64) aLow ) * bHigh; - zMiddleB = ( (bits64) aHigh ) * bLow; - z0 = ( (bits64) aHigh ) * bHigh; + z1 = ( (uint64_t) aLow ) * bLow; + zMiddleA = ( (uint64_t) aLow ) * bHigh; + zMiddleB = ( (uint64_t) aHigh ) * bLow; + z0 = ( (uint64_t) aHigh ) * bHigh; zMiddleA += zMiddleB; - z0 += ( ( (bits64) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 ); + z0 += ( ( (uint64_t) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 ); zMiddleA <<= 32; z1 += zMiddleA; z0 += ( z1 < zMiddleA ); @@ -478,15 +478,15 @@ INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr ) INLINE void mul128By64To192( - bits64 a0, - bits64 a1, - bits64 b, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t a0, + uint64_t a1, + uint64_t b, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2, more1; + uint64_t z0, z1, z2, more1; mul64To128( a1, b, &z1, &z2 ); mul64To128( a0, b, &z0, &more1 ); @@ -506,18 +506,18 @@ INLINE void INLINE void mul128To256( - bits64 a0, - bits64 a1, - bits64 b0, - bits64 b1, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr, - bits64 *z3Ptr + uint64_t a0, + uint64_t a1, + uint64_t b0, + uint64_t b1, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr, + uint64_t *z3Ptr ) { - bits64 z0, z1, z2, z3; - bits64 more1, more2; + uint64_t z0, z1, z2, z3; + uint64_t more1, more2; mul64To128( a1, b1, &z2, &z3 ); mul64To128( a1, b0, &z1, &more2 ); @@ -543,18 +543,18 @@ INLINE void | unsigned integer is returned. *----------------------------------------------------------------------------*/ -static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b ) +static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b ) { - bits64 b0, b1; - bits64 rem0, rem1, term0, term1; - bits64 z; + uint64_t b0, b1; + uint64_t rem0, rem1, term0, term1; + uint64_t z; if ( b <= a0 ) return LIT64( 0xFFFFFFFFFFFFFFFF ); b0 = b>>32; z = ( b0<<32 <= a0 ) ? LIT64( 0xFFFFFFFF00000000 ) : ( a0 / b0 )<<32; mul64To128( b, z, &term0, &term1 ); sub128( a0, a1, term0, term1, &rem0, &rem1 ); - while ( ( (sbits64) rem0 ) < 0 ) { + while ( ( (int64_t) rem0 ) < 0 ) { z -= LIT64( 0x100000000 ); b1 = b<<32; add128( rem0, rem1, b0, b1, &rem0, &rem1 ); @@ -575,18 +575,18 @@ static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b ) | value. *----------------------------------------------------------------------------*/ -static bits32 estimateSqrt32( int16 aExp, bits32 a ) +static uint32_t estimateSqrt32( int16 aExp, uint32_t a ) { - static const bits16 sqrtOddAdjustments[] = { + static const uint16_t sqrtOddAdjustments[] = { 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, 0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67 }; - static const bits16 sqrtEvenAdjustments[] = { + static const uint16_t sqrtEvenAdjustments[] = { 0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E, 0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002 }; int8 index; - bits32 z; + uint32_t z; index = ( a>>27 ) & 15; if ( aExp & 1 ) { @@ -598,9 +598,9 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ (int)index ]; z = a / z + z; z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 ); - if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 ); + if ( z <= a ) return (uint32_t) ( ( (int32_t) a )>>1 ); } - return ( (bits32) ( ( ( (bits64) a )<<31 ) / z ) ) + ( z>>1 ); + return ( (uint32_t) ( ( ( (uint64_t) a )<<31 ) / z ) ) + ( z>>1 ); } @@ -609,7 +609,7 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) | `a'. If `a' is zero, 32 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros32( bits32 a ) +static int8 countLeadingZeros32( uint32_t a ) { static const int8 countLeadingZerosHigh[] = { 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, @@ -650,12 +650,12 @@ static int8 countLeadingZeros32( bits32 a ) | `a'. If `a' is zero, 64 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros64( bits64 a ) +static int8 countLeadingZeros64( uint64_t a ) { int8 shiftCount; shiftCount = 0; - if ( a < ( (bits64) 1 )<<32 ) { + if ( a < ( (uint64_t) 1 )<<32 ) { shiftCount += 32; } else { @@ -672,7 +672,7 @@ static int8 countLeadingZeros64( bits64 a ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 == b0 ) && ( a1 == b1 ); @@ -685,7 +685,7 @@ INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) ); @@ -698,7 +698,7 @@ INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) | returns 0. *----------------------------------------------------------------------------*/ -INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) ); @@ -711,7 +711,7 @@ INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -INLINE flag ne128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 != b0 ) || ( a1 != b1 ); diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c index 049c830..edbbe7d 100644 --- a/fpu/softfloat-native.c +++ b/fpu/softfloat-native.c @@ -418,7 +418,7 @@ int float64_is_nan( float64 a1 ) u.f = a1; a = u.i; - return ( LIT64( 0xFFF0000000000000 ) < (bits64) ( a<<1 ) ); + return ( LIT64( 0xFFF0000000000000 ) < (uint64_t) ( a<<1 ) ); } @@ -500,7 +500,7 @@ int floatx80_is_signaling_nan( floatx80 a1) aLow = u.i.low & ~ LIT64( 0x4000000000000000 ); return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) - && (bits64) ( aLow<<1 ) + && (uint64_t) ( aLow<<1 ) && ( u.i.low == aLow ); } @@ -508,7 +508,7 @@ int floatx80_is_nan( floatx80 a1 ) { floatx80u u; u.f = a1; - return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( u.i.low<<1 ); + return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( u.i.low<<1 ); } #endif diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 0746878..b6d236f 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -53,7 +53,7 @@ void float_raise( int8 flags STATUS_PARAM ) *----------------------------------------------------------------------------*/ typedef struct { flag sign; - bits64 high, low; + uint64_t high, low; } commonNaNT; /*---------------------------------------------------------------------------- @@ -82,7 +82,7 @@ int float32_is_nan( float32 a_ ) #if SNAN_BIT_IS_ONE return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); #else - return ( 0xFF800000 <= (bits32) ( a<<1 ) ); + return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); #endif } @@ -95,7 +95,7 @@ int float32_is_signaling_nan( float32 a_ ) { uint32_t a = float32_val(a_); #if SNAN_BIT_IS_ONE - return ( 0xFF800000 <= (bits32) ( a<<1 ) ); + return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); #else return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); #endif @@ -133,7 +133,7 @@ static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM ) if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); z.sign = float32_val(a)>>31; z.low = 0; - z.high = ( (bits64) float32_val(a) )<<41; + z.high = ( (uint64_t) float32_val(a) )<<41; return z; } @@ -144,10 +144,10 @@ static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM ) static float32 commonNaNToFloat32( commonNaNT a ) { - bits32 mantissa = a.high>>41; + uint32_t mantissa = a.high>>41; if ( mantissa ) return make_float32( - ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); + ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); else return float32_default_nan; } @@ -161,7 +161,7 @@ static float32 commonNaNToFloat32( commonNaNT a ) static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) { flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN; - bits32 av, bv, res; + uint32_t av, bv, res; if ( STATUS(default_nan_mode) ) return float32_default_nan; @@ -189,9 +189,9 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) res = av; else { returnLargerSignificand: - if ( (bits32) ( av<<1 ) < (bits32) ( bv<<1 ) ) + if ( (uint32_t) ( av<<1 ) < (uint32_t) ( bv<<1 ) ) res = bv; - else if ( (bits32) ( bv<<1 ) < (bits32) ( av<<1 ) ) + else if ( (uint32_t) ( bv<<1 ) < (uint32_t) ( av<<1 ) ) res = av; else res = ( av < bv ) ? av : bv; @@ -225,13 +225,13 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) int float64_is_nan( float64 a_ ) { - bits64 a = float64_val(a_); + uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE return ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) && ( a & LIT64( 0x0007FFFFFFFFFFFF ) ); #else - return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); + return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); #endif } @@ -242,9 +242,9 @@ int float64_is_nan( float64 a_ ) int float64_is_signaling_nan( float64 a_ ) { - bits64 a = float64_val(a_); + uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE - return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); + return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); #else return ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) @@ -260,7 +260,7 @@ int float64_is_signaling_nan( float64 a_ ) float64 float64_maybe_silence_nan( float64 a_ ) { if (float64_is_signaling_nan(a_)) { - bits64 a = float64_val(a_); + uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE a &= ~LIT64( 0x0008000000000000 ); #else @@ -295,11 +295,11 @@ static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM) static float64 commonNaNToFloat64( commonNaNT a ) { - bits64 mantissa = a.high>>12; + uint64_t mantissa = a.high>>12; if ( mantissa ) return make_float64( - ( ( (bits64) a.sign )<<63 ) + ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FF0000000000000 ) | ( a.high>>12 )); else @@ -315,7 +315,7 @@ static float64 commonNaNToFloat64( commonNaNT a ) static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) { flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN; - bits64 av, bv, res; + uint64_t av, bv, res; if ( STATUS(default_nan_mode) ) return float64_default_nan; @@ -343,9 +343,9 @@ static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) res = av; else { returnLargerSignificand: - if ( (bits64) ( av<<1 ) < (bits64) ( bv<<1 ) ) + if ( (uint64_t) ( av<<1 ) < (uint64_t) ( bv<<1 ) ) res = bv; - else if ( (bits64) ( bv<<1 ) < (bits64) ( av<<1 ) ) + else if ( (uint64_t) ( bv<<1 ) < (uint64_t) ( av<<1 ) ) res = av; else res = ( av < bv ) ? av : bv; @@ -380,15 +380,15 @@ static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) int floatx80_is_nan( floatx80 a ) { #if SNAN_BIT_IS_ONE - bits64 aLow; + uint64_t aLow; aLow = a.low & ~ LIT64( 0x4000000000000000 ); return ( ( a.high & 0x7FFF ) == 0x7FFF ) - && (bits64) ( aLow<<1 ) + && (uint64_t) ( aLow<<1 ) && ( a.low == aLow ); #else - return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 ); + return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( a.low<<1 ); #endif } @@ -400,14 +400,14 @@ int floatx80_is_nan( floatx80 a ) int floatx80_is_signaling_nan( floatx80 a ) { #if SNAN_BIT_IS_ONE - return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 ); + return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( a.low<<1 ); #else - bits64 aLow; + uint64_t aLow; aLow = a.low & ~ LIT64( 0x4000000000000000 ); return ( ( a.high & 0x7FFF ) == 0x7FFF ) - && (bits64) ( aLow<<1 ) + && (uint64_t) ( aLow<<1 ) && ( a.low == aLow ); #endif } @@ -442,7 +442,7 @@ static floatx80 commonNaNToFloatx80( commonNaNT a ) z.low = a.high; else z.low = floatx80_default_nan_low; - z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF; + z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF; return z; } @@ -519,7 +519,7 @@ int float128_is_nan( float128 a ) && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); #else return - ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) + ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); #endif } @@ -533,7 +533,7 @@ int float128_is_signaling_nan( float128 a ) { #if SNAN_BIT_IS_ONE return - ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) + ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); #else return @@ -568,7 +568,7 @@ static float128 commonNaNToFloat128( commonNaNT a ) float128 z; shift128Right( a.high, a.low, 16, &z.high, &z.low ); - z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 ); + z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 ); return z; } diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 6f5b05d..8eaff14 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -79,7 +79,7 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM) | positive or negative integer is returned. *----------------------------------------------------------------------------*/ -static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) +static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -110,7 +110,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) if ( zSign ) z = - z; if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) { float_raise( float_flag_invalid STATUS_VAR); - return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact; return z; @@ -129,7 +129,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) | returned. *----------------------------------------------------------------------------*/ -static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM) +static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM) { int8 roundingMode; flag roundNearestEven, increment; @@ -137,7 +137,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); - increment = ( (sbits64) absZ1 < 0 ); + increment = ( (int64_t) absZ1 < 0 ); if ( ! roundNearestEven ) { if ( roundingMode == float_round_to_zero ) { increment = 0; @@ -154,7 +154,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA if ( increment ) { ++absZ0; if ( absZ0 == 0 ) goto overflow; - absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven ); + absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven ); } z = absZ0; if ( zSign ) z = - z; @@ -162,7 +162,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA overflow: float_raise( float_flag_invalid STATUS_VAR); return - zSign ? (sbits64) LIT64( 0x8000000000000000 ) + zSign ? (int64_t) LIT64( 0x8000000000000000 ) : LIT64( 0x7FFFFFFFFFFFFFFF ); } if ( absZ1 ) STATUS(float_exception_flags) |= float_flag_inexact; @@ -174,7 +174,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA | Returns the fraction bits of the single-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits32 extractFloat32Frac( float32 a ) +INLINE uint32_t extractFloat32Frac( float32 a ) { return float32_val(a) & 0x007FFFFF; @@ -211,7 +211,7 @@ INLINE flag extractFloat32Sign( float32 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr ) + normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr ) { int8 shiftCount; @@ -232,11 +232,11 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) +INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) { return make_float32( - ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig); + ( ( (uint32_t) zSign )<<31 ) + ( ( (uint32_t) zExp )<<23 ) + zSig); } @@ -262,7 +262,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) +static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -287,10 +287,10 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_P } } roundBits = zSig & 0x7F; - if ( 0xFD <= (bits16) zExp ) { + if ( 0xFD <= (uint16_t) zExp ) { if ( ( 0xFD < zExp ) || ( ( zExp == 0xFD ) - && ( (sbits32) ( zSig + roundIncrement ) < 0 ) ) + && ( (int32_t) ( zSig + roundIncrement ) < 0 ) ) ) { float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR); return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 )); @@ -325,7 +325,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_P *----------------------------------------------------------------------------*/ static float32 - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) + normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) { int8 shiftCount; @@ -338,7 +338,7 @@ static float32 | Returns the fraction bits of the double-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloat64Frac( float64 a ) +INLINE uint64_t extractFloat64Frac( float64 a ) { return float64_val(a) & LIT64( 0x000FFFFFFFFFFFFF ); @@ -375,7 +375,7 @@ INLINE flag extractFloat64Sign( float64 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr ) + normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr ) { int8 shiftCount; @@ -396,11 +396,11 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) +INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) { return make_float64( - ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig); + ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig); } @@ -426,7 +426,7 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) +static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -451,10 +451,10 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_P } } roundBits = zSig & 0x3FF; - if ( 0x7FD <= (bits16) zExp ) { + if ( 0x7FD <= (uint16_t) zExp ) { if ( ( 0x7FD < zExp ) || ( ( zExp == 0x7FD ) - && ( (sbits64) ( zSig + roundIncrement ) < 0 ) ) + && ( (int64_t) ( zSig + roundIncrement ) < 0 ) ) ) { float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR); return packFloat64( zSign, 0x7FF, - ( roundIncrement == 0 )); @@ -489,7 +489,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_P *----------------------------------------------------------------------------*/ static float64 - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) + normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) { int8 shiftCount; @@ -505,7 +505,7 @@ static float64 | value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloatx80Frac( floatx80 a ) +INLINE uint64_t extractFloatx80Frac( floatx80 a ) { return a.low; @@ -544,7 +544,7 @@ INLINE flag extractFloatx80Sign( floatx80 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr ) + normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr ) { int8 shiftCount; @@ -559,12 +559,12 @@ static void | extended double-precision floating-point value, returning the result. *----------------------------------------------------------------------------*/ -INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) +INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig ) { floatx80 z; z.low = zSig; - z.high = ( ( (bits16) zSign )<<15 ) + zExp; + z.high = ( ( (uint16_t) zSign )<<15 ) + zExp; return z; } @@ -595,7 +595,7 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) static floatx80 roundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 + int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int8 roundingMode; @@ -632,7 +632,7 @@ static floatx80 } } roundBits = zSig0 & roundMask; - if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) { + if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) { if ( ( 0x7FFE < zExp ) || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) ) ) { @@ -650,7 +650,7 @@ static floatx80 if ( isTiny && roundBits ) float_raise( float_flag_underflow STATUS_VAR); if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact; zSig0 += roundIncrement; - if ( (sbits64) zSig0 < 0 ) zExp = 1; + if ( (int64_t) zSig0 < 0 ) zExp = 1; roundIncrement = roundMask + 1; if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) { roundMask |= roundIncrement; @@ -673,7 +673,7 @@ static floatx80 if ( zSig0 == 0 ) zExp = 0; return packFloatx80( zSign, zExp, zSig0 ); precision80: - increment = ( (sbits64) zSig1 < 0 ); + increment = ( (int64_t) zSig1 < 0 ); if ( ! roundNearestEven ) { if ( roundingMode == float_round_to_zero ) { increment = 0; @@ -687,7 +687,7 @@ static floatx80 } } } - if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) { + if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) { if ( ( 0x7FFE < zExp ) || ( ( zExp == 0x7FFE ) && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) ) @@ -716,7 +716,7 @@ static floatx80 if ( isTiny && zSig1 ) float_raise( float_flag_underflow STATUS_VAR); if ( zSig1 ) STATUS(float_exception_flags) |= float_flag_inexact; if ( roundNearestEven ) { - increment = ( (sbits64) zSig1 < 0 ); + increment = ( (int64_t) zSig1 < 0 ); } else { if ( zSign ) { @@ -729,8 +729,8 @@ static floatx80 if ( increment ) { ++zSig0; zSig0 &= - ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven ); - if ( (sbits64) zSig0 < 0 ) zExp = 1; + ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven ); + if ( (int64_t) zSig0 < 0 ) zExp = 1; } return packFloatx80( zSign, zExp, zSig0 ); } @@ -743,7 +743,7 @@ static floatx80 zSig0 = LIT64( 0x8000000000000000 ); } else { - zSig0 &= ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven ); + zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven ); } } else { @@ -764,7 +764,7 @@ static floatx80 static floatx80 normalizeRoundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 + int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int8 shiftCount; @@ -791,7 +791,7 @@ static floatx80 | floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloat128Frac1( float128 a ) +INLINE uint64_t extractFloat128Frac1( float128 a ) { return a.low; @@ -803,7 +803,7 @@ INLINE bits64 extractFloat128Frac1( float128 a ) | floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloat128Frac0( float128 a ) +INLINE uint64_t extractFloat128Frac0( float128 a ) { return a.high & LIT64( 0x0000FFFFFFFFFFFF ); @@ -845,11 +845,11 @@ INLINE flag extractFloat128Sign( float128 a ) static void normalizeFloat128Subnormal( - bits64 aSig0, - bits64 aSig1, + uint64_t aSig0, + uint64_t aSig1, int32 *zExpPtr, - bits64 *zSig0Ptr, - bits64 *zSig1Ptr + uint64_t *zSig0Ptr, + uint64_t *zSig1Ptr ) { int8 shiftCount; @@ -888,12 +888,12 @@ static void *----------------------------------------------------------------------------*/ INLINE float128 - packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 ) + packFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 ) { float128 z; z.low = zSig1; - z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0; + z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0; return z; } @@ -921,14 +921,14 @@ INLINE float128 static float128 roundAndPackFloat128( - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 STATUS_PARAM) + flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM) { int8 roundingMode; flag roundNearestEven, increment, isTiny; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); - increment = ( (sbits64) zSig2 < 0 ); + increment = ( (int64_t) zSig2 < 0 ); if ( ! roundNearestEven ) { if ( roundingMode == float_round_to_zero ) { increment = 0; @@ -942,7 +942,7 @@ static float128 } } } - if ( 0x7FFD <= (bits32) zExp ) { + if ( 0x7FFD <= (uint32_t) zExp ) { if ( ( 0x7FFD < zExp ) || ( ( zExp == 0x7FFD ) && eq128( @@ -986,7 +986,7 @@ static float128 zExp = 0; if ( isTiny && zSig2 ) float_raise( float_flag_underflow STATUS_VAR); if ( roundNearestEven ) { - increment = ( (sbits64) zSig2 < 0 ); + increment = ( (int64_t) zSig2 < 0 ); } else { if ( zSign ) { @@ -1022,10 +1022,10 @@ static float128 static float128 normalizeRoundAndPackFloat128( - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) + flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int8 shiftCount; - bits64 zSig2; + uint64_t zSig2; if ( zSig0 == 0 ) { zSig0 = zSig1; @@ -1059,7 +1059,7 @@ float32 int32_to_float32( int32 a STATUS_PARAM ) flag zSign; if ( a == 0 ) return float32_zero; - if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 ); + if ( a == (int32_t) 0x80000000 ) return packFloat32( 1, 0x9E, 0 ); zSign = ( a < 0 ); return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a STATUS_VAR ); @@ -1076,7 +1076,7 @@ float64 int32_to_float64( int32 a STATUS_PARAM ) flag zSign; uint32 absA; int8 shiftCount; - bits64 zSig; + uint64_t zSig; if ( a == 0 ) return float64_zero; zSign = ( a < 0 ); @@ -1101,7 +1101,7 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) flag zSign; uint32 absA; int8 shiftCount; - bits64 zSig; + uint64_t zSig; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); zSign = ( a < 0 ); @@ -1127,7 +1127,7 @@ float128 int32_to_float128( int32 a STATUS_PARAM ) flag zSign; uint32 absA; int8 shiftCount; - bits64 zSig0; + uint64_t zSig0; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); zSign = ( a < 0 ); @@ -1204,7 +1204,7 @@ float64 int64_to_float64( int64 a STATUS_PARAM ) flag zSign; if ( a == 0 ) return float64_zero; - if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) { + if ( a == (int64_t) LIT64( 0x8000000000000000 ) ) { return packFloat64( 1, 0x43E, 0 ); } zSign = ( a < 0 ); @@ -1258,7 +1258,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) uint64 absA; int8 shiftCount; int32 zExp; - bits64 zSig0, zSig1; + uint64_t zSig0, zSig1; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); zSign = ( a < 0 ); @@ -1295,8 +1295,8 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; - bits64 aSig64; + uint32_t aSig; + uint64_t aSig64; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1325,7 +1325,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; + uint32_t aSig; int32 z; aSig = extractFloat32Frac( a ); @@ -1337,7 +1337,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) float_raise( float_flag_invalid STATUS_VAR); if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF; } - return (sbits32) 0x80000000; + return (int32_t) 0x80000000; } else if ( aExp <= 0x7E ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; @@ -1345,7 +1345,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) } aSig = ( aSig | 0x00800000 )<<8; z = aSig>>( - shiftCount ); - if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) { + if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) z = - z; @@ -1367,7 +1367,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; + uint32_t aSig; int32 z; aSig = extractFloat32Frac( a ); @@ -1381,7 +1381,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) return 0x7FFF; } } - return (sbits32) 0xffff8000; + return (int32_t) 0xffff8000; } else if ( aExp <= 0x7E ) { if ( aExp | aSig ) { @@ -1392,7 +1392,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) shiftCount -= 0x10; aSig = ( aSig | 0x00800000 )<<8; z = aSig>>( - shiftCount ); - if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) { + if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) { @@ -1416,8 +1416,8 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; - bits64 aSig64, aSigExtra; + uint32_t aSig; + uint64_t aSig64, aSigExtra; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1428,7 +1428,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } if ( aExp ) aSig |= 0x00800000; aSig64 = aSig; @@ -1452,8 +1452,8 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; - bits64 aSig64; + uint32_t aSig; + uint64_t aSig64; int64 z; aSig = extractFloat32Frac( a ); @@ -1467,7 +1467,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } else if ( aExp <= 0x7E ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; @@ -1476,7 +1476,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) aSig64 = aSig | 0x00800000; aSig64 <<= 40; z = aSig64>>( - shiftCount ); - if ( (bits64) ( aSig64<<( shiftCount & 63 ) ) ) { + if ( (uint64_t) ( aSig64<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) z = - z; @@ -1495,7 +1495,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1509,7 +1509,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) normalizeFloat32Subnormal( aSig, &aExp, &aSig ); --aExp; } - return packFloat64( aSign, aExp + 0x380, ( (bits64) aSig )<<29 ); + return packFloat64( aSign, aExp + 0x380, ( (uint64_t) aSig )<<29 ); } @@ -1526,7 +1526,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1540,7 +1540,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) normalizeFloat32Subnormal( aSig, &aExp, &aSig ); } aSig |= 0x00800000; - return packFloatx80( aSign, aExp + 0x3F80, ( (bits64) aSig )<<40 ); + return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 ); } @@ -1559,7 +1559,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1573,7 +1573,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) normalizeFloat32Subnormal( aSig, &aExp, &aSig ); --aExp; } - return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 ); + return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 ); } @@ -1590,9 +1590,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) { flag aSign; int16 aExp; - bits32 lastBitMask, roundBitsMask; + uint32_t lastBitMask, roundBitsMask; int8 roundingMode; - bits32 z; + uint32_t z; aExp = extractFloat32Exp( a ); if ( 0x96 <= aExp ) { @@ -1602,7 +1602,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) return a; } if ( aExp <= 0x7E ) { - if ( (bits32) ( float32_val(a)<<1 ) == 0 ) return a; + if ( (uint32_t) ( float32_val(a)<<1 ) == 0 ) return a; STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloat32Sign( a ); switch ( STATUS(float_rounding_mode) ) { @@ -1649,7 +1649,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { int16 aExp, bExp, zExp; - bits32 aSig, bSig, zSig; + uint32_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat32Frac( a ); @@ -1703,7 +1703,7 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) aSig |= 0x20000000; zSig = ( aSig + bSig )<<1; --zExp; - if ( (sbits32) zSig < 0 ) { + if ( (int32_t) zSig < 0 ) { zSig = aSig + bSig; ++zExp; } @@ -1723,7 +1723,7 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { int16 aExp, bExp, zExp; - bits32 aSig, bSig, zSig; + uint32_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat32Frac( a ); @@ -1839,9 +1839,9 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits32 aSig, bSig; - bits64 zSig64; - bits32 zSig; + uint32_t aSig, bSig; + uint64_t zSig64; + uint32_t zSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1879,9 +1879,9 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) zExp = aExp + bExp - 0x7F; aSig = ( aSig | 0x00800000 )<<7; bSig = ( bSig | 0x00800000 )<<8; - shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 ); + shift64RightJamming( ( (uint64_t) aSig ) * bSig, 32, &zSig64 ); zSig = zSig64; - if ( 0 <= (sbits32) ( zSig<<1 ) ) { + if ( 0 <= (int32_t) ( zSig<<1 ) ) { zSig <<= 1; --zExp; } @@ -1899,7 +1899,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits32 aSig, bSig, zSig; + uint32_t aSig, bSig, zSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1943,9 +1943,9 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) aSig >>= 1; ++zExp; } - zSig = ( ( (bits64) aSig )<<32 ) / bSig; + zSig = ( ( (uint64_t) aSig )<<32 ) / bSig; if ( ( zSig & 0x3F ) == 0 ) { - zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 ); + zSig |= ( (uint64_t) bSig * zSig != ( (uint64_t) aSig )<<32 ); } return roundAndPackFloat32( zSign, zExp, zSig STATUS_VAR ); @@ -1961,11 +1961,11 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) { flag aSign, zSign; int16 aExp, bExp, expDiff; - bits32 aSig, bSig; - bits32 q; - bits64 aSig64, bSig64, q64; - bits32 alternateASig; - sbits32 sigMean; + uint32_t aSig, bSig; + uint32_t q; + uint64_t aSig64, bSig64, q64; + uint32_t alternateASig; + int32_t sigMean; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -2007,7 +2007,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) q = ( bSig <= aSig ); if ( q ) aSig -= bSig; if ( 0 < expDiff ) { - q = ( ( (bits64) aSig )<<32 ) / bSig; + q = ( ( (uint64_t) aSig )<<32 ) / bSig; q >>= 32 - expDiff; bSig >>= 2; aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q; @@ -2019,8 +2019,8 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) } else { if ( bSig <= aSig ) aSig -= bSig; - aSig64 = ( (bits64) aSig )<<40; - bSig64 = ( (bits64) bSig )<<40; + aSig64 = ( (uint64_t) aSig )<<40; + bSig64 = ( (uint64_t) bSig )<<40; expDiff -= 64; while ( 0 < expDiff ) { q64 = estimateDiv128To64( aSig64, 0, bSig64 ); @@ -2039,12 +2039,12 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) alternateASig = aSig; ++q; aSig -= bSig; - } while ( 0 <= (sbits32) aSig ); + } while ( 0 <= (int32_t) aSig ); sigMean = aSig + alternateASig; if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) { aSig = alternateASig; } - zSign = ( (sbits32) aSig < 0 ); + zSign = ( (int32_t) aSig < 0 ); if ( zSign ) aSig = - aSig; return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig STATUS_VAR ); @@ -2060,8 +2060,8 @@ float32 float32_sqrt( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, zExp; - bits32 aSig, zSig; - bits64 rem, term; + uint32_t aSig, zSig; + uint64_t rem, term; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -2090,11 +2090,11 @@ float32 float32_sqrt( float32 a STATUS_PARAM ) goto roundAndPack; } aSig >>= aExp & 1; - term = ( (bits64) zSig ) * zSig; - rem = ( ( (bits64) aSig )<<32 ) - term; - while ( (sbits64) rem < 0 ) { + term = ( (uint64_t) zSig ) * zSig; + rem = ( ( (uint64_t) aSig )<<32 ) - term; + while ( (int64_t) rem < 0 ) { --zSig; - rem += ( ( (bits64) zSig )<<1 ) | 1; + rem += ( ( (uint64_t) zSig )<<1 ) | 1; } zSig |= ( rem != 0 ); } @@ -2145,7 +2145,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; float64 r, x, xn; int i; @@ -2192,7 +2192,7 @@ float32 float32_log2( float32 a STATUS_PARAM ) { flag aSign, zSign; int16 aExp; - bits32 aSig, zSig, i; + uint32_t aSig, zSig, i; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -2217,7 +2217,7 @@ float32 float32_log2( float32 a STATUS_PARAM ) zSig = aExp << 23; for (i = 1 << 22; i > 0; i >>= 1) { - aSig = ( (bits64)aSig * aSig ) >> 23; + aSig = ( (uint64_t)aSig * aSig ) >> 23; if ( aSig & 0x01000000 ) { aSig >>= 1; zSig |= i; @@ -2248,7 +2248,7 @@ int float32_eq( float32 a, float32 b STATUS_PARAM ) return 0; } return ( float32_val(a) == float32_val(b) ) || - ( (bits32) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 ); + ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 ); } @@ -2262,7 +2262,7 @@ int float32_eq( float32 a, float32 b STATUS_PARAM ) int float32_le( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) @@ -2274,7 +2274,7 @@ int float32_le( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -2288,7 +2288,7 @@ int float32_le( float32 a, float32 b STATUS_PARAM ) int float32_lt( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) @@ -2300,7 +2300,7 @@ int float32_lt( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -2314,7 +2314,7 @@ int float32_lt( float32 a, float32 b STATUS_PARAM ) int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) { - bits32 av, bv; + uint32_t av, bv; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) @@ -2324,7 +2324,7 @@ int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) } av = float32_val(a); bv = float32_val(b); - return ( av == bv ) || ( (bits32) ( ( av | bv )<<1 ) == 0 ); + return ( av == bv ) || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); } @@ -2338,7 +2338,7 @@ int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) @@ -2352,7 +2352,7 @@ int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -2367,7 +2367,7 @@ int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) @@ -2381,7 +2381,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -2400,7 +2400,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2427,7 +2427,7 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig, savedASig; + uint64_t aSig, savedASig; int32 z; aSig = extractFloat64Frac( a ); @@ -2450,7 +2450,7 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) if ( ( z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( ( aSig<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -2473,7 +2473,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig, savedASig; + uint64_t aSig, savedASig; int32 z; aSig = extractFloat64Frac( a ); @@ -2502,7 +2502,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) if ( ( (int16_t)z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0xffff8000 : 0x7FFF; + return aSign ? (int32_t) 0xffff8000 : 0x7FFF; } if ( ( aSig<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -2524,7 +2524,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig, aSigExtra; + uint64_t aSig, aSigExtra; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2540,7 +2540,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } aSigExtra = 0; aSig <<= - shiftCount; @@ -2566,7 +2566,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; int64 z; aSig = extractFloat64Frac( a ); @@ -2585,7 +2585,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } z = aSig<<shiftCount; } @@ -2595,7 +2595,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) return 0; } z = aSig>>( - shiftCount ); - if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { + if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } @@ -2615,8 +2615,8 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; - bits32 zSig; + uint64_t aSig; + uint32_t zSig; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2646,19 +2646,19 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) | than the desired result exponent whenever `zSig' is a complete, normalized | significand. *----------------------------------------------------------------------------*/ -static bits16 packFloat16(flag zSign, int16 zExp, bits16 zSig) +static uint16_t packFloat16(flag zSign, int16 zExp, uint16_t zSig) { - return (((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig; + return (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig; } /* Half precision floats come in two formats: standard IEEE and "ARM" format. The latter gains extra exponent range by omitting the NaN/Inf encodings. */ -float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM ) +float32 float16_to_float32( uint16_t a, flag ieee STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSign = a >> 15; aExp = (a >> 10) & 0x1f; @@ -2686,13 +2686,13 @@ float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM ) return packFloat32( aSign, aExp + 0x70, aSig << 13); } -bits16 float32_to_float16( float32 a, flag ieee STATUS_PARAM) +uint16_t float32_to_float16( float32 a, flag ieee STATUS_PARAM) { flag aSign; int16 aExp; - bits32 aSig; - bits32 mask; - bits32 increment; + uint32_t aSig; + uint32_t mask; + uint32_t increment; int8 roundingMode; aSig = extractFloat32Frac( a ); @@ -2786,7 +2786,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; + uint64_t aSig; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2820,7 +2820,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig, zSig0, zSig1; + uint64_t aSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2852,9 +2852,9 @@ float64 float64_round_to_int( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 lastBitMask, roundBitsMask; + uint64_t lastBitMask, roundBitsMask; int8 roundingMode; - bits64 z; + uint64_t z; aExp = extractFloat64Exp( a ); if ( 0x433 <= aExp ) { @@ -2864,7 +2864,7 @@ float64 float64_round_to_int( float64 a STATUS_PARAM ) return a; } if ( aExp < 0x3FF ) { - if ( (bits64) ( float64_val(a)<<1 ) == 0 ) return a; + if ( (uint64_t) ( float64_val(a)<<1 ) == 0 ) return a; STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloat64Sign( a ); switch ( STATUS(float_rounding_mode) ) { @@ -2924,7 +2924,7 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM) static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig; + uint64_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat64Frac( a ); @@ -2978,7 +2978,7 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) aSig |= LIT64( 0x2000000000000000 ); zSig = ( aSig + bSig )<<1; --zExp; - if ( (sbits64) zSig < 0 ) { + if ( (int64_t) zSig < 0 ) { zSig = aSig + bSig; ++zExp; } @@ -2998,7 +2998,7 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig; + uint64_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat64Frac( a ); @@ -3114,7 +3114,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3154,7 +3154,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11; mul64To128( aSig, bSig, &zSig0, &zSig1 ); zSig0 |= ( zSig1 != 0 ); - if ( 0 <= (sbits64) ( zSig0<<1 ) ) { + if ( 0 <= (int64_t) ( zSig0<<1 ) ) { zSig0 <<= 1; --zExp; } @@ -3172,9 +3172,9 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig; - bits64 rem0, rem1; - bits64 term0, term1; + uint64_t aSig, bSig, zSig; + uint64_t rem0, rem1; + uint64_t term0, term1; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3222,7 +3222,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) if ( ( zSig & 0x1FF ) <= 2 ) { mul64To128( bSig, zSig, &term0, &term1 ); sub128( aSig, 0, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig; add128( rem0, rem1, 0, bSig, &rem0, &rem1 ); } @@ -3242,9 +3242,9 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) { flag aSign, zSign; int16 aExp, bExp, expDiff; - bits64 aSig, bSig; - bits64 q, alternateASig; - sbits64 sigMean; + uint64_t aSig, bSig; + uint64_t q, alternateASig; + int64_t sigMean; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3305,12 +3305,12 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) alternateASig = aSig; ++q; aSig -= bSig; - } while ( 0 <= (sbits64) aSig ); + } while ( 0 <= (int64_t) aSig ); sigMean = aSig + alternateASig; if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) { aSig = alternateASig; } - zSign = ( (sbits64) aSig < 0 ); + zSign = ( (int64_t) aSig < 0 ); if ( zSign ) aSig = - aSig; return normalizeRoundAndPackFloat64( aSign ^ zSign, bExp, aSig STATUS_VAR ); @@ -3326,8 +3326,8 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, zExp; - bits64 aSig, zSig, doubleZSig; - bits64 rem0, rem1, term0, term1; + uint64_t aSig, zSig, doubleZSig; + uint64_t rem0, rem1, term0, term1; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3356,7 +3356,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) doubleZSig = zSig<<1; mul64To128( zSig, zSig, &term0, &term1 ); sub128( aSig, 0, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig; doubleZSig -= 2; add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 ); @@ -3376,7 +3376,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) { flag aSign, zSign; int16 aExp; - bits64 aSig, aSig0, aSig1, zSig, i; + uint64_t aSig, aSig0, aSig1, zSig, i; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3398,7 +3398,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) aExp -= 0x3FF; aSig |= LIT64( 0x0010000000000000 ); zSign = aExp < 0; - zSig = (bits64)aExp << 52; + zSig = (uint64_t)aExp << 52; for (i = 1LL << 51; i > 0; i >>= 1) { mul64To128( aSig, aSig, &aSig0, &aSig1 ); aSig = ( aSig0 << 12 ) | ( aSig1 >> 52 ); @@ -3421,7 +3421,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) int float64_eq( float64 a, float64 b STATUS_PARAM ) { - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3433,7 +3433,7 @@ int float64_eq( float64 a, float64 b STATUS_PARAM ) } av = float64_val(a); bv = float64_val(b); - return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); } @@ -3447,7 +3447,7 @@ int float64_eq( float64 a, float64 b STATUS_PARAM ) int float64_le( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3459,7 +3459,7 @@ int float64_le( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -3473,7 +3473,7 @@ int float64_le( float64 a, float64 b STATUS_PARAM ) int float64_lt( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3485,7 +3485,7 @@ int float64_lt( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -3499,7 +3499,7 @@ int float64_lt( float64 a, float64 b STATUS_PARAM ) int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) { - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3509,7 +3509,7 @@ int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) } av = float64_val(a); bv = float64_val(b); - return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); } @@ -3523,7 +3523,7 @@ int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3537,7 +3537,7 @@ int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -3552,7 +3552,7 @@ int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3566,7 +3566,7 @@ int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -3587,12 +3587,12 @@ int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0; + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0; shiftCount = 0x4037 - aExp; if ( shiftCount <= 0 ) shiftCount = 1; shift64RightJamming( aSig, shiftCount, &aSig ); @@ -3614,14 +3614,14 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig, savedASig; + uint64_t aSig, savedASig; int32 z; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( 0x401E < aExp ) { - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0; + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0; goto invalid; } else if ( aExp < 0x3FFF ) { @@ -3636,7 +3636,7 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) if ( ( z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( ( aSig<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -3659,7 +3659,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig, aSigExtra; + uint64_t aSig, aSigExtra; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -3674,7 +3674,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } aSigExtra = 0; } @@ -3699,7 +3699,7 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; int64 z; aSig = extractFloatx80Frac( a ); @@ -3714,14 +3714,14 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } else if ( aExp < 0x3FFF ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; return 0; } z = aSig>>( - shiftCount ); - if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { + if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) z = - z; @@ -3740,13 +3740,13 @@ float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig; + uint64_t aSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) { + if ( (uint64_t) ( aSig<<1 ) ) { return commonNaNToFloat32( floatx80ToCommonNaN( a STATUS_VAR ) ); } return packFloat32( aSign, 0xFF, 0 ); @@ -3768,13 +3768,13 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig, zSig; + uint64_t aSig, zSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) { + if ( (uint64_t) ( aSig<<1 ) ) { return commonNaNToFloat64( floatx80ToCommonNaN( a STATUS_VAR ) ); } return packFloat64( aSign, 0x7FF, 0 ); @@ -3798,12 +3798,12 @@ float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig, zSig0, zSig1; + uint64_t aSig, zSig0, zSig1; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) { + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) { return commonNaNToFloat128( floatx80ToCommonNaN( a STATUS_VAR ) ); } shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 ); @@ -3824,27 +3824,27 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 lastBitMask, roundBitsMask; + uint64_t lastBitMask, roundBitsMask; int8 roundingMode; floatx80 z; aExp = extractFloatx80Exp( a ); if ( 0x403E <= aExp ) { - if ( ( aExp == 0x7FFF ) && (bits64) ( extractFloatx80Frac( a )<<1 ) ) { + if ( ( aExp == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) { return propagateFloatx80NaN( a, a STATUS_VAR ); } return a; } if ( aExp < 0x3FFF ) { if ( ( aExp == 0 ) - && ( (bits64) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) { + && ( (uint64_t) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) { return a; } STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloatx80Sign( a ); switch ( STATUS(float_rounding_mode) ) { case float_round_nearest_even: - if ( ( aExp == 0x3FFE ) && (bits64) ( extractFloatx80Frac( a )<<1 ) + if ( ( aExp == 0x3FFE ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) { return packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) ); @@ -3897,7 +3897,7 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM) { int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; int32 expDiff; aSig = extractFloatx80Frac( a ); @@ -3907,7 +3907,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM expDiff = aExp - bExp; if ( 0 < expDiff ) { if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return a; } if ( bExp == 0 ) --expDiff; @@ -3916,7 +3916,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM } else if ( expDiff < 0 ) { if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( aExp == 0 ) ++expDiff; @@ -3925,7 +3925,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM } else { if ( aExp == 0x7FFF ) { - if ( (bits64) ( ( aSig | bSig )<<1 ) ) { + if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } return a; @@ -3940,7 +3940,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM goto shiftRight1; } zSig0 = aSig + bSig; - if ( (sbits64) zSig0 < 0 ) goto roundAndPack; + if ( (int64_t) zSig0 < 0 ) goto roundAndPack; shiftRight1: shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 ); zSig0 |= LIT64( 0x8000000000000000 ); @@ -3963,7 +3963,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM ) { int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; int32 expDiff; floatx80 z; @@ -3975,7 +3975,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM if ( 0 < expDiff ) goto aExpBigger; if ( expDiff < 0 ) goto bExpBigger; if ( aExp == 0x7FFF ) { - if ( (bits64) ( ( aSig | bSig )<<1 ) ) { + if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } float_raise( float_flag_invalid STATUS_VAR); @@ -3993,7 +3993,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM return packFloatx80( STATUS(float_rounding_mode) == float_round_down, 0, 0 ); bExpBigger: if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( aExp == 0 ) ++expDiff; @@ -4005,7 +4005,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM goto normalizeRoundAndPack; aExpBigger: if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return a; } if ( bExp == 0 ) --expDiff; @@ -4072,7 +4072,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; floatx80 z; aSig = extractFloatx80Frac( a ); @@ -4083,15 +4083,15 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) bSign = extractFloatx80Sign( b ); zSign = aSign ^ bSign; if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) - || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) { + if ( (uint64_t) ( aSig<<1 ) + || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } if ( ( bExp | bSig ) == 0 ) goto invalid; return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); if ( ( aExp | aSig ) == 0 ) { invalid: float_raise( float_flag_invalid STATUS_VAR); @@ -4111,7 +4111,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) } zExp = aExp + bExp - 0x3FFE; mul64To128( aSig, bSig, &zSig0, &zSig1 ); - if ( 0 < (sbits64) zSig0 ) { + if ( 0 < (int64_t) zSig0 ) { shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 ); --zExp; } @@ -4131,8 +4131,8 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; - bits64 rem0, rem1, rem2, term0, term1, term2; + uint64_t aSig, bSig, zSig0, zSig1; + uint64_t rem0, rem1, rem2, term0, term1, term2; floatx80 z; aSig = extractFloatx80Frac( a ); @@ -4143,15 +4143,15 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) bSign = extractFloatx80Sign( b ); zSign = aSign ^ bSign; if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); goto invalid; } return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return packFloatx80( zSign, 0, 0 ); } if ( bExp == 0 ) { @@ -4181,15 +4181,15 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) zSig0 = estimateDiv128To64( aSig, rem1, bSig ); mul64To128( bSig, zSig0, &term0, &term1 ); sub128( aSig, rem1, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; add128( rem0, rem1, 0, bSig, &rem0, &rem1 ); } zSig1 = estimateDiv128To64( rem1, 0, bSig ); - if ( (bits64) ( zSig1<<1 ) <= 8 ) { + if ( (uint64_t) ( zSig1<<1 ) <= 8 ) { mul64To128( bSig, zSig1, &term1, &term2 ); sub128( rem1, 0, term1, term2, &rem1, &rem2 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; add128( rem1, rem2, 0, bSig, &rem1, &rem2 ); } @@ -4211,8 +4211,8 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, zSign; int32 aExp, bExp, expDiff; - bits64 aSig0, aSig1, bSig; - bits64 q, term0, term1, alternateASig0, alternateASig1; + uint64_t aSig0, aSig1, bSig; + uint64_t q, term0, term1, alternateASig0, alternateASig1; floatx80 z; aSig0 = extractFloatx80Frac( a ); @@ -4221,14 +4221,14 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) bSig = extractFloatx80Frac( b ); bExp = extractFloatx80Exp( b ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig0<<1 ) - || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) { + if ( (uint64_t) ( aSig0<<1 ) + || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } goto invalid; } if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return a; } if ( bExp == 0 ) { @@ -4242,7 +4242,7 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) normalizeFloatx80Subnormal( bSig, &bExp, &bSig ); } if ( aExp == 0 ) { - if ( (bits64) ( aSig0<<1 ) == 0 ) return a; + if ( (uint64_t) ( aSig0<<1 ) == 0 ) return a; normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 ); } bSig |= LIT64( 0x8000000000000000 ); @@ -4307,15 +4307,15 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, zExp; - bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0; - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; + uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0; + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; floatx80 z; aSig0 = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a STATUS_VAR ); + if ( (uint64_t) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a STATUS_VAR ); if ( ! aSign ) return a; goto invalid; } @@ -4338,7 +4338,7 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) doubleZSig0 = zSig0<<1; mul64To128( zSig0, zSig0, &term0, &term1 ); sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; doubleZSig0 -= 2; add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 ); @@ -4350,7 +4350,7 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) sub128( rem1, 0, term1, term2, &rem1, &rem2 ); mul64To128( zSig1, zSig1, &term2, &term3 ); sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; shortShift128Left( 0, zSig1, 1, &term2, &term3 ); term3 |= 1; @@ -4378,9 +4378,9 @@ int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM ) { if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { if ( floatx80_is_signaling_nan( a ) || floatx80_is_signaling_nan( b ) ) { @@ -4392,7 +4392,7 @@ int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -4409,9 +4409,9 @@ int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise( float_flag_invalid STATUS_VAR); return 0; @@ -4421,7 +4421,7 @@ int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -4442,9 +4442,9 @@ int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise( float_flag_invalid STATUS_VAR); return 0; @@ -4454,7 +4454,7 @@ int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -4474,9 +4474,9 @@ int floatx80_eq_signaling( floatx80 a, floatx80 b STATUS_PARAM ) { if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise( float_flag_invalid STATUS_VAR); return 0; @@ -4485,7 +4485,7 @@ int floatx80_eq_signaling( floatx80 a, floatx80 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -4502,9 +4502,9 @@ int floatx80_le_quiet( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { if ( floatx80_is_signaling_nan( a ) || floatx80_is_signaling_nan( b ) ) { @@ -4517,7 +4517,7 @@ int floatx80_le_quiet( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -4538,9 +4538,9 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { if ( floatx80_is_signaling_nan( a ) || floatx80_is_signaling_nan( b ) ) { @@ -4553,7 +4553,7 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -4580,7 +4580,7 @@ int32 float128_to_int32( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4609,7 +4609,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1, savedASig; + uint64_t aSig0, aSig1, savedASig; int32 z; aSig1 = extractFloat128Frac1( a ); @@ -4634,7 +4634,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) if ( ( z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( ( aSig0<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -4657,7 +4657,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4675,7 +4675,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 ); } @@ -4700,7 +4700,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; int64 z; aSig1 = extractFloat128Frac1( a ); @@ -4722,10 +4722,10 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) ); - if ( (bits64) ( aSig1<<shiftCount ) ) { + if ( (uint64_t) ( aSig1<<shiftCount ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } @@ -4738,7 +4738,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) } z = aSig0>>( - shiftCount ); if ( aSig1 - || ( shiftCount && (bits64) ( aSig0<<( shiftCount & 63 ) ) ) ) { + || ( shiftCount && (uint64_t) ( aSig0<<( shiftCount & 63 ) ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } @@ -4758,8 +4758,8 @@ float32 float128_to_float32( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; - bits32 zSig; + uint64_t aSig0, aSig1; + uint32_t zSig; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4793,7 +4793,7 @@ float64 float128_to_float64( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4828,7 +4828,7 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4865,7 +4865,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 lastBitMask, roundBitsMask; + uint64_t lastBitMask, roundBitsMask; int8 roundingMode; float128 z; @@ -4890,9 +4890,9 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask; } else { - if ( (sbits64) z.low < 0 ) { + if ( (int64_t) z.low < 0 ) { ++z.high; - if ( (bits64) ( z.low<<1 ) == 0 ) z.high &= ~1; + if ( (uint64_t) ( z.low<<1 ) == 0 ) z.high &= ~1; } } } @@ -4906,7 +4906,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) } else { if ( aExp < 0x3FFF ) { - if ( ( ( (bits64) ( a.high<<1 ) ) | a.low ) == 0 ) return a; + if ( ( ( (uint64_t) ( a.high<<1 ) ) | a.low ) == 0 ) return a; STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloat128Sign( a ); switch ( STATUS(float_rounding_mode) ) { @@ -4968,7 +4968,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; int32 expDiff; aSig1 = extractFloat128Frac1( a ); @@ -5049,7 +5049,7 @@ static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM static float128 subFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; int32 expDiff; float128 z; @@ -5174,7 +5174,7 @@ float128 float128_mul( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5238,8 +5238,8 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5293,7 +5293,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 ); mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 ); sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 ); } @@ -5301,7 +5301,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) if ( ( zSig1 & 0x3FFF ) <= 4 ) { mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 ); sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 ); } @@ -5322,9 +5322,9 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) { flag aSign, zSign; int32 aExp, bExp, expDiff; - bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; - bits64 allZero, alternateASig0, alternateASig1, sigMean1; - sbits64 sigMean0; + uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; + uint64_t allZero, alternateASig0, alternateASig1, sigMean1; + int64_t sigMean0; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5406,15 +5406,15 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) alternateASig1 = aSig1; ++q; sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 ); - } while ( 0 <= (sbits64) aSig0 ); + } while ( 0 <= (int64_t) aSig0 ); add128( - aSig0, aSig1, alternateASig0, alternateASig1, (bits64 *)&sigMean0, &sigMean1 ); + aSig0, aSig1, alternateASig0, alternateASig1, (uint64_t *)&sigMean0, &sigMean1 ); if ( ( sigMean0 < 0 ) || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) { aSig0 = alternateASig0; aSig1 = alternateASig1; } - zSign = ( (sbits64) aSig0 < 0 ); + zSign = ( (int64_t) aSig0 < 0 ); if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 ); return normalizeRoundAndPackFloat128( aSign ^ zSign, bExp - 4, aSig0, aSig1 STATUS_VAR ); @@ -5431,8 +5431,8 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, zExp; - bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; + uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5464,7 +5464,7 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) doubleZSig0 = zSig0<<1; mul64To128( zSig0, zSig0, &term0, &term1 ); sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; doubleZSig0 -= 2; add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 ); @@ -5476,7 +5476,7 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) sub128( rem1, 0, term1, term2, &rem1, &rem2 ); mul64To128( zSig1, zSig1, &term2, &term3 ); sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; shortShift128Left( 0, zSig1, 1, &term2, &term3 ); term3 |= 1; @@ -5514,7 +5514,7 @@ int float128_eq( float128 a, float128 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -5543,7 +5543,7 @@ int float128_le( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -5575,7 +5575,7 @@ int float128_lt( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -5606,7 +5606,7 @@ int float128_eq_signaling( float128 a, float128 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -5638,7 +5638,7 @@ int float128_le_quiet( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -5674,7 +5674,7 @@ int float128_lt_quiet( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -5832,7 +5832,7 @@ INLINE int float ## s ## _compare_internal( float ## s a, float ## s b, \ int is_quiet STATUS_PARAM ) \ { \ flag aSign, bSign; \ - bits ## s av, bv; \ + uint ## s ## _t av, bv; \ \ if (( ( extractFloat ## s ## Exp( a ) == nan_exp ) && \ extractFloat ## s ## Frac( a ) ) || \ @@ -5850,7 +5850,7 @@ INLINE int float ## s ## _compare_internal( float ## s a, float ## s b, \ av = float ## s ## _val(a); \ bv = float ## s ## _val(b); \ if ( aSign != bSign ) { \ - if ( (bits ## s) ( ( av | bv )<<1 ) == 0 ) { \ + if ( (uint ## s ## _t) ( ( av | bv )<<1 ) == 0 ) { \ /* zero case */ \ return float_relation_equal; \ } else { \ @@ -5927,7 +5927,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -5950,7 +5950,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; + uint64_t aSig; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -5974,7 +5974,7 @@ floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; + uint64_t aSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -5997,7 +5997,7 @@ float128 float128_scalbn( float128 a, int n STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index c62e769..c7854ed 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -59,21 +59,6 @@ typedef signed int int32; typedef uint64_t uint64; typedef int64_t int64; -/*---------------------------------------------------------------------------- -| Each of the following `typedef's defines a type that holds integers -| of _exactly_ the number of bits specified. For instance, for most -| implementation of C, `bits16' and `sbits16' should be `typedef'ed to -| `unsigned short int' and `signed short int' (or `short int'), respectively. -*----------------------------------------------------------------------------*/ -typedef uint8_t bits8; -typedef int8_t sbits8; -typedef uint16_t bits16; -typedef int16_t sbits16; -typedef uint32_t bits32; -typedef int32_t sbits32; -typedef uint64_t bits64; -typedef int64_t sbits64; - #define LIT64( a ) a##LL #define INLINE static inline @@ -245,8 +230,8 @@ float128 int64_to_float128( int64 STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software half-precision conversion routines. *----------------------------------------------------------------------------*/ -bits16 float32_to_float16( float32, flag STATUS_PARAM ); -float32 float16_to_float32( bits16, flag STATUS_PARAM ); +uint16_t float32_to_float16( float32, flag STATUS_PARAM ); +float32 float16_to_float32( uint16_t, flag STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. -- 1.7.3 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v3 6/7] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 5/7] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber @ 2010-12-18 16:25 ` Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 7/7] softfloat: Make float{32, 64}_to_uint16_round_to_zero() use uint_fast16_t Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2010-12-18 16:25 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber AIX already didn't use our definition, so let's start ripping out this one: As pointed out by Peter Maydell, int16 is currently int on most supported platforms, so let's replace it with int_fast16_t, allowing the system to use a wider type if appropriate. Note that Darwin uses [u]int16_t now, whereas Haiku uses [u]int32_t. v3: * Split off. Use [u]int_fast16_t rather than [u]int16_t. v2: * Rebased. Fix two new instances of int16. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: malc <av1474@comtv.ru> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-macros.h | 18 ++++---- fpu/softfloat.c | 114 ++++++++++++++++++++++++------------------------ fpu/softfloat.h | 8 +--- 3 files changed, 68 insertions(+), 72 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index e007039..c9aa2dd 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -39,7 +39,7 @@ these four paragraphs for those parts of this code that are retained. | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) +INLINE void shift32RightJamming( uint32_t a, int_fast16_t count, uint32_t *zPtr ) { uint32_t z; @@ -65,7 +65,7 @@ INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) +INLINE void shift64RightJamming( uint64_t a, int_fast16_t count, uint64_t *zPtr ) { uint64_t z; @@ -101,7 +101,7 @@ INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) INLINE void shift64ExtraRightJamming( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; int8 negCount = ( - count ) & 63; @@ -138,7 +138,7 @@ INLINE void INLINE void shift128Right( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; int8 negCount = ( - count ) & 63; @@ -173,7 +173,7 @@ INLINE void INLINE void shift128RightJamming( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; int8 negCount = ( - count ) & 63; @@ -227,7 +227,7 @@ INLINE void uint64_t a0, uint64_t a1, uint64_t a2, - int16 count, + int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr, uint64_t *z2Ptr @@ -282,7 +282,7 @@ INLINE void INLINE void shortShift128Left( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { *z1Ptr = a1<<count; @@ -304,7 +304,7 @@ INLINE void uint64_t a0, uint64_t a1, uint64_t a2, - int16 count, + int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr, uint64_t *z2Ptr @@ -575,7 +575,7 @@ static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b ) | value. *----------------------------------------------------------------------------*/ -static uint32_t estimateSqrt32( int16 aExp, uint32_t a ) +static uint32_t estimateSqrt32( int_fast16_t aExp, uint32_t a ) { static const uint16_t sqrtOddAdjustments[] = { 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 8eaff14..8282750 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -185,7 +185,7 @@ INLINE uint32_t extractFloat32Frac( float32 a ) | Returns the exponent bits of the single-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat32Exp( float32 a ) +INLINE int_fast16_t extractFloat32Exp( float32 a ) { return ( float32_val(a)>>23 ) & 0xFF; @@ -211,7 +211,7 @@ INLINE flag extractFloat32Sign( float32 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr ) + normalizeFloat32Subnormal( uint32_t aSig, int_fast16_t *zExpPtr, uint32_t *zSigPtr ) { int8 shiftCount; @@ -232,7 +232,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) +INLINE float32 packFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig ) { return make_float32( @@ -262,7 +262,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) +static float32 roundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -325,7 +325,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS *----------------------------------------------------------------------------*/ static float32 - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) + normalizeRoundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM) { int8 shiftCount; @@ -349,7 +349,7 @@ INLINE uint64_t extractFloat64Frac( float64 a ) | Returns the exponent bits of the double-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat64Exp( float64 a ) +INLINE int_fast16_t extractFloat64Exp( float64 a ) { return ( float64_val(a)>>52 ) & 0x7FF; @@ -375,7 +375,7 @@ INLINE flag extractFloat64Sign( float64 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr ) + normalizeFloat64Subnormal( uint64_t aSig, int_fast16_t *zExpPtr, uint64_t *zSigPtr ) { int8 shiftCount; @@ -396,7 +396,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) +INLINE float64 packFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig ) { return make_float64( @@ -426,11 +426,11 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) +static float64 roundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; - int16 roundIncrement, roundBits; + int_fast16_t roundIncrement, roundBits; flag isTiny; roundingMode = STATUS(float_rounding_mode); @@ -489,7 +489,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS *----------------------------------------------------------------------------*/ static float64 - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) + normalizeRoundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM) { int8 shiftCount; @@ -1294,7 +1294,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) int32 float32_to_int32( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64; @@ -1324,7 +1324,7 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; int32 z; @@ -1363,10 +1363,10 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) +int_fast16_t float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; int32 z; @@ -1415,7 +1415,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) int64 float32_to_int64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64, aSigExtra; @@ -1451,7 +1451,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64; int64 z; @@ -1494,7 +1494,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) float64 float32_to_float64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSig = extractFloat32Frac( a ); @@ -1525,7 +1525,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSig = extractFloat32Frac( a ); @@ -1558,7 +1558,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) float128 float32_to_float128( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSig = extractFloat32Frac( a ); @@ -1589,7 +1589,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) float32 float32_round_to_int( float32 a STATUS_PARAM) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t lastBitMask, roundBitsMask; int8 roundingMode; uint32_t z; @@ -1648,9 +1648,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1722,9 +1722,9 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1838,7 +1838,7 @@ float32 float32_sub( float32 a, float32 b STATUS_PARAM ) float32 float32_mul( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig; uint64_t zSig64; uint32_t zSig; @@ -1898,7 +1898,7 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) float32 float32_div( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; aSig = extractFloat32Frac( a ); @@ -1960,7 +1960,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) float32 float32_rem( float32 a, float32 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int_fast16_t aExp, bExp, expDiff; uint32_t aSig, bSig; uint32_t q; uint64_t aSig64, bSig64, q64; @@ -2059,7 +2059,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) float32 float32_sqrt( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int_fast16_t aExp, zExp; uint32_t aSig, zSig; uint64_t rem, term; @@ -2144,7 +2144,7 @@ static const float64 float32_exp2_coefficients[15] = float32 float32_exp2( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; float64 r, x, xn; int i; @@ -2191,7 +2191,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) float32 float32_log2( float32 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig, zSig, i; aSig = extractFloat32Frac( a ); @@ -2399,7 +2399,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) int32 float64_to_int32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig; aSig = extractFloat64Frac( a ); @@ -2426,7 +2426,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, savedASig; int32 z; @@ -2469,10 +2469,10 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) +int_fast16_t float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, savedASig; int32 z; @@ -2523,7 +2523,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) int64 float64_to_int64( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, aSigExtra; aSig = extractFloat64Frac( a ); @@ -2565,7 +2565,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig; int64 z; @@ -2614,7 +2614,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) float32 float64_to_float32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; uint32_t zSig; @@ -2646,7 +2646,7 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) | than the desired result exponent whenever `zSig' is a complete, normalized | significand. *----------------------------------------------------------------------------*/ -static uint16_t packFloat16(flag zSign, int16 zExp, uint16_t zSig) +static uint16_t packFloat16(flag zSign, int_fast16_t zExp, uint16_t zSig) { return (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig; } @@ -2657,7 +2657,7 @@ static uint16_t packFloat16(flag zSign, int16 zExp, uint16_t zSig) float32 float16_to_float32( uint16_t a, flag ieee STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSign = a >> 15; @@ -2689,7 +2689,7 @@ float32 float16_to_float32( uint16_t a, flag ieee STATUS_PARAM ) uint16_t float32_to_float16( float32 a, flag ieee STATUS_PARAM) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; uint32_t mask; uint32_t increment; @@ -2785,7 +2785,7 @@ uint16_t float32_to_float16( float32 a, flag ieee STATUS_PARAM) floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; aSig = extractFloat64Frac( a ); @@ -2819,7 +2819,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) float128 float64_to_float128( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); @@ -2851,7 +2851,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM ) float64 float64_round_to_int( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t lastBitMask, roundBitsMask; int8 roundingMode; uint64_t z; @@ -2923,9 +2923,9 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM) static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2997,9 +2997,9 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3113,7 +3113,7 @@ float64 float64_sub( float64 a, float64 b STATUS_PARAM ) float64 float64_mul( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); @@ -3171,7 +3171,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) float64 float64_div( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; uint64_t rem0, rem1; uint64_t term0, term1; @@ -3241,7 +3241,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) float64 float64_rem( float64 a, float64 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int_fast16_t aExp, bExp, expDiff; uint64_t aSig, bSig; uint64_t q, alternateASig; int64_t sigMean; @@ -3325,7 +3325,7 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) float64 float64_sqrt( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int_fast16_t aExp, zExp; uint64_t aSig, zSig, doubleZSig; uint64_t rem0, rem1, term0, term1; @@ -3375,7 +3375,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) float64 float64_log2( float64 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, aSig0, aSig1, zSig, i; aSig = extractFloat64Frac( a ); @@ -3797,7 +3797,7 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, zSig0, zSig1; aSig = extractFloatx80Frac( a ); @@ -5926,7 +5926,7 @@ int float128_compare_quiet( float128 a, float128 b STATUS_PARAM ) float32 float32_scalbn( float32 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSig = extractFloat32Frac( a ); @@ -5949,7 +5949,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM ) float64 float64_scalbn( float64 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; aSig = extractFloat64Frac( a ); @@ -5973,7 +5973,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM ) floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; aSig = extractFloatx80Frac( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index c7854ed..d032cd3 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -50,10 +50,6 @@ these four paragraphs for those parts of this code that are retained. typedef uint8_t flag; typedef uint8_t uint8; typedef int8_t int8; -#ifndef _AIX -typedef int uint16; -typedef int int16; -#endif typedef unsigned int uint32; typedef signed int int32; typedef uint64_t uint64; @@ -236,7 +232,7 @@ float32 float16_to_float32( uint16_t, flag STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ -int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM ); +int_fast16_t float32_to_int16_round_to_zero( float32 STATUS_PARAM ); unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); int32 float32_to_int32( float32 STATUS_PARAM ); int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); @@ -314,7 +310,7 @@ INLINE int float32_is_any_nan(float32 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ -int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM ); +int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); int32 float64_to_int32( float64 STATUS_PARAM ); int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); -- 1.7.3 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v3 7/7] softfloat: Make float{32, 64}_to_uint16_round_to_zero() use uint_fast16_t 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 6/7] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber @ 2010-12-18 16:25 ` Andreas Färber 2011-01-01 13:47 ` Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2010-12-18 16:25 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Nathan Froyd v3: * Split off. Use uint_fast16_t rather than uint16_t. v2: * Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat.c | 8 ++++---- fpu/softfloat.h | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 8282750..ee5e999 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -5732,10 +5732,10 @@ unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) return res; } -unsigned int float32_to_uint16_round_to_zero( float32 a STATUS_PARAM ) +uint_fast16_t float32_to_uint16_round_to_zero( float32 a STATUS_PARAM ) { int64_t v; - unsigned int res; + uint_fast16_t res; v = float32_to_int64_round_to_zero(a STATUS_VAR); if (v < 0) { @@ -5786,10 +5786,10 @@ unsigned int float64_to_uint32_round_to_zero( float64 a STATUS_PARAM ) return res; } -unsigned int float64_to_uint16_round_to_zero( float64 a STATUS_PARAM ) +uint_fast16_t float64_to_uint16_round_to_zero( float64 a STATUS_PARAM ) { int64_t v; - unsigned int res; + uint_fast16_t res; v = float64_to_int64_round_to_zero(a STATUS_VAR); if (v < 0) { diff --git a/fpu/softfloat.h b/fpu/softfloat.h index d032cd3..774fc08 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -233,7 +233,7 @@ float32 float16_to_float32( uint16_t, flag STATUS_PARAM ); | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ int_fast16_t float32_to_int16_round_to_zero( float32 STATUS_PARAM ); -unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); +uint_fast16_t float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); int32 float32_to_int32( float32 STATUS_PARAM ); int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); uint32 float32_to_uint32( float32 STATUS_PARAM ); @@ -311,7 +311,7 @@ INLINE int float32_is_any_nan(float32 a) | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); -unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); +uint_fast16_t float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); int32 float64_to_int32( float64 STATUS_PARAM ); int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); uint32 float64_to_uint32( float64 STATUS_PARAM ); -- 1.7.3 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v3 7/7] softfloat: Make float{32, 64}_to_uint16_round_to_zero() use uint_fast16_t 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 7/7] softfloat: Make float{32, 64}_to_uint16_round_to_zero() use uint_fast16_t Andreas Färber @ 2011-01-01 13:47 ` Andreas Färber 2011-01-04 19:39 ` [Qemu-devel] [PATCH, RFC v4 1/5] softfloat: Prepend QEMU-style header with derivation notice Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-01-01 13:47 UTC (permalink / raw) To: Peter Maydell; +Cc: QEMU Developers Peter, Am 18.12.2010 um 17:25 schrieb Andreas Färber: > v3: > * Split off. Use uint_fast16_t rather than uint16_t. > > v2: > * Initial. > > Cc: Peter Maydell <peter.maydell@linaro.org> > Cc: Nathan Froyd <froydnj@codesourcery.com> > Signed-off-by: Andreas Färber <andreas.faerber@web.de> > --- > fpu/softfloat.c | 8 ++++---- > fpu/softfloat.h | 4 ++-- > 2 files changed, 6 insertions(+), 6 deletions(-) Not having heard further feedback on the core part of this series, I'm currently rebasing now that 1-3 are in and would post a v4 doing more conversions this weekend unless you spot a problem. Andreas ^ permalink raw reply [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH, RFC v4 1/5] softfloat: Prepend QEMU-style header with derivation notice 2011-01-01 13:47 ` Andreas Färber @ 2011-01-04 19:39 ` Andreas Färber 2011-01-04 19:39 ` [Qemu-devel] [PATCH v4 2/5] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-01-04 19:39 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber The SoftFloat license requires "prominent notice that the work is derivative". Having added features like improved 16-bit support for arm already, add such a notice to the sources. softfloat-native.[ch] are not under the SoftFloat license and thus are not changed. v4: Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-macros.h | 5 +++++ fpu/softfloat-specialize.h | 5 +++++ fpu/softfloat.c | 5 +++++ fpu/softfloat.h | 6 ++++++ 4 files changed, 21 insertions(+), 0 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index 7838228..54c0bad 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -1,3 +1,8 @@ +/* + * QEMU float support macros + * + * Derived from SoftFloat. + */ /*============================================================================ diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index f43f2d0a..2915418 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -1,3 +1,8 @@ +/* + * QEMU float support + * + * Derived from SoftFloat. + */ /*============================================================================ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 6f5b05d..01de8f1 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -1,3 +1,8 @@ +/* + * QEMU float support + * + * Derived from SoftFloat. + */ /*============================================================================ diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 1f37877..bf7a2f4 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -1,3 +1,9 @@ +/* + * QEMU float support + * + * Derived from SoftFloat. + */ + /*============================================================================ This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v4 2/5] softfloat: Resolve type mismatches between declaration and implementation 2011-01-04 19:39 ` [Qemu-devel] [PATCH, RFC v4 1/5] softfloat: Prepend QEMU-style header with derivation notice Andreas Färber @ 2011-01-04 19:39 ` Andreas Färber 2011-01-04 19:39 ` [Qemu-devel] [PATCH v4 3/5] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-01-04 19:39 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Michael Lotz The original SoftFloat 2.0b library avoided the use of custom integer types in its public headers. This requires the definitions of int{8,16,32,64} to match the assumptions in the declarations. This breaks on BeOS R5 and Haiku/x86, where int32 is defined in {be,os}/support/SupportDefs.h in terms of a long rather than an int. Spotted by Michael Lotz. Since QEMU already breaks this distinction by defining those types just above, do use them for consistency and to allow #ifndef'ing them out as done for [u]int16 on AIX. Note that the BeOS/Haiku types are exact-width types though. v3: * Split off as intermediate step. v2: * Rebased. Cc: Michael Lotz <mmlr@mlotz.ch> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat.h | 68 +++++++++++++++++++++++++++--------------------------- 1 files changed, 34 insertions(+), 34 deletions(-) diff --git a/fpu/softfloat.h b/fpu/softfloat.h index bf7a2f4..cefd4fa 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -227,25 +227,25 @@ void float_raise( int8 flags STATUS_PARAM); /*---------------------------------------------------------------------------- | Software IEC/IEEE integer-to-floating-point conversion routines. *----------------------------------------------------------------------------*/ -float32 int32_to_float32( int STATUS_PARAM ); -float64 int32_to_float64( int STATUS_PARAM ); +float32 int32_to_float32( int32 STATUS_PARAM ); +float64 int32_to_float64( int32 STATUS_PARAM ); float32 uint32_to_float32( unsigned int STATUS_PARAM ); float64 uint32_to_float64( unsigned int STATUS_PARAM ); #ifdef FLOATX80 -floatx80 int32_to_floatx80( int STATUS_PARAM ); +floatx80 int32_to_floatx80( int32 STATUS_PARAM ); #endif #ifdef FLOAT128 -float128 int32_to_float128( int STATUS_PARAM ); +float128 int32_to_float128( int32 STATUS_PARAM ); #endif -float32 int64_to_float32( int64_t STATUS_PARAM ); -float32 uint64_to_float32( uint64_t STATUS_PARAM ); -float64 int64_to_float64( int64_t STATUS_PARAM ); -float64 uint64_to_float64( uint64_t STATUS_PARAM ); +float32 int64_to_float32( int64 STATUS_PARAM ); +float32 uint64_to_float32( uint64 STATUS_PARAM ); +float64 int64_to_float64( int64 STATUS_PARAM ); +float64 uint64_to_float64( uint64 STATUS_PARAM ); #ifdef FLOATX80 -floatx80 int64_to_floatx80( int64_t STATUS_PARAM ); +floatx80 int64_to_floatx80( int64 STATUS_PARAM ); #endif #ifdef FLOAT128 -float128 int64_to_float128( int64_t STATUS_PARAM ); +float128 int64_to_float128( int64 STATUS_PARAM ); #endif /*---------------------------------------------------------------------------- @@ -257,14 +257,14 @@ float32 float16_to_float32( bits16, flag STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ -int float32_to_int16_round_to_zero( float32 STATUS_PARAM ); +int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM ); unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); -int float32_to_int32( float32 STATUS_PARAM ); -int float32_to_int32_round_to_zero( float32 STATUS_PARAM ); -unsigned int float32_to_uint32( float32 STATUS_PARAM ); -unsigned int float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); -int64_t float32_to_int64( float32 STATUS_PARAM ); -int64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM ); +int32 float32_to_int32( float32 STATUS_PARAM ); +int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); +uint32 float32_to_uint32( float32 STATUS_PARAM ); +uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); +int64 float32_to_int64( float32 STATUS_PARAM ); +int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM ); float64 float32_to_float64( float32 STATUS_PARAM ); #ifdef FLOATX80 floatx80 float32_to_floatx80( float32 STATUS_PARAM ); @@ -335,16 +335,16 @@ INLINE int float32_is_any_nan(float32 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ -int float64_to_int16_round_to_zero( float64 STATUS_PARAM ); +int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM ); unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); -int float64_to_int32( float64 STATUS_PARAM ); -int float64_to_int32_round_to_zero( float64 STATUS_PARAM ); -unsigned int float64_to_uint32( float64 STATUS_PARAM ); -unsigned int float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); -int64_t float64_to_int64( float64 STATUS_PARAM ); -int64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); -uint64_t float64_to_uint64 (float64 a STATUS_PARAM); -uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM); +int32 float64_to_int32( float64 STATUS_PARAM ); +int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); +uint32 float64_to_uint32( float64 STATUS_PARAM ); +uint32 float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); +int64 float64_to_int64( float64 STATUS_PARAM ); +int64 float64_to_int64_round_to_zero( float64 STATUS_PARAM ); +uint64 float64_to_uint64 (float64 a STATUS_PARAM); +uint64 float64_to_uint64_round_to_zero (float64 a STATUS_PARAM); float32 float64_to_float32( float64 STATUS_PARAM ); #ifdef FLOATX80 floatx80 float64_to_floatx80( float64 STATUS_PARAM ); @@ -417,10 +417,10 @@ INLINE int float64_is_any_nan(float64 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE extended double-precision conversion routines. *----------------------------------------------------------------------------*/ -int floatx80_to_int32( floatx80 STATUS_PARAM ); -int floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); -int64_t floatx80_to_int64( floatx80 STATUS_PARAM ); -int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); +int32 floatx80_to_int32( floatx80 STATUS_PARAM ); +int32 floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); +int64 floatx80_to_int64( floatx80 STATUS_PARAM ); +int64 floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); float32 floatx80_to_float32( floatx80 STATUS_PARAM ); float64 floatx80_to_float64( floatx80 STATUS_PARAM ); #ifdef FLOAT128 @@ -481,10 +481,10 @@ INLINE int floatx80_is_zero(floatx80 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE quadruple-precision conversion routines. *----------------------------------------------------------------------------*/ -int float128_to_int32( float128 STATUS_PARAM ); -int float128_to_int32_round_to_zero( float128 STATUS_PARAM ); -int64_t float128_to_int64( float128 STATUS_PARAM ); -int64_t float128_to_int64_round_to_zero( float128 STATUS_PARAM ); +int32 float128_to_int32( float128 STATUS_PARAM ); +int32 float128_to_int32_round_to_zero( float128 STATUS_PARAM ); +int64 float128_to_int64( float128 STATUS_PARAM ); +int64 float128_to_int64_round_to_zero( float128 STATUS_PARAM ); float32 float128_to_float32( float128 STATUS_PARAM ); float64 float128_to_float64( float128 STATUS_PARAM ); #ifdef FLOATX80 -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v4 3/5] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t 2011-01-04 19:39 ` [Qemu-devel] [PATCH v4 2/5] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber @ 2011-01-04 19:39 ` Andreas Färber 2011-01-04 19:39 ` [Qemu-devel] [PATCH v4 4/5] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-01-04 19:39 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Aurelien Jarno They are defined with the same semantics as the POSIX types, so prefer those for consistency. Suggested by Peter Maydell. v4: * Rebased. v3: * Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-macros.h | 182 +++++++------- fpu/softfloat-native.c | 6 +- fpu/softfloat-specialize.h | 58 +++--- fpu/softfloat.c | 588 ++++++++++++++++++++++---------------------- fpu/softfloat.h | 19 +-- 5 files changed, 419 insertions(+), 434 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index 54c0bad..3128e60 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -44,9 +44,9 @@ these four paragraphs for those parts of this code that are retained. | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) +INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) { - bits32 z; + uint32_t z; if ( count == 0 ) { z = a; @@ -70,9 +70,9 @@ INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) +INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) { - bits64 z; + uint64_t z; if ( count == 0 ) { z = a; @@ -106,9 +106,9 @@ INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) INLINE void shift64ExtraRightJamming( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z0, z1; + uint64_t z0, z1; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -143,9 +143,9 @@ INLINE void INLINE void shift128Right( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z0, z1; + uint64_t z0, z1; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -178,9 +178,9 @@ INLINE void INLINE void shift128RightJamming( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z0, z1; + uint64_t z0, z1; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -229,16 +229,16 @@ INLINE void INLINE void shift128ExtraRightJamming( - bits64 a0, - bits64 a1, - bits64 a2, + uint64_t a0, + uint64_t a1, + uint64_t a2, int16 count, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -287,7 +287,7 @@ INLINE void INLINE void shortShift128Left( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { *z1Ptr = a1<<count; @@ -306,16 +306,16 @@ INLINE void INLINE void shortShift192Left( - bits64 a0, - bits64 a1, - bits64 a2, + uint64_t a0, + uint64_t a1, + uint64_t a2, int16 count, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 negCount; z2 = a2<<count; @@ -341,9 +341,9 @@ INLINE void INLINE void add128( - bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z1; + uint64_t z1; z1 = a1 + b1; *z1Ptr = z1; @@ -361,18 +361,18 @@ INLINE void INLINE void add192( - bits64 a0, - bits64 a1, - bits64 a2, - bits64 b0, - bits64 b1, - bits64 b2, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t a0, + uint64_t a1, + uint64_t a2, + uint64_t b0, + uint64_t b1, + uint64_t b2, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 carry0, carry1; z2 = a2 + b2; @@ -399,7 +399,7 @@ INLINE void INLINE void sub128( - bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr ) { *z1Ptr = a1 - b1; @@ -417,18 +417,18 @@ INLINE void INLINE void sub192( - bits64 a0, - bits64 a1, - bits64 a2, - bits64 b0, - bits64 b1, - bits64 b2, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t a0, + uint64_t a1, + uint64_t a2, + uint64_t b0, + uint64_t b1, + uint64_t b2, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 borrow0, borrow1; z2 = a2 - b2; @@ -451,21 +451,21 @@ INLINE void | `z0Ptr' and `z1Ptr'. *----------------------------------------------------------------------------*/ -INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr ) +INLINE void mul64To128( uint64_t a, uint64_t b, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits32 aHigh, aLow, bHigh, bLow; - bits64 z0, zMiddleA, zMiddleB, z1; + uint32_t aHigh, aLow, bHigh, bLow; + uint64_t z0, zMiddleA, zMiddleB, z1; aLow = a; aHigh = a>>32; bLow = b; bHigh = b>>32; - z1 = ( (bits64) aLow ) * bLow; - zMiddleA = ( (bits64) aLow ) * bHigh; - zMiddleB = ( (bits64) aHigh ) * bLow; - z0 = ( (bits64) aHigh ) * bHigh; + z1 = ( (uint64_t) aLow ) * bLow; + zMiddleA = ( (uint64_t) aLow ) * bHigh; + zMiddleB = ( (uint64_t) aHigh ) * bLow; + z0 = ( (uint64_t) aHigh ) * bHigh; zMiddleA += zMiddleB; - z0 += ( ( (bits64) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 ); + z0 += ( ( (uint64_t) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 ); zMiddleA <<= 32; z1 += zMiddleA; z0 += ( z1 < zMiddleA ); @@ -483,15 +483,15 @@ INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr ) INLINE void mul128By64To192( - bits64 a0, - bits64 a1, - bits64 b, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t a0, + uint64_t a1, + uint64_t b, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2, more1; + uint64_t z0, z1, z2, more1; mul64To128( a1, b, &z1, &z2 ); mul64To128( a0, b, &z0, &more1 ); @@ -511,18 +511,18 @@ INLINE void INLINE void mul128To256( - bits64 a0, - bits64 a1, - bits64 b0, - bits64 b1, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr, - bits64 *z3Ptr + uint64_t a0, + uint64_t a1, + uint64_t b0, + uint64_t b1, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr, + uint64_t *z3Ptr ) { - bits64 z0, z1, z2, z3; - bits64 more1, more2; + uint64_t z0, z1, z2, z3; + uint64_t more1, more2; mul64To128( a1, b1, &z2, &z3 ); mul64To128( a1, b0, &z1, &more2 ); @@ -548,18 +548,18 @@ INLINE void | unsigned integer is returned. *----------------------------------------------------------------------------*/ -static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b ) +static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b ) { - bits64 b0, b1; - bits64 rem0, rem1, term0, term1; - bits64 z; + uint64_t b0, b1; + uint64_t rem0, rem1, term0, term1; + uint64_t z; if ( b <= a0 ) return LIT64( 0xFFFFFFFFFFFFFFFF ); b0 = b>>32; z = ( b0<<32 <= a0 ) ? LIT64( 0xFFFFFFFF00000000 ) : ( a0 / b0 )<<32; mul64To128( b, z, &term0, &term1 ); sub128( a0, a1, term0, term1, &rem0, &rem1 ); - while ( ( (sbits64) rem0 ) < 0 ) { + while ( ( (int64_t) rem0 ) < 0 ) { z -= LIT64( 0x100000000 ); b1 = b<<32; add128( rem0, rem1, b0, b1, &rem0, &rem1 ); @@ -580,18 +580,18 @@ static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b ) | value. *----------------------------------------------------------------------------*/ -static bits32 estimateSqrt32( int16 aExp, bits32 a ) +static uint32_t estimateSqrt32( int16 aExp, uint32_t a ) { - static const bits16 sqrtOddAdjustments[] = { + static const uint16_t sqrtOddAdjustments[] = { 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, 0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67 }; - static const bits16 sqrtEvenAdjustments[] = { + static const uint16_t sqrtEvenAdjustments[] = { 0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E, 0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002 }; int8 index; - bits32 z; + uint32_t z; index = ( a>>27 ) & 15; if ( aExp & 1 ) { @@ -603,9 +603,9 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ (int)index ]; z = a / z + z; z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 ); - if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 ); + if ( z <= a ) return (uint32_t) ( ( (int32_t) a )>>1 ); } - return ( (bits32) ( ( ( (bits64) a )<<31 ) / z ) ) + ( z>>1 ); + return ( (uint32_t) ( ( ( (uint64_t) a )<<31 ) / z ) ) + ( z>>1 ); } @@ -614,7 +614,7 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) | `a'. If `a' is zero, 32 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros32( bits32 a ) +static int8 countLeadingZeros32( uint32_t a ) { static const int8 countLeadingZerosHigh[] = { 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, @@ -655,12 +655,12 @@ static int8 countLeadingZeros32( bits32 a ) | `a'. If `a' is zero, 64 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros64( bits64 a ) +static int8 countLeadingZeros64( uint64_t a ) { int8 shiftCount; shiftCount = 0; - if ( a < ( (bits64) 1 )<<32 ) { + if ( a < ( (uint64_t) 1 )<<32 ) { shiftCount += 32; } else { @@ -677,7 +677,7 @@ static int8 countLeadingZeros64( bits64 a ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 == b0 ) && ( a1 == b1 ); @@ -690,7 +690,7 @@ INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) ); @@ -703,7 +703,7 @@ INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) | returns 0. *----------------------------------------------------------------------------*/ -INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) ); @@ -716,7 +716,7 @@ INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -INLINE flag ne128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 != b0 ) || ( a1 != b1 ); diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c index 008bb53..50355a4 100644 --- a/fpu/softfloat-native.c +++ b/fpu/softfloat-native.c @@ -418,7 +418,7 @@ int float64_is_quiet_nan( float64 a1 ) u.f = a1; a = u.i; - return ( LIT64( 0xFFF0000000000000 ) < (bits64) ( a<<1 ) ); + return ( LIT64( 0xFFF0000000000000 ) < (uint64_t) ( a<<1 ) ); } @@ -500,7 +500,7 @@ int floatx80_is_signaling_nan( floatx80 a1) aLow = u.i.low & ~ LIT64( 0x4000000000000000 ); return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) - && (bits64) ( aLow<<1 ) + && (uint64_t) ( aLow<<1 ) && ( u.i.low == aLow ); } @@ -508,7 +508,7 @@ int floatx80_is_quiet_nan( floatx80 a1 ) { floatx80u u; u.f = a1; - return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( u.i.low<<1 ); + return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( u.i.low<<1 ); } #endif diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 2915418..9b182e6 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -58,7 +58,7 @@ void float_raise( int8 flags STATUS_PARAM ) *----------------------------------------------------------------------------*/ typedef struct { flag sign; - bits64 high, low; + uint64_t high, low; } commonNaNT; /*---------------------------------------------------------------------------- @@ -87,7 +87,7 @@ int float32_is_quiet_nan( float32 a_ ) #if SNAN_BIT_IS_ONE return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); #else - return ( 0xFF800000 <= (bits32) ( a<<1 ) ); + return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); #endif } @@ -100,7 +100,7 @@ int float32_is_signaling_nan( float32 a_ ) { uint32_t a = float32_val(a_); #if SNAN_BIT_IS_ONE - return ( 0xFF800000 <= (bits32) ( a<<1 ) ); + return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); #else return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); #endif @@ -138,7 +138,7 @@ static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM ) if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); z.sign = float32_val(a)>>31; z.low = 0; - z.high = ( (bits64) float32_val(a) )<<41; + z.high = ( (uint64_t) float32_val(a) )<<41; return z; } @@ -149,10 +149,10 @@ static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM ) static float32 commonNaNToFloat32( commonNaNT a ) { - bits32 mantissa = a.high>>41; + uint32_t mantissa = a.high>>41; if ( mantissa ) return make_float32( - ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); + ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); else return float32_default_nan; } @@ -235,7 +235,7 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) { flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN, aIsLargerSignificand; - bits32 av, bv, res; + uint32_t av, bv, res; if ( STATUS(default_nan_mode) ) return float32_default_nan; @@ -255,9 +255,9 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) #endif if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); - if ((bits32)(av<<1) < (bits32)(bv<<1)) { + if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) { aIsLargerSignificand = 0; - } else if ((bits32)(bv<<1) < (bits32)(av<<1)) { + } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) { aIsLargerSignificand = 1; } else { aIsLargerSignificand = (av < bv) ? 1 : 0; @@ -295,13 +295,13 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) int float64_is_quiet_nan( float64 a_ ) { - bits64 a = float64_val(a_); + uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE return ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) && ( a & LIT64( 0x0007FFFFFFFFFFFF ) ); #else - return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); + return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); #endif } @@ -312,9 +312,9 @@ int float64_is_quiet_nan( float64 a_ ) int float64_is_signaling_nan( float64 a_ ) { - bits64 a = float64_val(a_); + uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE - return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); + return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); #else return ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) @@ -330,7 +330,7 @@ int float64_is_signaling_nan( float64 a_ ) float64 float64_maybe_silence_nan( float64 a_ ) { if (float64_is_signaling_nan(a_)) { - bits64 a = float64_val(a_); + uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE a &= ~LIT64( 0x0008000000000000 ); #else @@ -365,11 +365,11 @@ static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM) static float64 commonNaNToFloat64( commonNaNT a ) { - bits64 mantissa = a.high>>12; + uint64_t mantissa = a.high>>12; if ( mantissa ) return make_float64( - ( ( (bits64) a.sign )<<63 ) + ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FF0000000000000 ) | ( a.high>>12 )); else @@ -385,7 +385,7 @@ static float64 commonNaNToFloat64( commonNaNT a ) static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) { flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN, aIsLargerSignificand; - bits64 av, bv, res; + uint64_t av, bv, res; if ( STATUS(default_nan_mode) ) return float64_default_nan; @@ -405,9 +405,9 @@ static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) #endif if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); - if ((bits64)(av<<1) < (bits64)(bv<<1)) { + if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) { aIsLargerSignificand = 0; - } else if ((bits64)(bv<<1) < (bits64)(av<<1)) { + } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) { aIsLargerSignificand = 1; } else { aIsLargerSignificand = (av < bv) ? 1 : 0; @@ -446,15 +446,15 @@ static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) int floatx80_is_quiet_nan( floatx80 a ) { #if SNAN_BIT_IS_ONE - bits64 aLow; + uint64_t aLow; aLow = a.low & ~ LIT64( 0x4000000000000000 ); return ( ( a.high & 0x7FFF ) == 0x7FFF ) - && (bits64) ( aLow<<1 ) + && (uint64_t) ( aLow<<1 ) && ( a.low == aLow ); #else - return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 ); + return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( a.low<<1 ); #endif } @@ -466,14 +466,14 @@ int floatx80_is_quiet_nan( floatx80 a ) int floatx80_is_signaling_nan( floatx80 a ) { #if SNAN_BIT_IS_ONE - return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 ); + return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( a.low<<1 ); #else - bits64 aLow; + uint64_t aLow; aLow = a.low & ~ LIT64( 0x4000000000000000 ); return ( ( a.high & 0x7FFF ) == 0x7FFF ) - && (bits64) ( aLow<<1 ) + && (uint64_t) ( aLow<<1 ) && ( a.low == aLow ); #endif } @@ -508,7 +508,7 @@ static floatx80 commonNaNToFloatx80( commonNaNT a ) z.low = a.high; else z.low = floatx80_default_nan_low; - z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF; + z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF; return z; } @@ -586,7 +586,7 @@ int float128_is_quiet_nan( float128 a ) && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); #else return - ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) + ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); #endif } @@ -600,7 +600,7 @@ int float128_is_signaling_nan( float128 a ) { #if SNAN_BIT_IS_ONE return - ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) + ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); #else return @@ -635,7 +635,7 @@ static float128 commonNaNToFloat128( commonNaNT a ) float128 z; shift128Right( a.high, a.low, 16, &z.high, &z.low ); - z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 ); + z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 ); return z; } diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 01de8f1..547c698 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -84,7 +84,7 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM) | positive or negative integer is returned. *----------------------------------------------------------------------------*/ -static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) +static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -115,7 +115,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) if ( zSign ) z = - z; if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) { float_raise( float_flag_invalid STATUS_VAR); - return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact; return z; @@ -134,7 +134,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) | returned. *----------------------------------------------------------------------------*/ -static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM) +static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM) { int8 roundingMode; flag roundNearestEven, increment; @@ -142,7 +142,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); - increment = ( (sbits64) absZ1 < 0 ); + increment = ( (int64_t) absZ1 < 0 ); if ( ! roundNearestEven ) { if ( roundingMode == float_round_to_zero ) { increment = 0; @@ -159,7 +159,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA if ( increment ) { ++absZ0; if ( absZ0 == 0 ) goto overflow; - absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven ); + absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven ); } z = absZ0; if ( zSign ) z = - z; @@ -167,7 +167,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA overflow: float_raise( float_flag_invalid STATUS_VAR); return - zSign ? (sbits64) LIT64( 0x8000000000000000 ) + zSign ? (int64_t) LIT64( 0x8000000000000000 ) : LIT64( 0x7FFFFFFFFFFFFFFF ); } if ( absZ1 ) STATUS(float_exception_flags) |= float_flag_inexact; @@ -179,7 +179,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA | Returns the fraction bits of the single-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits32 extractFloat32Frac( float32 a ) +INLINE uint32_t extractFloat32Frac( float32 a ) { return float32_val(a) & 0x007FFFFF; @@ -216,7 +216,7 @@ INLINE flag extractFloat32Sign( float32 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr ) + normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr ) { int8 shiftCount; @@ -237,11 +237,11 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) +INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) { return make_float32( - ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig); + ( ( (uint32_t) zSign )<<31 ) + ( ( (uint32_t) zExp )<<23 ) + zSig); } @@ -267,7 +267,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) +static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -292,10 +292,10 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_P } } roundBits = zSig & 0x7F; - if ( 0xFD <= (bits16) zExp ) { + if ( 0xFD <= (uint16_t) zExp ) { if ( ( 0xFD < zExp ) || ( ( zExp == 0xFD ) - && ( (sbits32) ( zSig + roundIncrement ) < 0 ) ) + && ( (int32_t) ( zSig + roundIncrement ) < 0 ) ) ) { float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR); return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 )); @@ -330,7 +330,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_P *----------------------------------------------------------------------------*/ static float32 - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) + normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) { int8 shiftCount; @@ -343,7 +343,7 @@ static float32 | Returns the fraction bits of the double-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloat64Frac( float64 a ) +INLINE uint64_t extractFloat64Frac( float64 a ) { return float64_val(a) & LIT64( 0x000FFFFFFFFFFFFF ); @@ -380,7 +380,7 @@ INLINE flag extractFloat64Sign( float64 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr ) + normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr ) { int8 shiftCount; @@ -401,11 +401,11 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) +INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) { return make_float64( - ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig); + ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig); } @@ -431,7 +431,7 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) +static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -456,10 +456,10 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_P } } roundBits = zSig & 0x3FF; - if ( 0x7FD <= (bits16) zExp ) { + if ( 0x7FD <= (uint16_t) zExp ) { if ( ( 0x7FD < zExp ) || ( ( zExp == 0x7FD ) - && ( (sbits64) ( zSig + roundIncrement ) < 0 ) ) + && ( (int64_t) ( zSig + roundIncrement ) < 0 ) ) ) { float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR); return packFloat64( zSign, 0x7FF, - ( roundIncrement == 0 )); @@ -494,7 +494,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_P *----------------------------------------------------------------------------*/ static float64 - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) + normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) { int8 shiftCount; @@ -510,7 +510,7 @@ static float64 | value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloatx80Frac( floatx80 a ) +INLINE uint64_t extractFloatx80Frac( floatx80 a ) { return a.low; @@ -549,7 +549,7 @@ INLINE flag extractFloatx80Sign( floatx80 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr ) + normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr ) { int8 shiftCount; @@ -564,12 +564,12 @@ static void | extended double-precision floating-point value, returning the result. *----------------------------------------------------------------------------*/ -INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) +INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig ) { floatx80 z; z.low = zSig; - z.high = ( ( (bits16) zSign )<<15 ) + zExp; + z.high = ( ( (uint16_t) zSign )<<15 ) + zExp; return z; } @@ -600,7 +600,7 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) static floatx80 roundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 + int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int8 roundingMode; @@ -637,7 +637,7 @@ static floatx80 } } roundBits = zSig0 & roundMask; - if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) { + if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) { if ( ( 0x7FFE < zExp ) || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) ) ) { @@ -655,7 +655,7 @@ static floatx80 if ( isTiny && roundBits ) float_raise( float_flag_underflow STATUS_VAR); if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact; zSig0 += roundIncrement; - if ( (sbits64) zSig0 < 0 ) zExp = 1; + if ( (int64_t) zSig0 < 0 ) zExp = 1; roundIncrement = roundMask + 1; if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) { roundMask |= roundIncrement; @@ -678,7 +678,7 @@ static floatx80 if ( zSig0 == 0 ) zExp = 0; return packFloatx80( zSign, zExp, zSig0 ); precision80: - increment = ( (sbits64) zSig1 < 0 ); + increment = ( (int64_t) zSig1 < 0 ); if ( ! roundNearestEven ) { if ( roundingMode == float_round_to_zero ) { increment = 0; @@ -692,7 +692,7 @@ static floatx80 } } } - if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) { + if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) { if ( ( 0x7FFE < zExp ) || ( ( zExp == 0x7FFE ) && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) ) @@ -721,7 +721,7 @@ static floatx80 if ( isTiny && zSig1 ) float_raise( float_flag_underflow STATUS_VAR); if ( zSig1 ) STATUS(float_exception_flags) |= float_flag_inexact; if ( roundNearestEven ) { - increment = ( (sbits64) zSig1 < 0 ); + increment = ( (int64_t) zSig1 < 0 ); } else { if ( zSign ) { @@ -734,8 +734,8 @@ static floatx80 if ( increment ) { ++zSig0; zSig0 &= - ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven ); - if ( (sbits64) zSig0 < 0 ) zExp = 1; + ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven ); + if ( (int64_t) zSig0 < 0 ) zExp = 1; } return packFloatx80( zSign, zExp, zSig0 ); } @@ -748,7 +748,7 @@ static floatx80 zSig0 = LIT64( 0x8000000000000000 ); } else { - zSig0 &= ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven ); + zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven ); } } else { @@ -769,7 +769,7 @@ static floatx80 static floatx80 normalizeRoundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 + int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int8 shiftCount; @@ -796,7 +796,7 @@ static floatx80 | floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloat128Frac1( float128 a ) +INLINE uint64_t extractFloat128Frac1( float128 a ) { return a.low; @@ -808,7 +808,7 @@ INLINE bits64 extractFloat128Frac1( float128 a ) | floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloat128Frac0( float128 a ) +INLINE uint64_t extractFloat128Frac0( float128 a ) { return a.high & LIT64( 0x0000FFFFFFFFFFFF ); @@ -850,11 +850,11 @@ INLINE flag extractFloat128Sign( float128 a ) static void normalizeFloat128Subnormal( - bits64 aSig0, - bits64 aSig1, + uint64_t aSig0, + uint64_t aSig1, int32 *zExpPtr, - bits64 *zSig0Ptr, - bits64 *zSig1Ptr + uint64_t *zSig0Ptr, + uint64_t *zSig1Ptr ) { int8 shiftCount; @@ -893,12 +893,12 @@ static void *----------------------------------------------------------------------------*/ INLINE float128 - packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 ) + packFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 ) { float128 z; z.low = zSig1; - z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0; + z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0; return z; } @@ -926,14 +926,14 @@ INLINE float128 static float128 roundAndPackFloat128( - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 STATUS_PARAM) + flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM) { int8 roundingMode; flag roundNearestEven, increment, isTiny; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); - increment = ( (sbits64) zSig2 < 0 ); + increment = ( (int64_t) zSig2 < 0 ); if ( ! roundNearestEven ) { if ( roundingMode == float_round_to_zero ) { increment = 0; @@ -947,7 +947,7 @@ static float128 } } } - if ( 0x7FFD <= (bits32) zExp ) { + if ( 0x7FFD <= (uint32_t) zExp ) { if ( ( 0x7FFD < zExp ) || ( ( zExp == 0x7FFD ) && eq128( @@ -991,7 +991,7 @@ static float128 zExp = 0; if ( isTiny && zSig2 ) float_raise( float_flag_underflow STATUS_VAR); if ( roundNearestEven ) { - increment = ( (sbits64) zSig2 < 0 ); + increment = ( (int64_t) zSig2 < 0 ); } else { if ( zSign ) { @@ -1027,10 +1027,10 @@ static float128 static float128 normalizeRoundAndPackFloat128( - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) + flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int8 shiftCount; - bits64 zSig2; + uint64_t zSig2; if ( zSig0 == 0 ) { zSig0 = zSig1; @@ -1064,7 +1064,7 @@ float32 int32_to_float32( int32 a STATUS_PARAM ) flag zSign; if ( a == 0 ) return float32_zero; - if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 ); + if ( a == (int32_t) 0x80000000 ) return packFloat32( 1, 0x9E, 0 ); zSign = ( a < 0 ); return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a STATUS_VAR ); @@ -1081,7 +1081,7 @@ float64 int32_to_float64( int32 a STATUS_PARAM ) flag zSign; uint32 absA; int8 shiftCount; - bits64 zSig; + uint64_t zSig; if ( a == 0 ) return float64_zero; zSign = ( a < 0 ); @@ -1106,7 +1106,7 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) flag zSign; uint32 absA; int8 shiftCount; - bits64 zSig; + uint64_t zSig; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); zSign = ( a < 0 ); @@ -1132,7 +1132,7 @@ float128 int32_to_float128( int32 a STATUS_PARAM ) flag zSign; uint32 absA; int8 shiftCount; - bits64 zSig0; + uint64_t zSig0; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); zSign = ( a < 0 ); @@ -1209,7 +1209,7 @@ float64 int64_to_float64( int64 a STATUS_PARAM ) flag zSign; if ( a == 0 ) return float64_zero; - if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) { + if ( a == (int64_t) LIT64( 0x8000000000000000 ) ) { return packFloat64( 1, 0x43E, 0 ); } zSign = ( a < 0 ); @@ -1263,7 +1263,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) uint64 absA; int8 shiftCount; int32 zExp; - bits64 zSig0, zSig1; + uint64_t zSig0, zSig1; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); zSign = ( a < 0 ); @@ -1300,8 +1300,8 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; - bits64 aSig64; + uint32_t aSig; + uint64_t aSig64; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1330,7 +1330,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; + uint32_t aSig; int32 z; aSig = extractFloat32Frac( a ); @@ -1342,7 +1342,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) float_raise( float_flag_invalid STATUS_VAR); if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF; } - return (sbits32) 0x80000000; + return (int32_t) 0x80000000; } else if ( aExp <= 0x7E ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; @@ -1350,7 +1350,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) } aSig = ( aSig | 0x00800000 )<<8; z = aSig>>( - shiftCount ); - if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) { + if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) z = - z; @@ -1372,7 +1372,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; + uint32_t aSig; int32 z; aSig = extractFloat32Frac( a ); @@ -1386,7 +1386,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) return 0x7FFF; } } - return (sbits32) 0xffff8000; + return (int32_t) 0xffff8000; } else if ( aExp <= 0x7E ) { if ( aExp | aSig ) { @@ -1397,7 +1397,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) shiftCount -= 0x10; aSig = ( aSig | 0x00800000 )<<8; z = aSig>>( - shiftCount ); - if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) { + if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) { @@ -1421,8 +1421,8 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; - bits64 aSig64, aSigExtra; + uint32_t aSig; + uint64_t aSig64, aSigExtra; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1433,7 +1433,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } if ( aExp ) aSig |= 0x00800000; aSig64 = aSig; @@ -1457,8 +1457,8 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; - bits64 aSig64; + uint32_t aSig; + uint64_t aSig64; int64 z; aSig = extractFloat32Frac( a ); @@ -1472,7 +1472,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } else if ( aExp <= 0x7E ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; @@ -1481,7 +1481,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) aSig64 = aSig | 0x00800000; aSig64 <<= 40; z = aSig64>>( - shiftCount ); - if ( (bits64) ( aSig64<<( shiftCount & 63 ) ) ) { + if ( (uint64_t) ( aSig64<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) z = - z; @@ -1500,7 +1500,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1514,7 +1514,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) normalizeFloat32Subnormal( aSig, &aExp, &aSig ); --aExp; } - return packFloat64( aSign, aExp + 0x380, ( (bits64) aSig )<<29 ); + return packFloat64( aSign, aExp + 0x380, ( (uint64_t) aSig )<<29 ); } @@ -1531,7 +1531,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1545,7 +1545,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) normalizeFloat32Subnormal( aSig, &aExp, &aSig ); } aSig |= 0x00800000; - return packFloatx80( aSign, aExp + 0x3F80, ( (bits64) aSig )<<40 ); + return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 ); } @@ -1564,7 +1564,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1578,7 +1578,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) normalizeFloat32Subnormal( aSig, &aExp, &aSig ); --aExp; } - return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 ); + return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 ); } @@ -1595,9 +1595,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) { flag aSign; int16 aExp; - bits32 lastBitMask, roundBitsMask; + uint32_t lastBitMask, roundBitsMask; int8 roundingMode; - bits32 z; + uint32_t z; aExp = extractFloat32Exp( a ); if ( 0x96 <= aExp ) { @@ -1607,7 +1607,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) return a; } if ( aExp <= 0x7E ) { - if ( (bits32) ( float32_val(a)<<1 ) == 0 ) return a; + if ( (uint32_t) ( float32_val(a)<<1 ) == 0 ) return a; STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloat32Sign( a ); switch ( STATUS(float_rounding_mode) ) { @@ -1654,7 +1654,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { int16 aExp, bExp, zExp; - bits32 aSig, bSig, zSig; + uint32_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat32Frac( a ); @@ -1708,7 +1708,7 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) aSig |= 0x20000000; zSig = ( aSig + bSig )<<1; --zExp; - if ( (sbits32) zSig < 0 ) { + if ( (int32_t) zSig < 0 ) { zSig = aSig + bSig; ++zExp; } @@ -1728,7 +1728,7 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { int16 aExp, bExp, zExp; - bits32 aSig, bSig, zSig; + uint32_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat32Frac( a ); @@ -1844,9 +1844,9 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits32 aSig, bSig; - bits64 zSig64; - bits32 zSig; + uint32_t aSig, bSig; + uint64_t zSig64; + uint32_t zSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1884,9 +1884,9 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) zExp = aExp + bExp - 0x7F; aSig = ( aSig | 0x00800000 )<<7; bSig = ( bSig | 0x00800000 )<<8; - shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 ); + shift64RightJamming( ( (uint64_t) aSig ) * bSig, 32, &zSig64 ); zSig = zSig64; - if ( 0 <= (sbits32) ( zSig<<1 ) ) { + if ( 0 <= (int32_t) ( zSig<<1 ) ) { zSig <<= 1; --zExp; } @@ -1904,7 +1904,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits32 aSig, bSig, zSig; + uint32_t aSig, bSig, zSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1948,9 +1948,9 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) aSig >>= 1; ++zExp; } - zSig = ( ( (bits64) aSig )<<32 ) / bSig; + zSig = ( ( (uint64_t) aSig )<<32 ) / bSig; if ( ( zSig & 0x3F ) == 0 ) { - zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 ); + zSig |= ( (uint64_t) bSig * zSig != ( (uint64_t) aSig )<<32 ); } return roundAndPackFloat32( zSign, zExp, zSig STATUS_VAR ); @@ -1966,11 +1966,11 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) { flag aSign, zSign; int16 aExp, bExp, expDiff; - bits32 aSig, bSig; - bits32 q; - bits64 aSig64, bSig64, q64; - bits32 alternateASig; - sbits32 sigMean; + uint32_t aSig, bSig; + uint32_t q; + uint64_t aSig64, bSig64, q64; + uint32_t alternateASig; + int32_t sigMean; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -2012,7 +2012,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) q = ( bSig <= aSig ); if ( q ) aSig -= bSig; if ( 0 < expDiff ) { - q = ( ( (bits64) aSig )<<32 ) / bSig; + q = ( ( (uint64_t) aSig )<<32 ) / bSig; q >>= 32 - expDiff; bSig >>= 2; aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q; @@ -2024,8 +2024,8 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) } else { if ( bSig <= aSig ) aSig -= bSig; - aSig64 = ( (bits64) aSig )<<40; - bSig64 = ( (bits64) bSig )<<40; + aSig64 = ( (uint64_t) aSig )<<40; + bSig64 = ( (uint64_t) bSig )<<40; expDiff -= 64; while ( 0 < expDiff ) { q64 = estimateDiv128To64( aSig64, 0, bSig64 ); @@ -2044,12 +2044,12 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) alternateASig = aSig; ++q; aSig -= bSig; - } while ( 0 <= (sbits32) aSig ); + } while ( 0 <= (int32_t) aSig ); sigMean = aSig + alternateASig; if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) { aSig = alternateASig; } - zSign = ( (sbits32) aSig < 0 ); + zSign = ( (int32_t) aSig < 0 ); if ( zSign ) aSig = - aSig; return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig STATUS_VAR ); @@ -2065,8 +2065,8 @@ float32 float32_sqrt( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, zExp; - bits32 aSig, zSig; - bits64 rem, term; + uint32_t aSig, zSig; + uint64_t rem, term; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -2095,11 +2095,11 @@ float32 float32_sqrt( float32 a STATUS_PARAM ) goto roundAndPack; } aSig >>= aExp & 1; - term = ( (bits64) zSig ) * zSig; - rem = ( ( (bits64) aSig )<<32 ) - term; - while ( (sbits64) rem < 0 ) { + term = ( (uint64_t) zSig ) * zSig; + rem = ( ( (uint64_t) aSig )<<32 ) - term; + while ( (int64_t) rem < 0 ) { --zSig; - rem += ( ( (bits64) zSig )<<1 ) | 1; + rem += ( ( (uint64_t) zSig )<<1 ) | 1; } zSig |= ( rem != 0 ); } @@ -2150,7 +2150,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; float64 r, x, xn; int i; @@ -2197,7 +2197,7 @@ float32 float32_log2( float32 a STATUS_PARAM ) { flag aSign, zSign; int16 aExp; - bits32 aSig, zSig, i; + uint32_t aSig, zSig, i; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -2222,7 +2222,7 @@ float32 float32_log2( float32 a STATUS_PARAM ) zSig = aExp << 23; for (i = 1 << 22; i > 0; i >>= 1) { - aSig = ( (bits64)aSig * aSig ) >> 23; + aSig = ( (uint64_t)aSig * aSig ) >> 23; if ( aSig & 0x01000000 ) { aSig >>= 1; zSig |= i; @@ -2253,7 +2253,7 @@ int float32_eq( float32 a, float32 b STATUS_PARAM ) return 0; } return ( float32_val(a) == float32_val(b) ) || - ( (bits32) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 ); + ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 ); } @@ -2267,7 +2267,7 @@ int float32_eq( float32 a, float32 b STATUS_PARAM ) int float32_le( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) @@ -2279,7 +2279,7 @@ int float32_le( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -2293,7 +2293,7 @@ int float32_le( float32 a, float32 b STATUS_PARAM ) int float32_lt( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) @@ -2305,7 +2305,7 @@ int float32_lt( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -2319,7 +2319,7 @@ int float32_lt( float32 a, float32 b STATUS_PARAM ) int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) { - bits32 av, bv; + uint32_t av, bv; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) @@ -2329,7 +2329,7 @@ int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) } av = float32_val(a); bv = float32_val(b); - return ( av == bv ) || ( (bits32) ( ( av | bv )<<1 ) == 0 ); + return ( av == bv ) || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); } @@ -2343,7 +2343,7 @@ int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) @@ -2357,7 +2357,7 @@ int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -2372,7 +2372,7 @@ int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) @@ -2386,7 +2386,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -2405,7 +2405,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2432,7 +2432,7 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig, savedASig; + uint64_t aSig, savedASig; int32 z; aSig = extractFloat64Frac( a ); @@ -2455,7 +2455,7 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) if ( ( z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( ( aSig<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -2478,7 +2478,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig, savedASig; + uint64_t aSig, savedASig; int32 z; aSig = extractFloat64Frac( a ); @@ -2507,7 +2507,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) if ( ( (int16_t)z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0xffff8000 : 0x7FFF; + return aSign ? (int32_t) 0xffff8000 : 0x7FFF; } if ( ( aSig<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -2529,7 +2529,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig, aSigExtra; + uint64_t aSig, aSigExtra; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2545,7 +2545,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } aSigExtra = 0; aSig <<= - shiftCount; @@ -2571,7 +2571,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; int64 z; aSig = extractFloat64Frac( a ); @@ -2590,7 +2590,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } z = aSig<<shiftCount; } @@ -2600,7 +2600,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) return 0; } z = aSig>>( - shiftCount ); - if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { + if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } @@ -2620,8 +2620,8 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; - bits32 zSig; + uint64_t aSig; + uint32_t zSig; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2651,19 +2651,19 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) | than the desired result exponent whenever `zSig' is a complete, normalized | significand. *----------------------------------------------------------------------------*/ -static bits16 packFloat16(flag zSign, int16 zExp, bits16 zSig) +static uint16_t packFloat16(flag zSign, int16 zExp, uint16_t zSig) { - return (((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig; + return (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig; } /* Half precision floats come in two formats: standard IEEE and "ARM" format. The latter gains extra exponent range by omitting the NaN/Inf encodings. */ -float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM ) +float32 float16_to_float32( uint16_t a, flag ieee STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSign = a >> 15; aExp = (a >> 10) & 0x1f; @@ -2691,13 +2691,13 @@ float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM ) return packFloat32( aSign, aExp + 0x70, aSig << 13); } -bits16 float32_to_float16( float32 a, flag ieee STATUS_PARAM) +uint16_t float32_to_float16( float32 a, flag ieee STATUS_PARAM) { flag aSign; int16 aExp; - bits32 aSig; - bits32 mask; - bits32 increment; + uint32_t aSig; + uint32_t mask; + uint32_t increment; int8 roundingMode; aSig = extractFloat32Frac( a ); @@ -2791,7 +2791,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; + uint64_t aSig; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2825,7 +2825,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig, zSig0, zSig1; + uint64_t aSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -2857,9 +2857,9 @@ float64 float64_round_to_int( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 lastBitMask, roundBitsMask; + uint64_t lastBitMask, roundBitsMask; int8 roundingMode; - bits64 z; + uint64_t z; aExp = extractFloat64Exp( a ); if ( 0x433 <= aExp ) { @@ -2869,7 +2869,7 @@ float64 float64_round_to_int( float64 a STATUS_PARAM ) return a; } if ( aExp < 0x3FF ) { - if ( (bits64) ( float64_val(a)<<1 ) == 0 ) return a; + if ( (uint64_t) ( float64_val(a)<<1 ) == 0 ) return a; STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloat64Sign( a ); switch ( STATUS(float_rounding_mode) ) { @@ -2929,7 +2929,7 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM) static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig; + uint64_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat64Frac( a ); @@ -2983,7 +2983,7 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) aSig |= LIT64( 0x2000000000000000 ); zSig = ( aSig + bSig )<<1; --zExp; - if ( (sbits64) zSig < 0 ) { + if ( (int64_t) zSig < 0 ) { zSig = aSig + bSig; ++zExp; } @@ -3003,7 +3003,7 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig; + uint64_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat64Frac( a ); @@ -3119,7 +3119,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3159,7 +3159,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11; mul64To128( aSig, bSig, &zSig0, &zSig1 ); zSig0 |= ( zSig1 != 0 ); - if ( 0 <= (sbits64) ( zSig0<<1 ) ) { + if ( 0 <= (int64_t) ( zSig0<<1 ) ) { zSig0 <<= 1; --zExp; } @@ -3177,9 +3177,9 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig; - bits64 rem0, rem1; - bits64 term0, term1; + uint64_t aSig, bSig, zSig; + uint64_t rem0, rem1; + uint64_t term0, term1; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3227,7 +3227,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) if ( ( zSig & 0x1FF ) <= 2 ) { mul64To128( bSig, zSig, &term0, &term1 ); sub128( aSig, 0, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig; add128( rem0, rem1, 0, bSig, &rem0, &rem1 ); } @@ -3247,9 +3247,9 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) { flag aSign, zSign; int16 aExp, bExp, expDiff; - bits64 aSig, bSig; - bits64 q, alternateASig; - sbits64 sigMean; + uint64_t aSig, bSig; + uint64_t q, alternateASig; + int64_t sigMean; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3310,12 +3310,12 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) alternateASig = aSig; ++q; aSig -= bSig; - } while ( 0 <= (sbits64) aSig ); + } while ( 0 <= (int64_t) aSig ); sigMean = aSig + alternateASig; if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) { aSig = alternateASig; } - zSign = ( (sbits64) aSig < 0 ); + zSign = ( (int64_t) aSig < 0 ); if ( zSign ) aSig = - aSig; return normalizeRoundAndPackFloat64( aSign ^ zSign, bExp, aSig STATUS_VAR ); @@ -3331,8 +3331,8 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, zExp; - bits64 aSig, zSig, doubleZSig; - bits64 rem0, rem1, term0, term1; + uint64_t aSig, zSig, doubleZSig; + uint64_t rem0, rem1, term0, term1; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3361,7 +3361,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) doubleZSig = zSig<<1; mul64To128( zSig, zSig, &term0, &term1 ); sub128( aSig, 0, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig; doubleZSig -= 2; add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 ); @@ -3381,7 +3381,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) { flag aSign, zSign; int16 aExp; - bits64 aSig, aSig0, aSig1, zSig, i; + uint64_t aSig, aSig0, aSig1, zSig, i; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3403,7 +3403,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) aExp -= 0x3FF; aSig |= LIT64( 0x0010000000000000 ); zSign = aExp < 0; - zSig = (bits64)aExp << 52; + zSig = (uint64_t)aExp << 52; for (i = 1LL << 51; i > 0; i >>= 1) { mul64To128( aSig, aSig, &aSig0, &aSig1 ); aSig = ( aSig0 << 12 ) | ( aSig1 >> 52 ); @@ -3426,7 +3426,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) int float64_eq( float64 a, float64 b STATUS_PARAM ) { - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3438,7 +3438,7 @@ int float64_eq( float64 a, float64 b STATUS_PARAM ) } av = float64_val(a); bv = float64_val(b); - return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); } @@ -3452,7 +3452,7 @@ int float64_eq( float64 a, float64 b STATUS_PARAM ) int float64_le( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3464,7 +3464,7 @@ int float64_le( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -3478,7 +3478,7 @@ int float64_le( float64 a, float64 b STATUS_PARAM ) int float64_lt( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3490,7 +3490,7 @@ int float64_lt( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -3504,7 +3504,7 @@ int float64_lt( float64 a, float64 b STATUS_PARAM ) int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) { - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3514,7 +3514,7 @@ int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) } av = float64_val(a); bv = float64_val(b); - return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); } @@ -3528,7 +3528,7 @@ int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3542,7 +3542,7 @@ int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -3557,7 +3557,7 @@ int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) @@ -3571,7 +3571,7 @@ int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -3592,12 +3592,12 @@ int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0; + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0; shiftCount = 0x4037 - aExp; if ( shiftCount <= 0 ) shiftCount = 1; shift64RightJamming( aSig, shiftCount, &aSig ); @@ -3619,14 +3619,14 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig, savedASig; + uint64_t aSig, savedASig; int32 z; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( 0x401E < aExp ) { - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0; + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0; goto invalid; } else if ( aExp < 0x3FFF ) { @@ -3641,7 +3641,7 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) if ( ( z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( ( aSig<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -3664,7 +3664,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig, aSigExtra; + uint64_t aSig, aSigExtra; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -3679,7 +3679,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } aSigExtra = 0; } @@ -3704,7 +3704,7 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; int64 z; aSig = extractFloatx80Frac( a ); @@ -3719,14 +3719,14 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } else if ( aExp < 0x3FFF ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; return 0; } z = aSig>>( - shiftCount ); - if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { + if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) z = - z; @@ -3745,13 +3745,13 @@ float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig; + uint64_t aSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) { + if ( (uint64_t) ( aSig<<1 ) ) { return commonNaNToFloat32( floatx80ToCommonNaN( a STATUS_VAR ) ); } return packFloat32( aSign, 0xFF, 0 ); @@ -3773,13 +3773,13 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig, zSig; + uint64_t aSig, zSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) { + if ( (uint64_t) ( aSig<<1 ) ) { return commonNaNToFloat64( floatx80ToCommonNaN( a STATUS_VAR ) ); } return packFloat64( aSign, 0x7FF, 0 ); @@ -3803,12 +3803,12 @@ float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig, zSig0, zSig1; + uint64_t aSig, zSig0, zSig1; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) { + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) { return commonNaNToFloat128( floatx80ToCommonNaN( a STATUS_VAR ) ); } shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 ); @@ -3829,27 +3829,27 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 lastBitMask, roundBitsMask; + uint64_t lastBitMask, roundBitsMask; int8 roundingMode; floatx80 z; aExp = extractFloatx80Exp( a ); if ( 0x403E <= aExp ) { - if ( ( aExp == 0x7FFF ) && (bits64) ( extractFloatx80Frac( a )<<1 ) ) { + if ( ( aExp == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) { return propagateFloatx80NaN( a, a STATUS_VAR ); } return a; } if ( aExp < 0x3FFF ) { if ( ( aExp == 0 ) - && ( (bits64) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) { + && ( (uint64_t) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) { return a; } STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloatx80Sign( a ); switch ( STATUS(float_rounding_mode) ) { case float_round_nearest_even: - if ( ( aExp == 0x3FFE ) && (bits64) ( extractFloatx80Frac( a )<<1 ) + if ( ( aExp == 0x3FFE ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) { return packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) ); @@ -3902,7 +3902,7 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM) { int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; int32 expDiff; aSig = extractFloatx80Frac( a ); @@ -3912,7 +3912,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM expDiff = aExp - bExp; if ( 0 < expDiff ) { if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return a; } if ( bExp == 0 ) --expDiff; @@ -3921,7 +3921,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM } else if ( expDiff < 0 ) { if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( aExp == 0 ) ++expDiff; @@ -3930,7 +3930,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM } else { if ( aExp == 0x7FFF ) { - if ( (bits64) ( ( aSig | bSig )<<1 ) ) { + if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } return a; @@ -3945,7 +3945,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM goto shiftRight1; } zSig0 = aSig + bSig; - if ( (sbits64) zSig0 < 0 ) goto roundAndPack; + if ( (int64_t) zSig0 < 0 ) goto roundAndPack; shiftRight1: shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 ); zSig0 |= LIT64( 0x8000000000000000 ); @@ -3968,7 +3968,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM ) { int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; int32 expDiff; floatx80 z; @@ -3980,7 +3980,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM if ( 0 < expDiff ) goto aExpBigger; if ( expDiff < 0 ) goto bExpBigger; if ( aExp == 0x7FFF ) { - if ( (bits64) ( ( aSig | bSig )<<1 ) ) { + if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } float_raise( float_flag_invalid STATUS_VAR); @@ -3998,7 +3998,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM return packFloatx80( STATUS(float_rounding_mode) == float_round_down, 0, 0 ); bExpBigger: if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( aExp == 0 ) ++expDiff; @@ -4010,7 +4010,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM goto normalizeRoundAndPack; aExpBigger: if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return a; } if ( bExp == 0 ) --expDiff; @@ -4077,7 +4077,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; floatx80 z; aSig = extractFloatx80Frac( a ); @@ -4088,15 +4088,15 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) bSign = extractFloatx80Sign( b ); zSign = aSign ^ bSign; if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) - || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) { + if ( (uint64_t) ( aSig<<1 ) + || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } if ( ( bExp | bSig ) == 0 ) goto invalid; return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); if ( ( aExp | aSig ) == 0 ) { invalid: float_raise( float_flag_invalid STATUS_VAR); @@ -4116,7 +4116,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) } zExp = aExp + bExp - 0x3FFE; mul64To128( aSig, bSig, &zSig0, &zSig1 ); - if ( 0 < (sbits64) zSig0 ) { + if ( 0 < (int64_t) zSig0 ) { shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 ); --zExp; } @@ -4136,8 +4136,8 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; - bits64 rem0, rem1, rem2, term0, term1, term2; + uint64_t aSig, bSig, zSig0, zSig1; + uint64_t rem0, rem1, rem2, term0, term1, term2; floatx80 z; aSig = extractFloatx80Frac( a ); @@ -4148,15 +4148,15 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) bSign = extractFloatx80Sign( b ); zSign = aSign ^ bSign; if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); goto invalid; } return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return packFloatx80( zSign, 0, 0 ); } if ( bExp == 0 ) { @@ -4186,15 +4186,15 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) zSig0 = estimateDiv128To64( aSig, rem1, bSig ); mul64To128( bSig, zSig0, &term0, &term1 ); sub128( aSig, rem1, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; add128( rem0, rem1, 0, bSig, &rem0, &rem1 ); } zSig1 = estimateDiv128To64( rem1, 0, bSig ); - if ( (bits64) ( zSig1<<1 ) <= 8 ) { + if ( (uint64_t) ( zSig1<<1 ) <= 8 ) { mul64To128( bSig, zSig1, &term1, &term2 ); sub128( rem1, 0, term1, term2, &rem1, &rem2 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; add128( rem1, rem2, 0, bSig, &rem1, &rem2 ); } @@ -4216,8 +4216,8 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, zSign; int32 aExp, bExp, expDiff; - bits64 aSig0, aSig1, bSig; - bits64 q, term0, term1, alternateASig0, alternateASig1; + uint64_t aSig0, aSig1, bSig; + uint64_t q, term0, term1, alternateASig0, alternateASig1; floatx80 z; aSig0 = extractFloatx80Frac( a ); @@ -4226,14 +4226,14 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) bSig = extractFloatx80Frac( b ); bExp = extractFloatx80Exp( b ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig0<<1 ) - || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) { + if ( (uint64_t) ( aSig0<<1 ) + || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } goto invalid; } if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return a; } if ( bExp == 0 ) { @@ -4247,7 +4247,7 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) normalizeFloatx80Subnormal( bSig, &bExp, &bSig ); } if ( aExp == 0 ) { - if ( (bits64) ( aSig0<<1 ) == 0 ) return a; + if ( (uint64_t) ( aSig0<<1 ) == 0 ) return a; normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 ); } bSig |= LIT64( 0x8000000000000000 ); @@ -4312,15 +4312,15 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, zExp; - bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0; - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; + uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0; + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; floatx80 z; aSig0 = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a STATUS_VAR ); + if ( (uint64_t) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a STATUS_VAR ); if ( ! aSign ) return a; goto invalid; } @@ -4343,7 +4343,7 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) doubleZSig0 = zSig0<<1; mul64To128( zSig0, zSig0, &term0, &term1 ); sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; doubleZSig0 -= 2; add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 ); @@ -4355,7 +4355,7 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) sub128( rem1, 0, term1, term2, &rem1, &rem2 ); mul64To128( zSig1, zSig1, &term2, &term3 ); sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; shortShift128Left( 0, zSig1, 1, &term2, &term3 ); term3 |= 1; @@ -4383,9 +4383,9 @@ int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM ) { if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { if ( floatx80_is_signaling_nan( a ) || floatx80_is_signaling_nan( b ) ) { @@ -4397,7 +4397,7 @@ int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -4414,9 +4414,9 @@ int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise( float_flag_invalid STATUS_VAR); return 0; @@ -4426,7 +4426,7 @@ int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -4447,9 +4447,9 @@ int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise( float_flag_invalid STATUS_VAR); return 0; @@ -4459,7 +4459,7 @@ int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -4479,9 +4479,9 @@ int floatx80_eq_signaling( floatx80 a, floatx80 b STATUS_PARAM ) { if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise( float_flag_invalid STATUS_VAR); return 0; @@ -4490,7 +4490,7 @@ int floatx80_eq_signaling( floatx80 a, floatx80 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -4507,9 +4507,9 @@ int floatx80_le_quiet( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { if ( floatx80_is_signaling_nan( a ) || floatx80_is_signaling_nan( b ) ) { @@ -4522,7 +4522,7 @@ int floatx80_le_quiet( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -4543,9 +4543,9 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { if ( floatx80_is_signaling_nan( a ) || floatx80_is_signaling_nan( b ) ) { @@ -4558,7 +4558,7 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -4585,7 +4585,7 @@ int32 float128_to_int32( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4614,7 +4614,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1, savedASig; + uint64_t aSig0, aSig1, savedASig; int32 z; aSig1 = extractFloat128Frac1( a ); @@ -4639,7 +4639,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) if ( ( z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( ( aSig0<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -4662,7 +4662,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4680,7 +4680,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 ); } @@ -4705,7 +4705,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; int64 z; aSig1 = extractFloat128Frac1( a ); @@ -4727,10 +4727,10 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) ); - if ( (bits64) ( aSig1<<shiftCount ) ) { + if ( (uint64_t) ( aSig1<<shiftCount ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } @@ -4743,7 +4743,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) } z = aSig0>>( - shiftCount ); if ( aSig1 - || ( shiftCount && (bits64) ( aSig0<<( shiftCount & 63 ) ) ) ) { + || ( shiftCount && (uint64_t) ( aSig0<<( shiftCount & 63 ) ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } @@ -4763,8 +4763,8 @@ float32 float128_to_float32( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; - bits32 zSig; + uint64_t aSig0, aSig1; + uint32_t zSig; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4798,7 +4798,7 @@ float64 float128_to_float64( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4833,7 +4833,7 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4870,7 +4870,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 lastBitMask, roundBitsMask; + uint64_t lastBitMask, roundBitsMask; int8 roundingMode; float128 z; @@ -4895,9 +4895,9 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask; } else { - if ( (sbits64) z.low < 0 ) { + if ( (int64_t) z.low < 0 ) { ++z.high; - if ( (bits64) ( z.low<<1 ) == 0 ) z.high &= ~1; + if ( (uint64_t) ( z.low<<1 ) == 0 ) z.high &= ~1; } } } @@ -4911,7 +4911,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) } else { if ( aExp < 0x3FFF ) { - if ( ( ( (bits64) ( a.high<<1 ) ) | a.low ) == 0 ) return a; + if ( ( ( (uint64_t) ( a.high<<1 ) ) | a.low ) == 0 ) return a; STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloat128Sign( a ); switch ( STATUS(float_rounding_mode) ) { @@ -4973,7 +4973,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; int32 expDiff; aSig1 = extractFloat128Frac1( a ); @@ -5054,7 +5054,7 @@ static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM static float128 subFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; int32 expDiff; float128 z; @@ -5179,7 +5179,7 @@ float128 float128_mul( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5243,8 +5243,8 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5298,7 +5298,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 ); mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 ); sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 ); } @@ -5306,7 +5306,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) if ( ( zSig1 & 0x3FFF ) <= 4 ) { mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 ); sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 ); } @@ -5327,9 +5327,9 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) { flag aSign, zSign; int32 aExp, bExp, expDiff; - bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; - bits64 allZero, alternateASig0, alternateASig1, sigMean1; - sbits64 sigMean0; + uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; + uint64_t allZero, alternateASig0, alternateASig1, sigMean1; + int64_t sigMean0; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5411,15 +5411,15 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) alternateASig1 = aSig1; ++q; sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 ); - } while ( 0 <= (sbits64) aSig0 ); + } while ( 0 <= (int64_t) aSig0 ); add128( - aSig0, aSig1, alternateASig0, alternateASig1, (bits64 *)&sigMean0, &sigMean1 ); + aSig0, aSig1, alternateASig0, alternateASig1, (uint64_t *)&sigMean0, &sigMean1 ); if ( ( sigMean0 < 0 ) || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) { aSig0 = alternateASig0; aSig1 = alternateASig1; } - zSign = ( (sbits64) aSig0 < 0 ); + zSign = ( (int64_t) aSig0 < 0 ); if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 ); return normalizeRoundAndPackFloat128( aSign ^ zSign, bExp - 4, aSig0, aSig1 STATUS_VAR ); @@ -5436,8 +5436,8 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, zExp; - bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; + uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5469,7 +5469,7 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) doubleZSig0 = zSig0<<1; mul64To128( zSig0, zSig0, &term0, &term1 ); sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; doubleZSig0 -= 2; add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 ); @@ -5481,7 +5481,7 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) sub128( rem1, 0, term1, term2, &rem1, &rem2 ); mul64To128( zSig1, zSig1, &term2, &term3 ); sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; shortShift128Left( 0, zSig1, 1, &term2, &term3 ); term3 |= 1; @@ -5519,7 +5519,7 @@ int float128_eq( float128 a, float128 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -5548,7 +5548,7 @@ int float128_le( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -5580,7 +5580,7 @@ int float128_lt( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -5611,7 +5611,7 @@ int float128_eq_signaling( float128 a, float128 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -5643,7 +5643,7 @@ int float128_le_quiet( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -5679,7 +5679,7 @@ int float128_lt_quiet( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -5837,7 +5837,7 @@ INLINE int float ## s ## _compare_internal( float ## s a, float ## s b, \ int is_quiet STATUS_PARAM ) \ { \ flag aSign, bSign; \ - bits ## s av, bv; \ + uint ## s ## _t av, bv; \ \ if (( ( extractFloat ## s ## Exp( a ) == nan_exp ) && \ extractFloat ## s ## Frac( a ) ) || \ @@ -5855,7 +5855,7 @@ INLINE int float ## s ## _compare_internal( float ## s a, float ## s b, \ av = float ## s ## _val(a); \ bv = float ## s ## _val(b); \ if ( aSign != bSign ) { \ - if ( (bits ## s) ( ( av | bv )<<1 ) == 0 ) { \ + if ( (uint ## s ## _t) ( ( av | bv )<<1 ) == 0 ) { \ /* zero case */ \ return float_relation_equal; \ } else { \ @@ -5932,7 +5932,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -5955,7 +5955,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; + uint64_t aSig; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -5979,7 +5979,7 @@ floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; + uint64_t aSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -6002,7 +6002,7 @@ float128 float128_scalbn( float128 a, int n STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index cefd4fa..7bed60b 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -65,21 +65,6 @@ typedef signed int int32; typedef uint64_t uint64; typedef int64_t int64; -/*---------------------------------------------------------------------------- -| Each of the following `typedef's defines a type that holds integers -| of _exactly_ the number of bits specified. For instance, for most -| implementation of C, `bits16' and `sbits16' should be `typedef'ed to -| `unsigned short int' and `signed short int' (or `short int'), respectively. -*----------------------------------------------------------------------------*/ -typedef uint8_t bits8; -typedef int8_t sbits8; -typedef uint16_t bits16; -typedef int16_t sbits16; -typedef uint32_t bits32; -typedef int32_t sbits32; -typedef uint64_t bits64; -typedef int64_t sbits64; - #define LIT64( a ) a##LL #define INLINE static inline @@ -251,8 +236,8 @@ float128 int64_to_float128( int64 STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software half-precision conversion routines. *----------------------------------------------------------------------------*/ -bits16 float32_to_float16( float32, flag STATUS_PARAM ); -float32 float16_to_float32( bits16, flag STATUS_PARAM ); +uint16_t float32_to_float16( float32, flag STATUS_PARAM ); +float32 float16_to_float32( uint16_t, flag STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v4 4/5] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-01-04 19:39 ` [Qemu-devel] [PATCH v4 3/5] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber @ 2011-01-04 19:39 ` Andreas Färber 2011-01-04 19:39 ` [Qemu-devel] [FYI v4 5/5] softfloat: Make float{32, 64}_to_uint16_round_to_zero() use uint_fast16_t Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-01-04 19:39 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber AIX already didn't use our definition, so let's start ripping out this one: As pointed out by Peter Maydell, int16 is currently int on most supported platforms, so let's replace it with int_fast16_t, allowing the system to use a wider type if appropriate. Note that Darwin uses [u]int16_t now, whereas Haiku uses [u]int32_t. v3: * Split off. Use [u]int_fast16_t rather than [u]int16_t. v2: * Rebased. Fix two new instances of int16. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: malc <av1474@comtv.ru> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-macros.h | 18 ++++---- fpu/softfloat.c | 114 ++++++++++++++++++++++++------------------------ fpu/softfloat.h | 8 +--- 3 files changed, 68 insertions(+), 72 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index 3128e60..7b350c0 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -44,7 +44,7 @@ these four paragraphs for those parts of this code that are retained. | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) +INLINE void shift32RightJamming( uint32_t a, int_fast16_t count, uint32_t *zPtr ) { uint32_t z; @@ -70,7 +70,7 @@ INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) +INLINE void shift64RightJamming( uint64_t a, int_fast16_t count, uint64_t *zPtr ) { uint64_t z; @@ -106,7 +106,7 @@ INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) INLINE void shift64ExtraRightJamming( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; int8 negCount = ( - count ) & 63; @@ -143,7 +143,7 @@ INLINE void INLINE void shift128Right( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; int8 negCount = ( - count ) & 63; @@ -178,7 +178,7 @@ INLINE void INLINE void shift128RightJamming( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; int8 negCount = ( - count ) & 63; @@ -232,7 +232,7 @@ INLINE void uint64_t a0, uint64_t a1, uint64_t a2, - int16 count, + int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr, uint64_t *z2Ptr @@ -287,7 +287,7 @@ INLINE void INLINE void shortShift128Left( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { *z1Ptr = a1<<count; @@ -309,7 +309,7 @@ INLINE void uint64_t a0, uint64_t a1, uint64_t a2, - int16 count, + int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr, uint64_t *z2Ptr @@ -580,7 +580,7 @@ static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b ) | value. *----------------------------------------------------------------------------*/ -static uint32_t estimateSqrt32( int16 aExp, uint32_t a ) +static uint32_t estimateSqrt32( int_fast16_t aExp, uint32_t a ) { static const uint16_t sqrtOddAdjustments[] = { 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 547c698..192fde3 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -190,7 +190,7 @@ INLINE uint32_t extractFloat32Frac( float32 a ) | Returns the exponent bits of the single-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat32Exp( float32 a ) +INLINE int_fast16_t extractFloat32Exp( float32 a ) { return ( float32_val(a)>>23 ) & 0xFF; @@ -216,7 +216,7 @@ INLINE flag extractFloat32Sign( float32 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr ) + normalizeFloat32Subnormal( uint32_t aSig, int_fast16_t *zExpPtr, uint32_t *zSigPtr ) { int8 shiftCount; @@ -237,7 +237,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) +INLINE float32 packFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig ) { return make_float32( @@ -267,7 +267,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) +static float32 roundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -330,7 +330,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS *----------------------------------------------------------------------------*/ static float32 - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) + normalizeRoundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM) { int8 shiftCount; @@ -354,7 +354,7 @@ INLINE uint64_t extractFloat64Frac( float64 a ) | Returns the exponent bits of the double-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat64Exp( float64 a ) +INLINE int_fast16_t extractFloat64Exp( float64 a ) { return ( float64_val(a)>>52 ) & 0x7FF; @@ -380,7 +380,7 @@ INLINE flag extractFloat64Sign( float64 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr ) + normalizeFloat64Subnormal( uint64_t aSig, int_fast16_t *zExpPtr, uint64_t *zSigPtr ) { int8 shiftCount; @@ -401,7 +401,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) +INLINE float64 packFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig ) { return make_float64( @@ -431,11 +431,11 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) +static float64 roundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; - int16 roundIncrement, roundBits; + int_fast16_t roundIncrement, roundBits; flag isTiny; roundingMode = STATUS(float_rounding_mode); @@ -494,7 +494,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS *----------------------------------------------------------------------------*/ static float64 - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) + normalizeRoundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM) { int8 shiftCount; @@ -1299,7 +1299,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) int32 float32_to_int32( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64; @@ -1329,7 +1329,7 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; int32 z; @@ -1368,10 +1368,10 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) +int_fast16_t float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; int32 z; @@ -1420,7 +1420,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) int64 float32_to_int64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64, aSigExtra; @@ -1456,7 +1456,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64; int64 z; @@ -1499,7 +1499,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) float64 float32_to_float64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSig = extractFloat32Frac( a ); @@ -1530,7 +1530,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSig = extractFloat32Frac( a ); @@ -1563,7 +1563,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) float128 float32_to_float128( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSig = extractFloat32Frac( a ); @@ -1594,7 +1594,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) float32 float32_round_to_int( float32 a STATUS_PARAM) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t lastBitMask, roundBitsMask; int8 roundingMode; uint32_t z; @@ -1653,9 +1653,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1727,9 +1727,9 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1843,7 +1843,7 @@ float32 float32_sub( float32 a, float32 b STATUS_PARAM ) float32 float32_mul( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig; uint64_t zSig64; uint32_t zSig; @@ -1903,7 +1903,7 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) float32 float32_div( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; aSig = extractFloat32Frac( a ); @@ -1965,7 +1965,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) float32 float32_rem( float32 a, float32 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int_fast16_t aExp, bExp, expDiff; uint32_t aSig, bSig; uint32_t q; uint64_t aSig64, bSig64, q64; @@ -2064,7 +2064,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) float32 float32_sqrt( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int_fast16_t aExp, zExp; uint32_t aSig, zSig; uint64_t rem, term; @@ -2149,7 +2149,7 @@ static const float64 float32_exp2_coefficients[15] = float32 float32_exp2( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; float64 r, x, xn; int i; @@ -2196,7 +2196,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) float32 float32_log2( float32 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig, zSig, i; aSig = extractFloat32Frac( a ); @@ -2404,7 +2404,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) int32 float64_to_int32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig; aSig = extractFloat64Frac( a ); @@ -2431,7 +2431,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, savedASig; int32 z; @@ -2474,10 +2474,10 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) +int_fast16_t float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, savedASig; int32 z; @@ -2528,7 +2528,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) int64 float64_to_int64( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, aSigExtra; aSig = extractFloat64Frac( a ); @@ -2570,7 +2570,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig; int64 z; @@ -2619,7 +2619,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) float32 float64_to_float32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; uint32_t zSig; @@ -2651,7 +2651,7 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) | than the desired result exponent whenever `zSig' is a complete, normalized | significand. *----------------------------------------------------------------------------*/ -static uint16_t packFloat16(flag zSign, int16 zExp, uint16_t zSig) +static uint16_t packFloat16(flag zSign, int_fast16_t zExp, uint16_t zSig) { return (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig; } @@ -2662,7 +2662,7 @@ static uint16_t packFloat16(flag zSign, int16 zExp, uint16_t zSig) float32 float16_to_float32( uint16_t a, flag ieee STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSign = a >> 15; @@ -2694,7 +2694,7 @@ float32 float16_to_float32( uint16_t a, flag ieee STATUS_PARAM ) uint16_t float32_to_float16( float32 a, flag ieee STATUS_PARAM) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; uint32_t mask; uint32_t increment; @@ -2790,7 +2790,7 @@ uint16_t float32_to_float16( float32 a, flag ieee STATUS_PARAM) floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; aSig = extractFloat64Frac( a ); @@ -2824,7 +2824,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) float128 float64_to_float128( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); @@ -2856,7 +2856,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM ) float64 float64_round_to_int( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t lastBitMask, roundBitsMask; int8 roundingMode; uint64_t z; @@ -2928,9 +2928,9 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM) static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3002,9 +3002,9 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3118,7 +3118,7 @@ float64 float64_sub( float64 a, float64 b STATUS_PARAM ) float64 float64_mul( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; aSig = extractFloat64Frac( a ); @@ -3176,7 +3176,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) float64 float64_div( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; uint64_t rem0, rem1; uint64_t term0, term1; @@ -3246,7 +3246,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) float64 float64_rem( float64 a, float64 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int_fast16_t aExp, bExp, expDiff; uint64_t aSig, bSig; uint64_t q, alternateASig; int64_t sigMean; @@ -3330,7 +3330,7 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) float64 float64_sqrt( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int_fast16_t aExp, zExp; uint64_t aSig, zSig, doubleZSig; uint64_t rem0, rem1, term0, term1; @@ -3380,7 +3380,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) float64 float64_log2( float64 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, aSig0, aSig1, zSig, i; aSig = extractFloat64Frac( a ); @@ -3802,7 +3802,7 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, zSig0, zSig1; aSig = extractFloatx80Frac( a ); @@ -5931,7 +5931,7 @@ int float128_compare_quiet( float128 a, float128 b STATUS_PARAM ) float32 float32_scalbn( float32 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSig = extractFloat32Frac( a ); @@ -5954,7 +5954,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM ) float64 float64_scalbn( float64 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; aSig = extractFloat64Frac( a ); @@ -5978,7 +5978,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM ) floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; aSig = extractFloatx80Frac( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 7bed60b..4d5aa39 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -56,10 +56,6 @@ these four paragraphs for those parts of this code that are retained. typedef uint8_t flag; typedef uint8_t uint8; typedef int8_t int8; -#ifndef _AIX -typedef int uint16; -typedef int int16; -#endif typedef unsigned int uint32; typedef signed int int32; typedef uint64_t uint64; @@ -242,7 +238,7 @@ float32 float16_to_float32( uint16_t, flag STATUS_PARAM ); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ -int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM ); +int_fast16_t float32_to_int16_round_to_zero( float32 STATUS_PARAM ); unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); int32 float32_to_int32( float32 STATUS_PARAM ); int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); @@ -320,7 +316,7 @@ INLINE int float32_is_any_nan(float32 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ -int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM ); +int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); int32 float64_to_int32( float64 STATUS_PARAM ); int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [FYI v4 5/5] softfloat: Make float{32, 64}_to_uint16_round_to_zero() use uint_fast16_t 2011-01-04 19:39 ` [Qemu-devel] [PATCH v4 4/5] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber @ 2011-01-04 19:39 ` Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 01/10] [RESEND] softfloat: Prepend QEMU-style header with derivation notice Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-01-04 19:39 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Nathan Froyd v3: * Split off. Use uint_fast16_t rather than uint16_t. v2: * Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- Commit message to be improved in v5. fpu/softfloat.c | 8 ++++---- fpu/softfloat.h | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 192fde3..00c3e9d 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -5737,10 +5737,10 @@ unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) return res; } -unsigned int float32_to_uint16_round_to_zero( float32 a STATUS_PARAM ) +uint_fast16_t float32_to_uint16_round_to_zero( float32 a STATUS_PARAM ) { int64_t v; - unsigned int res; + uint_fast16_t res; v = float32_to_int64_round_to_zero(a STATUS_VAR); if (v < 0) { @@ -5791,10 +5791,10 @@ unsigned int float64_to_uint32_round_to_zero( float64 a STATUS_PARAM ) return res; } -unsigned int float64_to_uint16_round_to_zero( float64 a STATUS_PARAM ) +uint_fast16_t float64_to_uint16_round_to_zero( float64 a STATUS_PARAM ) { int64_t v; - unsigned int res; + uint_fast16_t res; v = float64_to_int64_round_to_zero(a STATUS_VAR); if (v < 0) { diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 4d5aa39..19785a8 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -239,7 +239,7 @@ float32 float16_to_float32( uint16_t, flag STATUS_PARAM ); | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ int_fast16_t float32_to_int16_round_to_zero( float32 STATUS_PARAM ); -unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); +uint_fast16_t float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); int32 float32_to_int32( float32 STATUS_PARAM ); int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); uint32 float32_to_uint32( float32 STATUS_PARAM ); @@ -317,7 +317,7 @@ INLINE int float32_is_any_nan(float32 a) | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); -unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); +uint_fast16_t float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); int32 float64_to_int32( float64 STATUS_PARAM ); int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); uint32 float64_to_uint32( float64 STATUS_PARAM ); -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v5 01/10] [RESEND] softfloat: Prepend QEMU-style header with derivation notice 2011-01-04 19:39 ` [Qemu-devel] [FYI v4 5/5] softfloat: Make float{32, 64}_to_uint16_round_to_zero() use uint_fast16_t Andreas Färber @ 2011-03-07 0:34 ` Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 01/10] [RESEND] softfloat: Prepend QEMU-style header with derivation notice Aurelien Jarno 0 siblings, 2 replies; 55+ messages in thread From: Andreas Färber @ 2011-03-07 0:34 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber The SoftFloat license requires "prominent notice that the work is derivative". Having added features like improved 16-bit support for arm already, add such a notice to the sources. softfloat-native.[ch] are not under the SoftFloat license and thus are not changed. v4: Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-macros.h | 5 +++++ fpu/softfloat-specialize.h | 5 +++++ fpu/softfloat.c | 5 +++++ fpu/softfloat.h | 6 ++++++ 4 files changed, 21 insertions(+), 0 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index 7838228..54c0bad 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -1,3 +1,8 @@ +/* + * QEMU float support macros + * + * Derived from SoftFloat. + */ /*============================================================================ diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index adc5ada..4add93c 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -1,3 +1,8 @@ +/* + * QEMU float support + * + * Derived from SoftFloat. + */ /*============================================================================ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 30b07e9..e800daa 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -1,3 +1,8 @@ +/* + * QEMU float support + * + * Derived from SoftFloat. + */ /*============================================================================ diff --git a/fpu/softfloat.h b/fpu/softfloat.h index fd61dc4..9e10727 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -1,3 +1,9 @@ +/* + * QEMU float support + * + * Derived from SoftFloat. + */ + /*============================================================================ This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 01/10] [RESEND] softfloat: Prepend QEMU-style header with derivation notice Andreas Färber @ 2011-03-07 0:34 ` Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation Aurelien Jarno 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 01/10] [RESEND] softfloat: Prepend QEMU-style header with derivation notice Aurelien Jarno 1 sibling, 2 replies; 55+ messages in thread From: Andreas Färber @ 2011-03-07 0:34 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Michael Lotz The original SoftFloat 2.0b library avoided the use of custom integer types in its public headers. This requires the definitions of int{8,16,32,64} to match the assumptions in the declarations. This breaks on BeOS R5 and Haiku/x86, where int32 is defined in {be,os}/support/SupportDefs.h in terms of a long rather than an int. Spotted by Michael Lotz. Since QEMU already breaks this distinction by defining those types just above, do use them for consistency and to allow #ifndef'ing them out as done for [u]int16 on AIX. Note that the BeOS/Haiku types are exact-width types though. v3: * Split off as intermediate step. v2: * Rebased. Cc: Michael Lotz <mmlr@mlotz.ch> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat.h | 68 +++++++++++++++++++++++++++--------------------------- 1 files changed, 34 insertions(+), 34 deletions(-) diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 9e10727..29492bc 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -255,25 +255,25 @@ void float_raise( int8 flags STATUS_PARAM); /*---------------------------------------------------------------------------- | Software IEC/IEEE integer-to-floating-point conversion routines. *----------------------------------------------------------------------------*/ -float32 int32_to_float32( int STATUS_PARAM ); -float64 int32_to_float64( int STATUS_PARAM ); +float32 int32_to_float32( int32 STATUS_PARAM ); +float64 int32_to_float64( int32 STATUS_PARAM ); float32 uint32_to_float32( unsigned int STATUS_PARAM ); float64 uint32_to_float64( unsigned int STATUS_PARAM ); #ifdef FLOATX80 -floatx80 int32_to_floatx80( int STATUS_PARAM ); +floatx80 int32_to_floatx80( int32 STATUS_PARAM ); #endif #ifdef FLOAT128 -float128 int32_to_float128( int STATUS_PARAM ); +float128 int32_to_float128( int32 STATUS_PARAM ); #endif -float32 int64_to_float32( int64_t STATUS_PARAM ); -float32 uint64_to_float32( uint64_t STATUS_PARAM ); -float64 int64_to_float64( int64_t STATUS_PARAM ); -float64 uint64_to_float64( uint64_t STATUS_PARAM ); +float32 int64_to_float32( int64 STATUS_PARAM ); +float32 uint64_to_float32( uint64 STATUS_PARAM ); +float64 int64_to_float64( int64 STATUS_PARAM ); +float64 uint64_to_float64( uint64 STATUS_PARAM ); #ifdef FLOATX80 -floatx80 int64_to_floatx80( int64_t STATUS_PARAM ); +floatx80 int64_to_floatx80( int64 STATUS_PARAM ); #endif #ifdef FLOAT128 -float128 int64_to_float128( int64_t STATUS_PARAM ); +float128 int64_to_float128( int64 STATUS_PARAM ); #endif /*---------------------------------------------------------------------------- @@ -303,14 +303,14 @@ float16 float16_maybe_silence_nan( float16 ); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ -int float32_to_int16_round_to_zero( float32 STATUS_PARAM ); +int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM ); unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); -int float32_to_int32( float32 STATUS_PARAM ); -int float32_to_int32_round_to_zero( float32 STATUS_PARAM ); -unsigned int float32_to_uint32( float32 STATUS_PARAM ); -unsigned int float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); -int64_t float32_to_int64( float32 STATUS_PARAM ); -int64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM ); +int32 float32_to_int32( float32 STATUS_PARAM ); +int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); +uint32 float32_to_uint32( float32 STATUS_PARAM ); +uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); +int64 float32_to_int64( float32 STATUS_PARAM ); +int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM ); float64 float32_to_float64( float32 STATUS_PARAM ); #ifdef FLOATX80 floatx80 float32_to_floatx80( float32 STATUS_PARAM ); @@ -413,16 +413,16 @@ INLINE float32 float32_set_sign(float32 a, int sign) /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ -int float64_to_int16_round_to_zero( float64 STATUS_PARAM ); +int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM ); unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); -int float64_to_int32( float64 STATUS_PARAM ); -int float64_to_int32_round_to_zero( float64 STATUS_PARAM ); -unsigned int float64_to_uint32( float64 STATUS_PARAM ); -unsigned int float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); -int64_t float64_to_int64( float64 STATUS_PARAM ); -int64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); -uint64_t float64_to_uint64 (float64 a STATUS_PARAM); -uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM); +int32 float64_to_int32( float64 STATUS_PARAM ); +int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); +uint32 float64_to_uint32( float64 STATUS_PARAM ); +uint32 float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); +int64 float64_to_int64( float64 STATUS_PARAM ); +int64 float64_to_int64_round_to_zero( float64 STATUS_PARAM ); +uint64 float64_to_uint64 (float64 a STATUS_PARAM); +uint64 float64_to_uint64_round_to_zero (float64 a STATUS_PARAM); float32 float64_to_float32( float64 STATUS_PARAM ); #ifdef FLOATX80 floatx80 float64_to_floatx80( float64 STATUS_PARAM ); @@ -522,10 +522,10 @@ INLINE float64 float64_set_sign(float64 a, int sign) /*---------------------------------------------------------------------------- | Software IEC/IEEE extended double-precision conversion routines. *----------------------------------------------------------------------------*/ -int floatx80_to_int32( floatx80 STATUS_PARAM ); -int floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); -int64_t floatx80_to_int64( floatx80 STATUS_PARAM ); -int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); +int32 floatx80_to_int32( floatx80 STATUS_PARAM ); +int32 floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); +int64 floatx80_to_int64( floatx80 STATUS_PARAM ); +int64 floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); float32 floatx80_to_float32( floatx80 STATUS_PARAM ); float64 floatx80_to_float64( floatx80 STATUS_PARAM ); #ifdef FLOAT128 @@ -605,10 +605,10 @@ INLINE int floatx80_is_any_nan(floatx80 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE quadruple-precision conversion routines. *----------------------------------------------------------------------------*/ -int float128_to_int32( float128 STATUS_PARAM ); -int float128_to_int32_round_to_zero( float128 STATUS_PARAM ); -int64_t float128_to_int64( float128 STATUS_PARAM ); -int64_t float128_to_int64_round_to_zero( float128 STATUS_PARAM ); +int32 float128_to_int32( float128 STATUS_PARAM ); +int32 float128_to_int32_round_to_zero( float128 STATUS_PARAM ); +int64 float128_to_int64( float128 STATUS_PARAM ); +int64 float128_to_int64_round_to_zero( float128 STATUS_PARAM ); float32 float128_to_float32( float128 STATUS_PARAM ); float64 float128_to_float64( float128 STATUS_PARAM ); #ifdef FLOATX80 -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber @ 2011-03-07 0:34 ` Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Aurelien Jarno 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation Aurelien Jarno 1 sibling, 2 replies; 55+ messages in thread From: Andreas Färber @ 2011-03-07 0:34 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Aurelien Jarno They are defined with the same semantics as the POSIX types, so prefer those for consistency. Suggested by Peter Maydell. v5: * Rebased. Convert new uses of bits*. v4: * Rebased. v3: * Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-macros.h | 182 +++++++------- fpu/softfloat-native.c | 6 +- fpu/softfloat-specialize.h | 62 +++--- fpu/softfloat.c | 584 ++++++++++++++++++++++---------------------- fpu/softfloat.h | 15 -- 5 files changed, 417 insertions(+), 432 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index 54c0bad..3128e60 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -44,9 +44,9 @@ these four paragraphs for those parts of this code that are retained. | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) +INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) { - bits32 z; + uint32_t z; if ( count == 0 ) { z = a; @@ -70,9 +70,9 @@ INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) +INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) { - bits64 z; + uint64_t z; if ( count == 0 ) { z = a; @@ -106,9 +106,9 @@ INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) INLINE void shift64ExtraRightJamming( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z0, z1; + uint64_t z0, z1; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -143,9 +143,9 @@ INLINE void INLINE void shift128Right( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z0, z1; + uint64_t z0, z1; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -178,9 +178,9 @@ INLINE void INLINE void shift128RightJamming( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z0, z1; + uint64_t z0, z1; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -229,16 +229,16 @@ INLINE void INLINE void shift128ExtraRightJamming( - bits64 a0, - bits64 a1, - bits64 a2, + uint64_t a0, + uint64_t a1, + uint64_t a2, int16 count, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 negCount = ( - count ) & 63; if ( count == 0 ) { @@ -287,7 +287,7 @@ INLINE void INLINE void shortShift128Left( - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { *z1Ptr = a1<<count; @@ -306,16 +306,16 @@ INLINE void INLINE void shortShift192Left( - bits64 a0, - bits64 a1, - bits64 a2, + uint64_t a0, + uint64_t a1, + uint64_t a2, int16 count, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 negCount; z2 = a2<<count; @@ -341,9 +341,9 @@ INLINE void INLINE void add128( - bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits64 z1; + uint64_t z1; z1 = a1 + b1; *z1Ptr = z1; @@ -361,18 +361,18 @@ INLINE void INLINE void add192( - bits64 a0, - bits64 a1, - bits64 a2, - bits64 b0, - bits64 b1, - bits64 b2, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t a0, + uint64_t a1, + uint64_t a2, + uint64_t b0, + uint64_t b1, + uint64_t b2, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 carry0, carry1; z2 = a2 + b2; @@ -399,7 +399,7 @@ INLINE void INLINE void sub128( - bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr ) + uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr ) { *z1Ptr = a1 - b1; @@ -417,18 +417,18 @@ INLINE void INLINE void sub192( - bits64 a0, - bits64 a1, - bits64 a2, - bits64 b0, - bits64 b1, - bits64 b2, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t a0, + uint64_t a1, + uint64_t a2, + uint64_t b0, + uint64_t b1, + uint64_t b2, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2; + uint64_t z0, z1, z2; int8 borrow0, borrow1; z2 = a2 - b2; @@ -451,21 +451,21 @@ INLINE void | `z0Ptr' and `z1Ptr'. *----------------------------------------------------------------------------*/ -INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr ) +INLINE void mul64To128( uint64_t a, uint64_t b, uint64_t *z0Ptr, uint64_t *z1Ptr ) { - bits32 aHigh, aLow, bHigh, bLow; - bits64 z0, zMiddleA, zMiddleB, z1; + uint32_t aHigh, aLow, bHigh, bLow; + uint64_t z0, zMiddleA, zMiddleB, z1; aLow = a; aHigh = a>>32; bLow = b; bHigh = b>>32; - z1 = ( (bits64) aLow ) * bLow; - zMiddleA = ( (bits64) aLow ) * bHigh; - zMiddleB = ( (bits64) aHigh ) * bLow; - z0 = ( (bits64) aHigh ) * bHigh; + z1 = ( (uint64_t) aLow ) * bLow; + zMiddleA = ( (uint64_t) aLow ) * bHigh; + zMiddleB = ( (uint64_t) aHigh ) * bLow; + z0 = ( (uint64_t) aHigh ) * bHigh; zMiddleA += zMiddleB; - z0 += ( ( (bits64) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 ); + z0 += ( ( (uint64_t) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 ); zMiddleA <<= 32; z1 += zMiddleA; z0 += ( z1 < zMiddleA ); @@ -483,15 +483,15 @@ INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr ) INLINE void mul128By64To192( - bits64 a0, - bits64 a1, - bits64 b, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr + uint64_t a0, + uint64_t a1, + uint64_t b, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr ) { - bits64 z0, z1, z2, more1; + uint64_t z0, z1, z2, more1; mul64To128( a1, b, &z1, &z2 ); mul64To128( a0, b, &z0, &more1 ); @@ -511,18 +511,18 @@ INLINE void INLINE void mul128To256( - bits64 a0, - bits64 a1, - bits64 b0, - bits64 b1, - bits64 *z0Ptr, - bits64 *z1Ptr, - bits64 *z2Ptr, - bits64 *z3Ptr + uint64_t a0, + uint64_t a1, + uint64_t b0, + uint64_t b1, + uint64_t *z0Ptr, + uint64_t *z1Ptr, + uint64_t *z2Ptr, + uint64_t *z3Ptr ) { - bits64 z0, z1, z2, z3; - bits64 more1, more2; + uint64_t z0, z1, z2, z3; + uint64_t more1, more2; mul64To128( a1, b1, &z2, &z3 ); mul64To128( a1, b0, &z1, &more2 ); @@ -548,18 +548,18 @@ INLINE void | unsigned integer is returned. *----------------------------------------------------------------------------*/ -static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b ) +static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b ) { - bits64 b0, b1; - bits64 rem0, rem1, term0, term1; - bits64 z; + uint64_t b0, b1; + uint64_t rem0, rem1, term0, term1; + uint64_t z; if ( b <= a0 ) return LIT64( 0xFFFFFFFFFFFFFFFF ); b0 = b>>32; z = ( b0<<32 <= a0 ) ? LIT64( 0xFFFFFFFF00000000 ) : ( a0 / b0 )<<32; mul64To128( b, z, &term0, &term1 ); sub128( a0, a1, term0, term1, &rem0, &rem1 ); - while ( ( (sbits64) rem0 ) < 0 ) { + while ( ( (int64_t) rem0 ) < 0 ) { z -= LIT64( 0x100000000 ); b1 = b<<32; add128( rem0, rem1, b0, b1, &rem0, &rem1 ); @@ -580,18 +580,18 @@ static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b ) | value. *----------------------------------------------------------------------------*/ -static bits32 estimateSqrt32( int16 aExp, bits32 a ) +static uint32_t estimateSqrt32( int16 aExp, uint32_t a ) { - static const bits16 sqrtOddAdjustments[] = { + static const uint16_t sqrtOddAdjustments[] = { 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, 0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67 }; - static const bits16 sqrtEvenAdjustments[] = { + static const uint16_t sqrtEvenAdjustments[] = { 0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E, 0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002 }; int8 index; - bits32 z; + uint32_t z; index = ( a>>27 ) & 15; if ( aExp & 1 ) { @@ -603,9 +603,9 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ (int)index ]; z = a / z + z; z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 ); - if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 ); + if ( z <= a ) return (uint32_t) ( ( (int32_t) a )>>1 ); } - return ( (bits32) ( ( ( (bits64) a )<<31 ) / z ) ) + ( z>>1 ); + return ( (uint32_t) ( ( ( (uint64_t) a )<<31 ) / z ) ) + ( z>>1 ); } @@ -614,7 +614,7 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) | `a'. If `a' is zero, 32 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros32( bits32 a ) +static int8 countLeadingZeros32( uint32_t a ) { static const int8 countLeadingZerosHigh[] = { 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, @@ -655,12 +655,12 @@ static int8 countLeadingZeros32( bits32 a ) | `a'. If `a' is zero, 64 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros64( bits64 a ) +static int8 countLeadingZeros64( uint64_t a ) { int8 shiftCount; shiftCount = 0; - if ( a < ( (bits64) 1 )<<32 ) { + if ( a < ( (uint64_t) 1 )<<32 ) { shiftCount += 32; } else { @@ -677,7 +677,7 @@ static int8 countLeadingZeros64( bits64 a ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 == b0 ) && ( a1 == b1 ); @@ -690,7 +690,7 @@ INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) ); @@ -703,7 +703,7 @@ INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) | returns 0. *----------------------------------------------------------------------------*/ -INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) ); @@ -716,7 +716,7 @@ INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) | Otherwise, returns 0. *----------------------------------------------------------------------------*/ -INLINE flag ne128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) +INLINE flag ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) { return ( a0 != b0 ) || ( a1 != b1 ); diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c index 008bb53..50355a4 100644 --- a/fpu/softfloat-native.c +++ b/fpu/softfloat-native.c @@ -418,7 +418,7 @@ int float64_is_quiet_nan( float64 a1 ) u.f = a1; a = u.i; - return ( LIT64( 0xFFF0000000000000 ) < (bits64) ( a<<1 ) ); + return ( LIT64( 0xFFF0000000000000 ) < (uint64_t) ( a<<1 ) ); } @@ -500,7 +500,7 @@ int floatx80_is_signaling_nan( floatx80 a1) aLow = u.i.low & ~ LIT64( 0x4000000000000000 ); return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) - && (bits64) ( aLow<<1 ) + && (uint64_t) ( aLow<<1 ) && ( u.i.low == aLow ); } @@ -508,7 +508,7 @@ int floatx80_is_quiet_nan( floatx80 a1 ) { floatx80u u; u.f = a1; - return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( u.i.low<<1 ); + return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( u.i.low<<1 ); } #endif diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 4add93c..4b65de6 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -52,7 +52,7 @@ void float_raise( int8 flags STATUS_PARAM ) *----------------------------------------------------------------------------*/ typedef struct { flag sign; - bits64 high, low; + uint64_t high, low; } commonNaNT; /*---------------------------------------------------------------------------- @@ -120,7 +120,7 @@ static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM ) if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); z.sign = float16_val(a) >> 15; z.low = 0; - z.high = ((bits64) float16_val(a))<<54; + z.high = ((uint64_t) float16_val(a))<<54; return z; } @@ -156,7 +156,7 @@ int float32_is_quiet_nan( float32 a_ ) #if SNAN_BIT_IS_ONE return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); #else - return ( 0xFF800000 <= (bits32) ( a<<1 ) ); + return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); #endif } @@ -169,7 +169,7 @@ int float32_is_signaling_nan( float32 a_ ) { uint32_t a = float32_val(a_); #if SNAN_BIT_IS_ONE - return ( 0xFF800000 <= (bits32) ( a<<1 ) ); + return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); #else return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); #endif @@ -190,7 +190,7 @@ float32 float32_maybe_silence_nan( float32 a_ ) # error Rules for silencing a signaling NaN are target-specific # endif #else - bits32 a = float32_val(a_); + uint32_t a = float32_val(a_); a |= (1 << 22); return make_float32(a); #endif @@ -211,7 +211,7 @@ static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM ) if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); z.sign = float32_val(a)>>31; z.low = 0; - z.high = ( (bits64) float32_val(a) )<<41; + z.high = ( (uint64_t) float32_val(a) )<<41; return z; } @@ -222,7 +222,7 @@ static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM ) static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM) { - bits32 mantissa = a.high>>41; + uint32_t mantissa = a.high>>41; if ( STATUS(default_nan_mode) ) { return float32_default_nan; @@ -230,7 +230,7 @@ static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM) if ( mantissa ) return make_float32( - ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); + ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); else return float32_default_nan; } @@ -357,7 +357,7 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) { flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; flag aIsLargerSignificand; - bits32 av, bv; + uint32_t av, bv; aIsQuietNaN = float32_is_quiet_nan( a ); aIsSignalingNaN = float32_is_signaling_nan( a ); @@ -371,9 +371,9 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) if ( STATUS(default_nan_mode) ) return float32_default_nan; - if ((bits32)(av<<1) < (bits32)(bv<<1)) { + if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) { aIsLargerSignificand = 0; - } else if ((bits32)(bv<<1) < (bits32)(av<<1)) { + } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) { aIsLargerSignificand = 1; } else { aIsLargerSignificand = (av < bv) ? 1 : 0; @@ -394,13 +394,13 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) int float64_is_quiet_nan( float64 a_ ) { - bits64 a = float64_val(a_); + uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE return ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) && ( a & LIT64( 0x0007FFFFFFFFFFFF ) ); #else - return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); + return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); #endif } @@ -411,9 +411,9 @@ int float64_is_quiet_nan( float64 a_ ) int float64_is_signaling_nan( float64 a_ ) { - bits64 a = float64_val(a_); + uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE - return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); + return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); #else return ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) @@ -436,7 +436,7 @@ float64 float64_maybe_silence_nan( float64 a_ ) # error Rules for silencing a signaling NaN are target-specific # endif #else - bits64 a = float64_val(a_); + uint64_t a = float64_val(a_); a |= LIT64( 0x0008000000000000 ); return make_float64(a); #endif @@ -468,7 +468,7 @@ static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM) static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM) { - bits64 mantissa = a.high>>12; + uint64_t mantissa = a.high>>12; if ( STATUS(default_nan_mode) ) { return float64_default_nan; @@ -476,7 +476,7 @@ static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM) if ( mantissa ) return make_float64( - ( ( (bits64) a.sign )<<63 ) + ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FF0000000000000 ) | ( a.high>>12 )); else @@ -493,7 +493,7 @@ static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) { flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; flag aIsLargerSignificand; - bits64 av, bv; + uint64_t av, bv; aIsQuietNaN = float64_is_quiet_nan( a ); aIsSignalingNaN = float64_is_signaling_nan( a ); @@ -507,9 +507,9 @@ static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) if ( STATUS(default_nan_mode) ) return float64_default_nan; - if ((bits64)(av<<1) < (bits64)(bv<<1)) { + if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) { aIsLargerSignificand = 0; - } else if ((bits64)(bv<<1) < (bits64)(av<<1)) { + } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) { aIsLargerSignificand = 1; } else { aIsLargerSignificand = (av < bv) ? 1 : 0; @@ -534,16 +534,16 @@ static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) int floatx80_is_quiet_nan( floatx80 a ) { #if SNAN_BIT_IS_ONE - bits64 aLow; + uint64_t aLow; aLow = a.low & ~ LIT64( 0x4000000000000000 ); return ( ( a.high & 0x7FFF ) == 0x7FFF ) - && (bits64) ( aLow<<1 ) + && (uint64_t) ( aLow<<1 ) && ( a.low == aLow ); #else return ( ( a.high & 0x7FFF ) == 0x7FFF ) - && (LIT64( 0x8000000000000000 ) <= ((bits64) ( a.low<<1 ))); + && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 ))); #endif } @@ -557,14 +557,14 @@ int floatx80_is_signaling_nan( floatx80 a ) { #if SNAN_BIT_IS_ONE return ( ( a.high & 0x7FFF ) == 0x7FFF ) - && (LIT64( 0x8000000000000000 ) <= ((bits64) ( a.low<<1 ))); + && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 ))); #else - bits64 aLow; + uint64_t aLow; aLow = a.low & ~ LIT64( 0x4000000000000000 ); return ( ( a.high & 0x7FFF ) == 0x7FFF ) - && (bits64) ( aLow<<1 ) + && (uint64_t) ( aLow<<1 ) && ( a.low == aLow ); #endif } @@ -628,7 +628,7 @@ static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM) z.low = a.high; else z.low = floatx80_default_nan_low; - z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF; + z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF; return z; } @@ -689,7 +689,7 @@ int float128_is_quiet_nan( float128 a ) && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); #else return - ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) + ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); #endif } @@ -703,7 +703,7 @@ int float128_is_signaling_nan( float128 a ) { #if SNAN_BIT_IS_ONE return - ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) + ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); #else return @@ -767,7 +767,7 @@ static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM) } shift128Right( a.high, a.low, 16, &z.high, &z.low ); - z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 ); + z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 ); return z; } diff --git a/fpu/softfloat.c b/fpu/softfloat.c index e800daa..08e4ae0 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -109,7 +109,7 @@ INLINE flag extractFloat16Sign(float16 a) | positive or negative integer is returned. *----------------------------------------------------------------------------*/ -static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) +static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -140,7 +140,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) if ( zSign ) z = - z; if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) { float_raise( float_flag_invalid STATUS_VAR); - return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact; return z; @@ -159,7 +159,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) | returned. *----------------------------------------------------------------------------*/ -static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM) +static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM) { int8 roundingMode; flag roundNearestEven, increment; @@ -167,7 +167,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); - increment = ( (sbits64) absZ1 < 0 ); + increment = ( (int64_t) absZ1 < 0 ); if ( ! roundNearestEven ) { if ( roundingMode == float_round_to_zero ) { increment = 0; @@ -184,7 +184,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA if ( increment ) { ++absZ0; if ( absZ0 == 0 ) goto overflow; - absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven ); + absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven ); } z = absZ0; if ( zSign ) z = - z; @@ -192,7 +192,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA overflow: float_raise( float_flag_invalid STATUS_VAR); return - zSign ? (sbits64) LIT64( 0x8000000000000000 ) + zSign ? (int64_t) LIT64( 0x8000000000000000 ) : LIT64( 0x7FFFFFFFFFFFFFFF ); } if ( absZ1 ) STATUS(float_exception_flags) |= float_flag_inexact; @@ -204,7 +204,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA | Returns the fraction bits of the single-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits32 extractFloat32Frac( float32 a ) +INLINE uint32_t extractFloat32Frac( float32 a ) { return float32_val(a) & 0x007FFFFF; @@ -256,7 +256,7 @@ static float32 float32_squash_input_denormal(float32 a STATUS_PARAM) *----------------------------------------------------------------------------*/ static void - normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr ) + normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr ) { int8 shiftCount; @@ -277,11 +277,11 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) +INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) { return make_float32( - ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig); + ( ( (uint32_t) zSign )<<31 ) + ( ( (uint32_t) zExp )<<23 ) + zSig); } @@ -307,7 +307,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) +static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -332,10 +332,10 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_P } } roundBits = zSig & 0x7F; - if ( 0xFD <= (bits16) zExp ) { + if ( 0xFD <= (uint16_t) zExp ) { if ( ( 0xFD < zExp ) || ( ( zExp == 0xFD ) - && ( (sbits32) ( zSig + roundIncrement ) < 0 ) ) + && ( (int32_t) ( zSig + roundIncrement ) < 0 ) ) ) { float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR); return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 )); @@ -370,7 +370,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_P *----------------------------------------------------------------------------*/ static float32 - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) + normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) { int8 shiftCount; @@ -383,7 +383,7 @@ static float32 | Returns the fraction bits of the double-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloat64Frac( float64 a ) +INLINE uint64_t extractFloat64Frac( float64 a ) { return float64_val(a) & LIT64( 0x000FFFFFFFFFFFFF ); @@ -435,7 +435,7 @@ static float64 float64_squash_input_denormal(float64 a STATUS_PARAM) *----------------------------------------------------------------------------*/ static void - normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr ) + normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr ) { int8 shiftCount; @@ -456,11 +456,11 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) +INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) { return make_float64( - ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig); + ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig); } @@ -486,7 +486,7 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) +static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -511,10 +511,10 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_P } } roundBits = zSig & 0x3FF; - if ( 0x7FD <= (bits16) zExp ) { + if ( 0x7FD <= (uint16_t) zExp ) { if ( ( 0x7FD < zExp ) || ( ( zExp == 0x7FD ) - && ( (sbits64) ( zSig + roundIncrement ) < 0 ) ) + && ( (int64_t) ( zSig + roundIncrement ) < 0 ) ) ) { float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR); return packFloat64( zSign, 0x7FF, - ( roundIncrement == 0 )); @@ -549,7 +549,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_P *----------------------------------------------------------------------------*/ static float64 - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) + normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) { int8 shiftCount; @@ -565,7 +565,7 @@ static float64 | value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloatx80Frac( floatx80 a ) +INLINE uint64_t extractFloatx80Frac( floatx80 a ) { return a.low; @@ -604,7 +604,7 @@ INLINE flag extractFloatx80Sign( floatx80 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr ) + normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr ) { int8 shiftCount; @@ -619,12 +619,12 @@ static void | extended double-precision floating-point value, returning the result. *----------------------------------------------------------------------------*/ -INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) +INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig ) { floatx80 z; z.low = zSig; - z.high = ( ( (bits16) zSign )<<15 ) + zExp; + z.high = ( ( (uint16_t) zSign )<<15 ) + zExp; return z; } @@ -655,7 +655,7 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) static floatx80 roundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 + int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int8 roundingMode; @@ -692,7 +692,7 @@ static floatx80 } } roundBits = zSig0 & roundMask; - if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) { + if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) { if ( ( 0x7FFE < zExp ) || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) ) ) { @@ -710,7 +710,7 @@ static floatx80 if ( isTiny && roundBits ) float_raise( float_flag_underflow STATUS_VAR); if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact; zSig0 += roundIncrement; - if ( (sbits64) zSig0 < 0 ) zExp = 1; + if ( (int64_t) zSig0 < 0 ) zExp = 1; roundIncrement = roundMask + 1; if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) { roundMask |= roundIncrement; @@ -733,7 +733,7 @@ static floatx80 if ( zSig0 == 0 ) zExp = 0; return packFloatx80( zSign, zExp, zSig0 ); precision80: - increment = ( (sbits64) zSig1 < 0 ); + increment = ( (int64_t) zSig1 < 0 ); if ( ! roundNearestEven ) { if ( roundingMode == float_round_to_zero ) { increment = 0; @@ -747,7 +747,7 @@ static floatx80 } } } - if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) { + if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) { if ( ( 0x7FFE < zExp ) || ( ( zExp == 0x7FFE ) && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) ) @@ -776,7 +776,7 @@ static floatx80 if ( isTiny && zSig1 ) float_raise( float_flag_underflow STATUS_VAR); if ( zSig1 ) STATUS(float_exception_flags) |= float_flag_inexact; if ( roundNearestEven ) { - increment = ( (sbits64) zSig1 < 0 ); + increment = ( (int64_t) zSig1 < 0 ); } else { if ( zSign ) { @@ -789,8 +789,8 @@ static floatx80 if ( increment ) { ++zSig0; zSig0 &= - ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven ); - if ( (sbits64) zSig0 < 0 ) zExp = 1; + ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven ); + if ( (int64_t) zSig0 < 0 ) zExp = 1; } return packFloatx80( zSign, zExp, zSig0 ); } @@ -803,7 +803,7 @@ static floatx80 zSig0 = LIT64( 0x8000000000000000 ); } else { - zSig0 &= ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven ); + zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven ); } } else { @@ -824,7 +824,7 @@ static floatx80 static floatx80 normalizeRoundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 + int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int8 shiftCount; @@ -851,7 +851,7 @@ static floatx80 | floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloat128Frac1( float128 a ) +INLINE uint64_t extractFloat128Frac1( float128 a ) { return a.low; @@ -863,7 +863,7 @@ INLINE bits64 extractFloat128Frac1( float128 a ) | floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE bits64 extractFloat128Frac0( float128 a ) +INLINE uint64_t extractFloat128Frac0( float128 a ) { return a.high & LIT64( 0x0000FFFFFFFFFFFF ); @@ -905,11 +905,11 @@ INLINE flag extractFloat128Sign( float128 a ) static void normalizeFloat128Subnormal( - bits64 aSig0, - bits64 aSig1, + uint64_t aSig0, + uint64_t aSig1, int32 *zExpPtr, - bits64 *zSig0Ptr, - bits64 *zSig1Ptr + uint64_t *zSig0Ptr, + uint64_t *zSig1Ptr ) { int8 shiftCount; @@ -948,12 +948,12 @@ static void *----------------------------------------------------------------------------*/ INLINE float128 - packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 ) + packFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 ) { float128 z; z.low = zSig1; - z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0; + z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0; return z; } @@ -981,14 +981,14 @@ INLINE float128 static float128 roundAndPackFloat128( - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 STATUS_PARAM) + flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM) { int8 roundingMode; flag roundNearestEven, increment, isTiny; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); - increment = ( (sbits64) zSig2 < 0 ); + increment = ( (int64_t) zSig2 < 0 ); if ( ! roundNearestEven ) { if ( roundingMode == float_round_to_zero ) { increment = 0; @@ -1002,7 +1002,7 @@ static float128 } } } - if ( 0x7FFD <= (bits32) zExp ) { + if ( 0x7FFD <= (uint32_t) zExp ) { if ( ( 0x7FFD < zExp ) || ( ( zExp == 0x7FFD ) && eq128( @@ -1046,7 +1046,7 @@ static float128 zExp = 0; if ( isTiny && zSig2 ) float_raise( float_flag_underflow STATUS_VAR); if ( roundNearestEven ) { - increment = ( (sbits64) zSig2 < 0 ); + increment = ( (int64_t) zSig2 < 0 ); } else { if ( zSign ) { @@ -1082,10 +1082,10 @@ static float128 static float128 normalizeRoundAndPackFloat128( - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) + flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int8 shiftCount; - bits64 zSig2; + uint64_t zSig2; if ( zSig0 == 0 ) { zSig0 = zSig1; @@ -1119,7 +1119,7 @@ float32 int32_to_float32( int32 a STATUS_PARAM ) flag zSign; if ( a == 0 ) return float32_zero; - if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 ); + if ( a == (int32_t) 0x80000000 ) return packFloat32( 1, 0x9E, 0 ); zSign = ( a < 0 ); return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a STATUS_VAR ); @@ -1136,7 +1136,7 @@ float64 int32_to_float64( int32 a STATUS_PARAM ) flag zSign; uint32 absA; int8 shiftCount; - bits64 zSig; + uint64_t zSig; if ( a == 0 ) return float64_zero; zSign = ( a < 0 ); @@ -1161,7 +1161,7 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) flag zSign; uint32 absA; int8 shiftCount; - bits64 zSig; + uint64_t zSig; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); zSign = ( a < 0 ); @@ -1187,7 +1187,7 @@ float128 int32_to_float128( int32 a STATUS_PARAM ) flag zSign; uint32 absA; int8 shiftCount; - bits64 zSig0; + uint64_t zSig0; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); zSign = ( a < 0 ); @@ -1264,7 +1264,7 @@ float64 int64_to_float64( int64 a STATUS_PARAM ) flag zSign; if ( a == 0 ) return float64_zero; - if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) { + if ( a == (int64_t) LIT64( 0x8000000000000000 ) ) { return packFloat64( 1, 0x43E, 0 ); } zSign = ( a < 0 ); @@ -1318,7 +1318,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) uint64 absA; int8 shiftCount; int32 zExp; - bits64 zSig0, zSig1; + uint64_t zSig0, zSig1; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); zSign = ( a < 0 ); @@ -1355,8 +1355,8 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; - bits64 aSig64; + uint32_t aSig; + uint64_t aSig64; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -1386,7 +1386,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; + uint32_t aSig; int32 z; a = float32_squash_input_denormal(a STATUS_VAR); @@ -1399,7 +1399,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) float_raise( float_flag_invalid STATUS_VAR); if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF; } - return (sbits32) 0x80000000; + return (int32_t) 0x80000000; } else if ( aExp <= 0x7E ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; @@ -1407,7 +1407,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) } aSig = ( aSig | 0x00800000 )<<8; z = aSig>>( - shiftCount ); - if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) { + if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) z = - z; @@ -1429,7 +1429,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; + uint32_t aSig; int32 z; aSig = extractFloat32Frac( a ); @@ -1443,7 +1443,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) return 0x7FFF; } } - return (sbits32) 0xffff8000; + return (int32_t) 0xffff8000; } else if ( aExp <= 0x7E ) { if ( aExp | aSig ) { @@ -1454,7 +1454,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) shiftCount -= 0x10; aSig = ( aSig | 0x00800000 )<<8; z = aSig>>( - shiftCount ); - if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) { + if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) { @@ -1478,8 +1478,8 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; - bits64 aSig64, aSigExtra; + uint32_t aSig; + uint64_t aSig64, aSigExtra; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -1491,7 +1491,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } if ( aExp ) aSig |= 0x00800000; aSig64 = aSig; @@ -1515,8 +1515,8 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits32 aSig; - bits64 aSig64; + uint32_t aSig; + uint64_t aSig64; int64 z; a = float32_squash_input_denormal(a STATUS_VAR); @@ -1531,7 +1531,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } else if ( aExp <= 0x7E ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; @@ -1540,7 +1540,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) aSig64 = aSig | 0x00800000; aSig64 <<= 40; z = aSig64>>( - shiftCount ); - if ( (bits64) ( aSig64<<( shiftCount & 63 ) ) ) { + if ( (uint64_t) ( aSig64<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) z = - z; @@ -1559,7 +1559,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -1574,7 +1574,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) normalizeFloat32Subnormal( aSig, &aExp, &aSig ); --aExp; } - return packFloat64( aSign, aExp + 0x380, ( (bits64) aSig )<<29 ); + return packFloat64( aSign, aExp + 0x380, ( (uint64_t) aSig )<<29 ); } @@ -1591,7 +1591,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -1606,7 +1606,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) normalizeFloat32Subnormal( aSig, &aExp, &aSig ); } aSig |= 0x00800000; - return packFloatx80( aSign, aExp + 0x3F80, ( (bits64) aSig )<<40 ); + return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 ); } @@ -1625,7 +1625,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -1640,7 +1640,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) normalizeFloat32Subnormal( aSig, &aExp, &aSig ); --aExp; } - return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 ); + return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 ); } @@ -1657,9 +1657,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) { flag aSign; int16 aExp; - bits32 lastBitMask, roundBitsMask; + uint32_t lastBitMask, roundBitsMask; int8 roundingMode; - bits32 z; + uint32_t z; a = float32_squash_input_denormal(a STATUS_VAR); aExp = extractFloat32Exp( a ); @@ -1670,7 +1670,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) return a; } if ( aExp <= 0x7E ) { - if ( (bits32) ( float32_val(a)<<1 ) == 0 ) return a; + if ( (uint32_t) ( float32_val(a)<<1 ) == 0 ) return a; STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloat32Sign( a ); switch ( STATUS(float_rounding_mode) ) { @@ -1717,7 +1717,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { int16 aExp, bExp, zExp; - bits32 aSig, bSig, zSig; + uint32_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat32Frac( a ); @@ -1771,7 +1771,7 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) aSig |= 0x20000000; zSig = ( aSig + bSig )<<1; --zExp; - if ( (sbits32) zSig < 0 ) { + if ( (int32_t) zSig < 0 ) { zSig = aSig + bSig; ++zExp; } @@ -1791,7 +1791,7 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { int16 aExp, bExp, zExp; - bits32 aSig, bSig, zSig; + uint32_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat32Frac( a ); @@ -1911,9 +1911,9 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits32 aSig, bSig; - bits64 zSig64; - bits32 zSig; + uint32_t aSig, bSig; + uint64_t zSig64; + uint32_t zSig; a = float32_squash_input_denormal(a STATUS_VAR); b = float32_squash_input_denormal(b STATUS_VAR); @@ -1954,9 +1954,9 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) zExp = aExp + bExp - 0x7F; aSig = ( aSig | 0x00800000 )<<7; bSig = ( bSig | 0x00800000 )<<8; - shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 ); + shift64RightJamming( ( (uint64_t) aSig ) * bSig, 32, &zSig64 ); zSig = zSig64; - if ( 0 <= (sbits32) ( zSig<<1 ) ) { + if ( 0 <= (int32_t) ( zSig<<1 ) ) { zSig <<= 1; --zExp; } @@ -1974,7 +1974,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits32 aSig, bSig, zSig; + uint32_t aSig, bSig, zSig; a = float32_squash_input_denormal(a STATUS_VAR); b = float32_squash_input_denormal(b STATUS_VAR); @@ -2020,9 +2020,9 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) aSig >>= 1; ++zExp; } - zSig = ( ( (bits64) aSig )<<32 ) / bSig; + zSig = ( ( (uint64_t) aSig )<<32 ) / bSig; if ( ( zSig & 0x3F ) == 0 ) { - zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 ); + zSig |= ( (uint64_t) bSig * zSig != ( (uint64_t) aSig )<<32 ); } return roundAndPackFloat32( zSign, zExp, zSig STATUS_VAR ); @@ -2038,11 +2038,11 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) { flag aSign, zSign; int16 aExp, bExp, expDiff; - bits32 aSig, bSig; - bits32 q; - bits64 aSig64, bSig64, q64; - bits32 alternateASig; - sbits32 sigMean; + uint32_t aSig, bSig; + uint32_t q; + uint64_t aSig64, bSig64, q64; + uint32_t alternateASig; + int32_t sigMean; a = float32_squash_input_denormal(a STATUS_VAR); b = float32_squash_input_denormal(b STATUS_VAR); @@ -2086,7 +2086,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) q = ( bSig <= aSig ); if ( q ) aSig -= bSig; if ( 0 < expDiff ) { - q = ( ( (bits64) aSig )<<32 ) / bSig; + q = ( ( (uint64_t) aSig )<<32 ) / bSig; q >>= 32 - expDiff; bSig >>= 2; aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q; @@ -2098,8 +2098,8 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) } else { if ( bSig <= aSig ) aSig -= bSig; - aSig64 = ( (bits64) aSig )<<40; - bSig64 = ( (bits64) bSig )<<40; + aSig64 = ( (uint64_t) aSig )<<40; + bSig64 = ( (uint64_t) bSig )<<40; expDiff -= 64; while ( 0 < expDiff ) { q64 = estimateDiv128To64( aSig64, 0, bSig64 ); @@ -2118,12 +2118,12 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) alternateASig = aSig; ++q; aSig -= bSig; - } while ( 0 <= (sbits32) aSig ); + } while ( 0 <= (int32_t) aSig ); sigMean = aSig + alternateASig; if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) { aSig = alternateASig; } - zSign = ( (sbits32) aSig < 0 ); + zSign = ( (int32_t) aSig < 0 ); if ( zSign ) aSig = - aSig; return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig STATUS_VAR ); @@ -2139,8 +2139,8 @@ float32 float32_sqrt( float32 a STATUS_PARAM ) { flag aSign; int16 aExp, zExp; - bits32 aSig, zSig; - bits64 rem, term; + uint32_t aSig, zSig; + uint64_t rem, term; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -2170,11 +2170,11 @@ float32 float32_sqrt( float32 a STATUS_PARAM ) goto roundAndPack; } aSig >>= aExp & 1; - term = ( (bits64) zSig ) * zSig; - rem = ( ( (bits64) aSig )<<32 ) - term; - while ( (sbits64) rem < 0 ) { + term = ( (uint64_t) zSig ) * zSig; + rem = ( ( (uint64_t) aSig )<<32 ) - term; + while ( (int64_t) rem < 0 ) { --zSig; - rem += ( ( (bits64) zSig )<<1 ) | 1; + rem += ( ( (uint64_t) zSig )<<1 ) | 1; } zSig |= ( rem != 0 ); } @@ -2225,7 +2225,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; float64 r, x, xn; int i; a = float32_squash_input_denormal(a STATUS_VAR); @@ -2273,7 +2273,7 @@ float32 float32_log2( float32 a STATUS_PARAM ) { flag aSign, zSign; int16 aExp; - bits32 aSig, zSig, i; + uint32_t aSig, zSig, i; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -2299,7 +2299,7 @@ float32 float32_log2( float32 a STATUS_PARAM ) zSig = aExp << 23; for (i = 1 << 22; i > 0; i >>= 1) { - aSig = ( (bits64)aSig * aSig ) >> 23; + aSig = ( (uint64_t)aSig * aSig ) >> 23; if ( aSig & 0x01000000 ) { aSig >>= 1; zSig |= i; @@ -2332,7 +2332,7 @@ int float32_eq( float32 a, float32 b STATUS_PARAM ) return 0; } return ( float32_val(a) == float32_val(b) ) || - ( (bits32) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 ); + ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 ); } @@ -2346,7 +2346,7 @@ int float32_eq( float32 a, float32 b STATUS_PARAM ) int float32_le( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; a = float32_squash_input_denormal(a STATUS_VAR); b = float32_squash_input_denormal(b STATUS_VAR); @@ -2360,7 +2360,7 @@ int float32_le( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -2374,7 +2374,7 @@ int float32_le( float32 a, float32 b STATUS_PARAM ) int float32_lt( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; a = float32_squash_input_denormal(a STATUS_VAR); b = float32_squash_input_denormal(b STATUS_VAR); @@ -2388,7 +2388,7 @@ int float32_lt( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -2402,7 +2402,7 @@ int float32_lt( float32 a, float32 b STATUS_PARAM ) int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) { - bits32 av, bv; + uint32_t av, bv; a = float32_squash_input_denormal(a STATUS_VAR); b = float32_squash_input_denormal(b STATUS_VAR); @@ -2414,7 +2414,7 @@ int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) } av = float32_val(a); bv = float32_val(b); - return ( av == bv ) || ( (bits32) ( ( av | bv )<<1 ) == 0 ); + return ( av == bv ) || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); } @@ -2428,7 +2428,7 @@ int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; a = float32_squash_input_denormal(a STATUS_VAR); b = float32_squash_input_denormal(b STATUS_VAR); @@ -2444,7 +2444,7 @@ int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -2459,7 +2459,7 @@ int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; - bits32 av, bv; + uint32_t av, bv; a = float32_squash_input_denormal(a STATUS_VAR); b = float32_squash_input_denormal(b STATUS_VAR); @@ -2475,7 +2475,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) bSign = extractFloat32Sign( b ); av = float32_val(a); bv = float32_val(b); - if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -2494,7 +2494,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; a = float64_squash_input_denormal(a STATUS_VAR); aSig = extractFloat64Frac( a ); @@ -2522,7 +2522,7 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig, savedASig; + uint64_t aSig, savedASig; int32 z; a = float64_squash_input_denormal(a STATUS_VAR); @@ -2546,7 +2546,7 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) if ( ( z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( ( aSig<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -2569,7 +2569,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig, savedASig; + uint64_t aSig, savedASig; int32 z; aSig = extractFloat64Frac( a ); @@ -2598,7 +2598,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) if ( ( (int16_t)z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0xffff8000 : 0x7FFF; + return aSign ? (int32_t) 0xffff8000 : 0x7FFF; } if ( ( aSig<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -2620,7 +2620,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig, aSigExtra; + uint64_t aSig, aSigExtra; a = float64_squash_input_denormal(a STATUS_VAR); aSig = extractFloat64Frac( a ); @@ -2637,7 +2637,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } aSigExtra = 0; aSig <<= - shiftCount; @@ -2663,7 +2663,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; int64 z; a = float64_squash_input_denormal(a STATUS_VAR); @@ -2683,7 +2683,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } z = aSig<<shiftCount; } @@ -2693,7 +2693,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) return 0; } z = aSig>>( - shiftCount ); - if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { + if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } @@ -2713,8 +2713,8 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; - bits32 zSig; + uint64_t aSig; + uint32_t zSig; a = float64_squash_input_denormal(a STATUS_VAR); aSig = extractFloat64Frac( a ); @@ -2745,10 +2745,10 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) | than the desired result exponent whenever `zSig' is a complete, normalized | significand. *----------------------------------------------------------------------------*/ -static float16 packFloat16(flag zSign, int16 zExp, bits16 zSig) +static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig) { return make_float16( - (((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig); + (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig); } /* Half precision floats come in two formats: standard IEEE and "ARM" format. @@ -2758,7 +2758,7 @@ float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; aSign = extractFloat16Sign(a); aExp = extractFloat16Exp(a); @@ -2788,9 +2788,9 @@ float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM) { flag aSign; int16 aExp; - bits32 aSig; - bits32 mask; - bits32 increment; + uint32_t aSig; + uint32_t mask; + uint32_t increment; int8 roundingMode; a = float32_squash_input_denormal(a STATUS_VAR); @@ -2891,7 +2891,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; + uint64_t aSig; a = float64_squash_input_denormal(a STATUS_VAR); aSig = extractFloat64Frac( a ); @@ -2926,7 +2926,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig, zSig0, zSig1; + uint64_t aSig, zSig0, zSig1; a = float64_squash_input_denormal(a STATUS_VAR); aSig = extractFloat64Frac( a ); @@ -2959,9 +2959,9 @@ float64 float64_round_to_int( float64 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 lastBitMask, roundBitsMask; + uint64_t lastBitMask, roundBitsMask; int8 roundingMode; - bits64 z; + uint64_t z; a = float64_squash_input_denormal(a STATUS_VAR); aExp = extractFloat64Exp( a ); @@ -2972,7 +2972,7 @@ float64 float64_round_to_int( float64 a STATUS_PARAM ) return a; } if ( aExp < 0x3FF ) { - if ( (bits64) ( float64_val(a)<<1 ) == 0 ) return a; + if ( (uint64_t) ( float64_val(a)<<1 ) == 0 ) return a; STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloat64Sign( a ); switch ( STATUS(float_rounding_mode) ) { @@ -3032,7 +3032,7 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM) static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig; + uint64_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat64Frac( a ); @@ -3086,7 +3086,7 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) aSig |= LIT64( 0x2000000000000000 ); zSig = ( aSig + bSig )<<1; --zExp; - if ( (sbits64) zSig < 0 ) { + if ( (int64_t) zSig < 0 ) { zSig = aSig + bSig; ++zExp; } @@ -3106,7 +3106,7 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig; + uint64_t aSig, bSig, zSig; int16 expDiff; aSig = extractFloat64Frac( a ); @@ -3226,7 +3226,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; a = float64_squash_input_denormal(a STATUS_VAR); b = float64_squash_input_denormal(b STATUS_VAR); @@ -3269,7 +3269,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11; mul64To128( aSig, bSig, &zSig0, &zSig1 ); zSig0 |= ( zSig1 != 0 ); - if ( 0 <= (sbits64) ( zSig0<<1 ) ) { + if ( 0 <= (int64_t) ( zSig0<<1 ) ) { zSig0 <<= 1; --zExp; } @@ -3287,9 +3287,9 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; int16 aExp, bExp, zExp; - bits64 aSig, bSig, zSig; - bits64 rem0, rem1; - bits64 term0, term1; + uint64_t aSig, bSig, zSig; + uint64_t rem0, rem1; + uint64_t term0, term1; a = float64_squash_input_denormal(a STATUS_VAR); b = float64_squash_input_denormal(b STATUS_VAR); @@ -3339,7 +3339,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) if ( ( zSig & 0x1FF ) <= 2 ) { mul64To128( bSig, zSig, &term0, &term1 ); sub128( aSig, 0, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig; add128( rem0, rem1, 0, bSig, &rem0, &rem1 ); } @@ -3359,9 +3359,9 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) { flag aSign, zSign; int16 aExp, bExp, expDiff; - bits64 aSig, bSig; - bits64 q, alternateASig; - sbits64 sigMean; + uint64_t aSig, bSig; + uint64_t q, alternateASig; + int64_t sigMean; a = float64_squash_input_denormal(a STATUS_VAR); b = float64_squash_input_denormal(b STATUS_VAR); @@ -3424,12 +3424,12 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) alternateASig = aSig; ++q; aSig -= bSig; - } while ( 0 <= (sbits64) aSig ); + } while ( 0 <= (int64_t) aSig ); sigMean = aSig + alternateASig; if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) { aSig = alternateASig; } - zSign = ( (sbits64) aSig < 0 ); + zSign = ( (int64_t) aSig < 0 ); if ( zSign ) aSig = - aSig; return normalizeRoundAndPackFloat64( aSign ^ zSign, bExp, aSig STATUS_VAR ); @@ -3445,8 +3445,8 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) { flag aSign; int16 aExp, zExp; - bits64 aSig, zSig, doubleZSig; - bits64 rem0, rem1, term0, term1; + uint64_t aSig, zSig, doubleZSig; + uint64_t rem0, rem1, term0, term1; a = float64_squash_input_denormal(a STATUS_VAR); aSig = extractFloat64Frac( a ); @@ -3476,7 +3476,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) doubleZSig = zSig<<1; mul64To128( zSig, zSig, &term0, &term1 ); sub128( aSig, 0, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig; doubleZSig -= 2; add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 ); @@ -3496,7 +3496,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) { flag aSign, zSign; int16 aExp; - bits64 aSig, aSig0, aSig1, zSig, i; + uint64_t aSig, aSig0, aSig1, zSig, i; a = float64_squash_input_denormal(a STATUS_VAR); aSig = extractFloat64Frac( a ); @@ -3519,7 +3519,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) aExp -= 0x3FF; aSig |= LIT64( 0x0010000000000000 ); zSign = aExp < 0; - zSig = (bits64)aExp << 52; + zSig = (uint64_t)aExp << 52; for (i = 1LL << 51; i > 0; i >>= 1) { mul64To128( aSig, aSig, &aSig0, &aSig1 ); aSig = ( aSig0 << 12 ) | ( aSig1 >> 52 ); @@ -3542,7 +3542,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) int float64_eq( float64 a, float64 b STATUS_PARAM ) { - bits64 av, bv; + uint64_t av, bv; a = float64_squash_input_denormal(a STATUS_VAR); b = float64_squash_input_denormal(b STATUS_VAR); @@ -3556,7 +3556,7 @@ int float64_eq( float64 a, float64 b STATUS_PARAM ) } av = float64_val(a); bv = float64_val(b); - return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); } @@ -3570,7 +3570,7 @@ int float64_eq( float64 a, float64 b STATUS_PARAM ) int float64_le( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; a = float64_squash_input_denormal(a STATUS_VAR); b = float64_squash_input_denormal(b STATUS_VAR); @@ -3584,7 +3584,7 @@ int float64_le( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -3598,7 +3598,7 @@ int float64_le( float64 a, float64 b STATUS_PARAM ) int float64_lt( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; a = float64_squash_input_denormal(a STATUS_VAR); b = float64_squash_input_denormal(b STATUS_VAR); @@ -3612,7 +3612,7 @@ int float64_lt( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -3626,7 +3626,7 @@ int float64_lt( float64 a, float64 b STATUS_PARAM ) int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) { - bits64 av, bv; + uint64_t av, bv; a = float64_squash_input_denormal(a STATUS_VAR); b = float64_squash_input_denormal(b STATUS_VAR); @@ -3638,7 +3638,7 @@ int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) } av = float64_val(a); bv = float64_val(b); - return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); } @@ -3652,7 +3652,7 @@ int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; a = float64_squash_input_denormal(a STATUS_VAR); b = float64_squash_input_denormal(b STATUS_VAR); @@ -3668,7 +3668,7 @@ int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 ); + if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); return ( av == bv ) || ( aSign ^ ( av < bv ) ); } @@ -3683,7 +3683,7 @@ int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign; - bits64 av, bv; + uint64_t av, bv; a = float64_squash_input_denormal(a STATUS_VAR); b = float64_squash_input_denormal(b STATUS_VAR); @@ -3699,7 +3699,7 @@ int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) bSign = extractFloat64Sign( b ); av = float64_val(a); bv = float64_val(b); - if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 ); + if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 ); return ( av != bv ) && ( aSign ^ ( av < bv ) ); } @@ -3720,12 +3720,12 @@ int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0; + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0; shiftCount = 0x4037 - aExp; if ( shiftCount <= 0 ) shiftCount = 1; shift64RightJamming( aSig, shiftCount, &aSig ); @@ -3747,14 +3747,14 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig, savedASig; + uint64_t aSig, savedASig; int32 z; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( 0x401E < aExp ) { - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0; + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0; goto invalid; } else if ( aExp < 0x3FFF ) { @@ -3769,7 +3769,7 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) if ( ( z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( ( aSig<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -3792,7 +3792,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig, aSigExtra; + uint64_t aSig, aSigExtra; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -3807,7 +3807,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } aSigExtra = 0; } @@ -3832,7 +3832,7 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig; + uint64_t aSig; int64 z; aSig = extractFloatx80Frac( a ); @@ -3847,14 +3847,14 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } else if ( aExp < 0x3FFF ) { if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; return 0; } z = aSig>>( - shiftCount ); - if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { + if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } if ( aSign ) z = - z; @@ -3873,13 +3873,13 @@ float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig; + uint64_t aSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) { + if ( (uint64_t) ( aSig<<1 ) ) { return commonNaNToFloat32( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR ); } return packFloat32( aSign, 0xFF, 0 ); @@ -3901,13 +3901,13 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig, zSig; + uint64_t aSig, zSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) { + if ( (uint64_t) ( aSig<<1 ) ) { return commonNaNToFloat64( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR ); } return packFloat64( aSign, 0x7FF, 0 ); @@ -3931,12 +3931,12 @@ float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig, zSig0, zSig1; + uint64_t aSig, zSig0, zSig1; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) { + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) { return commonNaNToFloat128( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR ); } shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 ); @@ -3957,27 +3957,27 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 lastBitMask, roundBitsMask; + uint64_t lastBitMask, roundBitsMask; int8 roundingMode; floatx80 z; aExp = extractFloatx80Exp( a ); if ( 0x403E <= aExp ) { - if ( ( aExp == 0x7FFF ) && (bits64) ( extractFloatx80Frac( a )<<1 ) ) { + if ( ( aExp == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) { return propagateFloatx80NaN( a, a STATUS_VAR ); } return a; } if ( aExp < 0x3FFF ) { if ( ( aExp == 0 ) - && ( (bits64) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) { + && ( (uint64_t) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) { return a; } STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloatx80Sign( a ); switch ( STATUS(float_rounding_mode) ) { case float_round_nearest_even: - if ( ( aExp == 0x3FFE ) && (bits64) ( extractFloatx80Frac( a )<<1 ) + if ( ( aExp == 0x3FFE ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) { return packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) ); @@ -4030,7 +4030,7 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM) { int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; int32 expDiff; aSig = extractFloatx80Frac( a ); @@ -4040,7 +4040,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM expDiff = aExp - bExp; if ( 0 < expDiff ) { if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return a; } if ( bExp == 0 ) --expDiff; @@ -4049,7 +4049,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM } else if ( expDiff < 0 ) { if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( aExp == 0 ) ++expDiff; @@ -4058,7 +4058,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM } else { if ( aExp == 0x7FFF ) { - if ( (bits64) ( ( aSig | bSig )<<1 ) ) { + if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } return a; @@ -4073,7 +4073,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM goto shiftRight1; } zSig0 = aSig + bSig; - if ( (sbits64) zSig0 < 0 ) goto roundAndPack; + if ( (int64_t) zSig0 < 0 ) goto roundAndPack; shiftRight1: shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 ); zSig0 |= LIT64( 0x8000000000000000 ); @@ -4096,7 +4096,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM ) { int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; int32 expDiff; floatx80 z; @@ -4108,7 +4108,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM if ( 0 < expDiff ) goto aExpBigger; if ( expDiff < 0 ) goto bExpBigger; if ( aExp == 0x7FFF ) { - if ( (bits64) ( ( aSig | bSig )<<1 ) ) { + if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } float_raise( float_flag_invalid STATUS_VAR); @@ -4126,7 +4126,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM return packFloatx80( STATUS(float_rounding_mode) == float_round_down, 0, 0 ); bExpBigger: if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( aExp == 0 ) ++expDiff; @@ -4138,7 +4138,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM goto normalizeRoundAndPack; aExpBigger: if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return a; } if ( bExp == 0 ) --expDiff; @@ -4205,7 +4205,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; + uint64_t aSig, bSig, zSig0, zSig1; floatx80 z; aSig = extractFloatx80Frac( a ); @@ -4216,15 +4216,15 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) bSign = extractFloatx80Sign( b ); zSign = aSign ^ bSign; if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) - || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) { + if ( (uint64_t) ( aSig<<1 ) + || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } if ( ( bExp | bSig ) == 0 ) goto invalid; return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); if ( ( aExp | aSig ) == 0 ) { invalid: float_raise( float_flag_invalid STATUS_VAR); @@ -4244,7 +4244,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) } zExp = aExp + bExp - 0x3FFE; mul64To128( aSig, bSig, &zSig0, &zSig1 ); - if ( 0 < (sbits64) zSig0 ) { + if ( 0 < (int64_t) zSig0 ) { shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 ); --zExp; } @@ -4264,8 +4264,8 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig, bSig, zSig0, zSig1; - bits64 rem0, rem1, rem2, term0, term1, term2; + uint64_t aSig, bSig, zSig0, zSig1; + uint64_t rem0, rem1, rem2, term0, term1, term2; floatx80 z; aSig = extractFloatx80Frac( a ); @@ -4276,15 +4276,15 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) bSign = extractFloatx80Sign( b ); zSign = aSign ^ bSign; if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); goto invalid; } return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return packFloatx80( zSign, 0, 0 ); } if ( bExp == 0 ) { @@ -4314,15 +4314,15 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) zSig0 = estimateDiv128To64( aSig, rem1, bSig ); mul64To128( bSig, zSig0, &term0, &term1 ); sub128( aSig, rem1, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; add128( rem0, rem1, 0, bSig, &rem0, &rem1 ); } zSig1 = estimateDiv128To64( rem1, 0, bSig ); - if ( (bits64) ( zSig1<<1 ) <= 8 ) { + if ( (uint64_t) ( zSig1<<1 ) <= 8 ) { mul64To128( bSig, zSig1, &term1, &term2 ); sub128( rem1, 0, term1, term2, &rem1, &rem2 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; add128( rem1, rem2, 0, bSig, &rem1, &rem2 ); } @@ -4344,8 +4344,8 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, zSign; int32 aExp, bExp, expDiff; - bits64 aSig0, aSig1, bSig; - bits64 q, term0, term1, alternateASig0, alternateASig1; + uint64_t aSig0, aSig1, bSig; + uint64_t q, term0, term1, alternateASig0, alternateASig1; floatx80 z; aSig0 = extractFloatx80Frac( a ); @@ -4354,14 +4354,14 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) bSig = extractFloatx80Frac( b ); bExp = extractFloatx80Exp( b ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig0<<1 ) - || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) { + if ( (uint64_t) ( aSig0<<1 ) + || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) { return propagateFloatx80NaN( a, b STATUS_VAR ); } goto invalid; } if ( bExp == 0x7FFF ) { - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); return a; } if ( bExp == 0 ) { @@ -4375,7 +4375,7 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) normalizeFloatx80Subnormal( bSig, &bExp, &bSig ); } if ( aExp == 0 ) { - if ( (bits64) ( aSig0<<1 ) == 0 ) return a; + if ( (uint64_t) ( aSig0<<1 ) == 0 ) return a; normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 ); } bSig |= LIT64( 0x8000000000000000 ); @@ -4440,15 +4440,15 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) { flag aSign; int32 aExp, zExp; - bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0; - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; + uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0; + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; floatx80 z; aSig0 = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); aSign = extractFloatx80Sign( a ); if ( aExp == 0x7FFF ) { - if ( (bits64) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a STATUS_VAR ); + if ( (uint64_t) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a STATUS_VAR ); if ( ! aSign ) return a; goto invalid; } @@ -4471,7 +4471,7 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) doubleZSig0 = zSig0<<1; mul64To128( zSig0, zSig0, &term0, &term1 ); sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; doubleZSig0 -= 2; add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 ); @@ -4483,7 +4483,7 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) sub128( rem1, 0, term1, term2, &rem1, &rem2 ); mul64To128( zSig1, zSig1, &term2, &term3 ); sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; shortShift128Left( 0, zSig1, 1, &term2, &term3 ); term3 |= 1; @@ -4511,9 +4511,9 @@ int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM ) { if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { if ( floatx80_is_signaling_nan( a ) || floatx80_is_signaling_nan( b ) ) { @@ -4525,7 +4525,7 @@ int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -4542,9 +4542,9 @@ int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise( float_flag_invalid STATUS_VAR); return 0; @@ -4554,7 +4554,7 @@ int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -4575,9 +4575,9 @@ int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise( float_flag_invalid STATUS_VAR); return 0; @@ -4587,7 +4587,7 @@ int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -4607,9 +4607,9 @@ int floatx80_eq_signaling( floatx80 a, floatx80 b STATUS_PARAM ) { if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise( float_flag_invalid STATUS_VAR); return 0; @@ -4618,7 +4618,7 @@ int floatx80_eq_signaling( floatx80 a, floatx80 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -4635,9 +4635,9 @@ int floatx80_le_quiet( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { if ( floatx80_is_signaling_nan( a ) || floatx80_is_signaling_nan( b ) ) { @@ -4650,7 +4650,7 @@ int floatx80_le_quiet( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -4671,9 +4671,9 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { if ( floatx80_is_signaling_nan( a ) || floatx80_is_signaling_nan( b ) ) { @@ -4686,7 +4686,7 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -4713,7 +4713,7 @@ int32 float128_to_int32( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4742,7 +4742,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1, savedASig; + uint64_t aSig0, aSig1, savedASig; int32 z; aSig1 = extractFloat128Frac1( a ); @@ -4767,7 +4767,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) if ( ( z < 0 ) ^ aSign ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; } if ( ( aSig0<<shiftCount ) != savedASig ) { STATUS(float_exception_flags) |= float_flag_inexact; @@ -4790,7 +4790,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4808,7 +4808,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) ) { return LIT64( 0x7FFFFFFFFFFFFFFF ); } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 ); } @@ -4833,7 +4833,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, shiftCount; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; int64 z; aSig1 = extractFloat128Frac1( a ); @@ -4855,10 +4855,10 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) return LIT64( 0x7FFFFFFFFFFFFFFF ); } } - return (sbits64) LIT64( 0x8000000000000000 ); + return (int64_t) LIT64( 0x8000000000000000 ); } z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) ); - if ( (bits64) ( aSig1<<shiftCount ) ) { + if ( (uint64_t) ( aSig1<<shiftCount ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } @@ -4871,7 +4871,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) } z = aSig0>>( - shiftCount ); if ( aSig1 - || ( shiftCount && (bits64) ( aSig0<<( shiftCount & 63 ) ) ) ) { + || ( shiftCount && (uint64_t) ( aSig0<<( shiftCount & 63 ) ) ) ) { STATUS(float_exception_flags) |= float_flag_inexact; } } @@ -4891,8 +4891,8 @@ float32 float128_to_float32( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; - bits32 zSig; + uint64_t aSig0, aSig1; + uint32_t zSig; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4926,7 +4926,7 @@ float64 float128_to_float64( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4961,7 +4961,7 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4998,7 +4998,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 lastBitMask, roundBitsMask; + uint64_t lastBitMask, roundBitsMask; int8 roundingMode; float128 z; @@ -5023,9 +5023,9 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask; } else { - if ( (sbits64) z.low < 0 ) { + if ( (int64_t) z.low < 0 ) { ++z.high; - if ( (bits64) ( z.low<<1 ) == 0 ) z.high &= ~1; + if ( (uint64_t) ( z.low<<1 ) == 0 ) z.high &= ~1; } } } @@ -5039,7 +5039,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) } else { if ( aExp < 0x3FFF ) { - if ( ( ( (bits64) ( a.high<<1 ) ) | a.low ) == 0 ) return a; + if ( ( ( (uint64_t) ( a.high<<1 ) ) | a.low ) == 0 ) return a; STATUS(float_exception_flags) |= float_flag_inexact; aSign = extractFloat128Sign( a ); switch ( STATUS(float_rounding_mode) ) { @@ -5101,7 +5101,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; int32 expDiff; aSig1 = extractFloat128Frac1( a ); @@ -5182,7 +5182,7 @@ static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM static float128 subFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; int32 expDiff; float128 z; @@ -5307,7 +5307,7 @@ float128 float128_mul( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5371,8 +5371,8 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; int32 aExp, bExp, zExp; - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5426,7 +5426,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 ); mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 ); sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 ); } @@ -5434,7 +5434,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) if ( ( zSig1 & 0x3FFF ) <= 4 ) { mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 ); sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 ); } @@ -5455,9 +5455,9 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) { flag aSign, zSign; int32 aExp, bExp, expDiff; - bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; - bits64 allZero, alternateASig0, alternateASig1, sigMean1; - sbits64 sigMean0; + uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; + uint64_t allZero, alternateASig0, alternateASig1, sigMean1; + int64_t sigMean0; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5539,15 +5539,15 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) alternateASig1 = aSig1; ++q; sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 ); - } while ( 0 <= (sbits64) aSig0 ); + } while ( 0 <= (int64_t) aSig0 ); add128( - aSig0, aSig1, alternateASig0, alternateASig1, (bits64 *)&sigMean0, &sigMean1 ); + aSig0, aSig1, alternateASig0, alternateASig1, (uint64_t *)&sigMean0, &sigMean1 ); if ( ( sigMean0 < 0 ) || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) { aSig0 = alternateASig0; aSig1 = alternateASig1; } - zSign = ( (sbits64) aSig0 < 0 ); + zSign = ( (int64_t) aSig0 < 0 ); if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 ); return normalizeRoundAndPackFloat128( aSign ^ zSign, bExp - 4, aSig0, aSig1 STATUS_VAR ); @@ -5564,8 +5564,8 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) { flag aSign; int32 aExp, zExp; - bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; + uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5597,7 +5597,7 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) doubleZSig0 = zSig0<<1; mul64To128( zSig0, zSig0, &term0, &term1 ); sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 ); - while ( (sbits64) rem0 < 0 ) { + while ( (int64_t) rem0 < 0 ) { --zSig0; doubleZSig0 -= 2; add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 ); @@ -5609,7 +5609,7 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) sub128( rem1, 0, term1, term2, &rem1, &rem2 ); mul64To128( zSig1, zSig1, &term2, &term3 ); sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 ); - while ( (sbits64) rem1 < 0 ) { + while ( (int64_t) rem1 < 0 ) { --zSig1; shortShift128Left( 0, zSig1, 1, &term2, &term3 ); term3 |= 1; @@ -5647,7 +5647,7 @@ int float128_eq( float128 a, float128 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -5676,7 +5676,7 @@ int float128_le( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -5708,7 +5708,7 @@ int float128_lt( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -5739,7 +5739,7 @@ int float128_eq_signaling( float128 a, float128 b STATUS_PARAM ) ( a.low == b.low ) && ( ( a.high == b.high ) || ( ( a.low == 0 ) - && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) ) + && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) ) ); } @@ -5771,7 +5771,7 @@ int float128_le_quiet( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return @@ -5807,7 +5807,7 @@ int float128_lt_quiet( float128 a, float128 b STATUS_PARAM ) if ( aSign != bSign ) { return aSign - && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) + && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) != 0 ); } return @@ -5965,7 +5965,7 @@ INLINE int float ## s ## _compare_internal( float ## s a, float ## s b, \ int is_quiet STATUS_PARAM ) \ { \ flag aSign, bSign; \ - bits ## s av, bv; \ + uint ## s ## _t av, bv; \ a = float ## s ## _squash_input_denormal(a STATUS_VAR); \ b = float ## s ## _squash_input_denormal(b STATUS_VAR); \ \ @@ -5985,7 +5985,7 @@ INLINE int float ## s ## _compare_internal( float ## s a, float ## s b, \ av = float ## s ## _val(a); \ bv = float ## s ## _val(b); \ if ( aSign != bSign ) { \ - if ( (bits ## s) ( ( av | bv )<<1 ) == 0 ) { \ + if ( (uint ## s ## _t) ( ( av | bv )<<1 ) == 0 ) { \ /* zero case */ \ return float_relation_equal; \ } else { \ @@ -6062,7 +6062,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM ) { flag aSign; int16 aExp; - bits32 aSig; + uint32_t aSig; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -6086,7 +6086,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; + uint64_t aSig; a = float64_squash_input_denormal(a STATUS_VAR); aSig = extractFloat64Frac( a ); @@ -6111,7 +6111,7 @@ floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) { flag aSign; int16 aExp; - bits64 aSig; + uint64_t aSig; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -6134,7 +6134,7 @@ float128 float128_scalbn( float128 a, int n STATUS_PARAM ) { flag aSign; int32 aExp; - bits64 aSig0, aSig1; + uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 29492bc..5d05fa5 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -65,21 +65,6 @@ typedef signed int int32; typedef uint64_t uint64; typedef int64_t int64; -/*---------------------------------------------------------------------------- -| Each of the following `typedef's defines a type that holds integers -| of _exactly_ the number of bits specified. For instance, for most -| implementation of C, `bits16' and `sbits16' should be `typedef'ed to -| `unsigned short int' and `signed short int' (or `short int'), respectively. -*----------------------------------------------------------------------------*/ -typedef uint8_t bits8; -typedef int8_t sbits8; -typedef uint16_t bits16; -typedef int16_t sbits16; -typedef uint32_t bits32; -typedef int32_t sbits32; -typedef uint64_t bits64; -typedef int64_t sbits64; - #define LIT64( a ) a##LL #define INLINE static inline -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber @ 2011-03-07 0:34 ` Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 05/10] softfloat: Use [u]int_fast16_t consistently Andreas Färber 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Aurelien Jarno 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Aurelien Jarno 1 sibling, 2 replies; 55+ messages in thread From: Andreas Färber @ 2011-03-07 0:34 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber AIX already didn't use our definition, so let's start ripping out this one: As pointed out by Peter Maydell, int16 is currently int on most supported platforms, so let's replace it with int_fast16_t, allowing the system to use a wider type if appropriate. Note that Darwin uses [u]int16_t now, whereas Haiku uses [u]int32_t. v5: * Rebased. Convert new use of int16. v3: * Split off. Use [u]int_fast16_t rather than [u]int16_t. v2: * Rebased. Fix two new instances of int16. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: malc <av1474@comtv.ru> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-macros.h | 18 ++++---- fpu/softfloat.c | 116 ++++++++++++++++++++++++------------------------ fpu/softfloat.h | 8 +--- 3 files changed, 69 insertions(+), 73 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index 3128e60..7b350c0 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -44,7 +44,7 @@ these four paragraphs for those parts of this code that are retained. | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) +INLINE void shift32RightJamming( uint32_t a, int_fast16_t count, uint32_t *zPtr ) { uint32_t z; @@ -70,7 +70,7 @@ INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) | The result is stored in the location pointed to by `zPtr'. *----------------------------------------------------------------------------*/ -INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) +INLINE void shift64RightJamming( uint64_t a, int_fast16_t count, uint64_t *zPtr ) { uint64_t z; @@ -106,7 +106,7 @@ INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) INLINE void shift64ExtraRightJamming( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; int8 negCount = ( - count ) & 63; @@ -143,7 +143,7 @@ INLINE void INLINE void shift128Right( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; int8 negCount = ( - count ) & 63; @@ -178,7 +178,7 @@ INLINE void INLINE void shift128RightJamming( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; int8 negCount = ( - count ) & 63; @@ -232,7 +232,7 @@ INLINE void uint64_t a0, uint64_t a1, uint64_t a2, - int16 count, + int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr, uint64_t *z2Ptr @@ -287,7 +287,7 @@ INLINE void INLINE void shortShift128Left( - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { *z1Ptr = a1<<count; @@ -309,7 +309,7 @@ INLINE void uint64_t a0, uint64_t a1, uint64_t a2, - int16 count, + int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr, uint64_t *z2Ptr @@ -580,7 +580,7 @@ static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b ) | value. *----------------------------------------------------------------------------*/ -static uint32_t estimateSqrt32( int16 aExp, uint32_t a ) +static uint32_t estimateSqrt32( int_fast16_t aExp, uint32_t a ) { static const uint16_t sqrtOddAdjustments[] = { 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 08e4ae0..befd400 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -84,7 +84,7 @@ INLINE uint32_t extractFloat16Frac(float16 a) | Returns the exponent bits of the half-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat16Exp(float16 a) +INLINE int_fast16_t extractFloat16Exp(float16 a) { return (float16_val(a) >> 10) & 0x1f; } @@ -215,7 +215,7 @@ INLINE uint32_t extractFloat32Frac( float32 a ) | Returns the exponent bits of the single-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat32Exp( float32 a ) +INLINE int_fast16_t extractFloat32Exp( float32 a ) { return ( float32_val(a)>>23 ) & 0xFF; @@ -256,7 +256,7 @@ static float32 float32_squash_input_denormal(float32 a STATUS_PARAM) *----------------------------------------------------------------------------*/ static void - normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr ) + normalizeFloat32Subnormal( uint32_t aSig, int_fast16_t *zExpPtr, uint32_t *zSigPtr ) { int8 shiftCount; @@ -277,7 +277,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) +INLINE float32 packFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig ) { return make_float32( @@ -307,7 +307,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) +static float32 roundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; @@ -370,7 +370,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS *----------------------------------------------------------------------------*/ static float32 - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) + normalizeRoundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM) { int8 shiftCount; @@ -394,7 +394,7 @@ INLINE uint64_t extractFloat64Frac( float64 a ) | Returns the exponent bits of the double-precision floating-point value `a'. *----------------------------------------------------------------------------*/ -INLINE int16 extractFloat64Exp( float64 a ) +INLINE int_fast16_t extractFloat64Exp( float64 a ) { return ( float64_val(a)>>52 ) & 0x7FF; @@ -435,7 +435,7 @@ static float64 float64_squash_input_denormal(float64 a STATUS_PARAM) *----------------------------------------------------------------------------*/ static void - normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr ) + normalizeFloat64Subnormal( uint64_t aSig, int_fast16_t *zExpPtr, uint64_t *zSigPtr ) { int8 shiftCount; @@ -456,7 +456,7 @@ static void | significand. *----------------------------------------------------------------------------*/ -INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) +INLINE float64 packFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig ) { return make_float64( @@ -486,11 +486,11 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) | Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) +static float64 roundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM) { int8 roundingMode; flag roundNearestEven; - int16 roundIncrement, roundBits; + int_fast16_t roundIncrement, roundBits; flag isTiny; roundingMode = STATUS(float_rounding_mode); @@ -549,7 +549,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS *----------------------------------------------------------------------------*/ static float64 - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) + normalizeRoundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM) { int8 shiftCount; @@ -1354,7 +1354,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) int32 float32_to_int32( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64; @@ -1385,7 +1385,7 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; int32 z; a = float32_squash_input_denormal(a STATUS_VAR); @@ -1425,10 +1425,10 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) +int_fast16_t float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; int32 z; @@ -1477,7 +1477,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) int64 float32_to_int64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64, aSigExtra; a = float32_squash_input_denormal(a STATUS_VAR); @@ -1514,7 +1514,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64; int64 z; @@ -1558,7 +1558,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) float64 float32_to_float64( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; a = float32_squash_input_denormal(a STATUS_VAR); @@ -1590,7 +1590,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; a = float32_squash_input_denormal(a STATUS_VAR); @@ -1624,7 +1624,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) float128 float32_to_float128( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; a = float32_squash_input_denormal(a STATUS_VAR); @@ -1656,7 +1656,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) float32 float32_round_to_int( float32 a STATUS_PARAM) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t lastBitMask, roundBitsMask; int8 roundingMode; uint32_t z; @@ -1716,9 +1716,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1790,9 +1790,9 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -1910,7 +1910,7 @@ float32 float32_sub( float32 a, float32 b STATUS_PARAM ) float32 float32_mul( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig; uint64_t zSig64; uint32_t zSig; @@ -1973,7 +1973,7 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) float32 float32_div( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint32_t aSig, bSig, zSig; a = float32_squash_input_denormal(a STATUS_VAR); b = float32_squash_input_denormal(b STATUS_VAR); @@ -2037,7 +2037,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) float32 float32_rem( float32 a, float32 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int_fast16_t aExp, bExp, expDiff; uint32_t aSig, bSig; uint32_t q; uint64_t aSig64, bSig64, q64; @@ -2138,7 +2138,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) float32 float32_sqrt( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int_fast16_t aExp, zExp; uint32_t aSig, zSig; uint64_t rem, term; a = float32_squash_input_denormal(a STATUS_VAR); @@ -2224,7 +2224,7 @@ static const float64 float32_exp2_coefficients[15] = float32 float32_exp2( float32 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; float64 r, x, xn; int i; @@ -2272,7 +2272,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) float32 float32_log2( float32 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig, zSig, i; a = float32_squash_input_denormal(a STATUS_VAR); @@ -2493,7 +2493,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) int32 float64_to_int32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig; a = float64_squash_input_denormal(a STATUS_VAR); @@ -2521,7 +2521,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, savedASig; int32 z; a = float64_squash_input_denormal(a STATUS_VAR); @@ -2565,10 +2565,10 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) +int_fast16_t float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, savedASig; int32 z; @@ -2619,7 +2619,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) int64 float64_to_int64( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig, aSigExtra; a = float64_squash_input_denormal(a STATUS_VAR); @@ -2662,7 +2662,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, shiftCount; + int_fast16_t aExp, shiftCount; uint64_t aSig; int64 z; a = float64_squash_input_denormal(a STATUS_VAR); @@ -2712,7 +2712,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) float32 float64_to_float32( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; uint32_t zSig; a = float64_squash_input_denormal(a STATUS_VAR); @@ -2745,7 +2745,7 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) | than the desired result exponent whenever `zSig' is a complete, normalized | significand. *----------------------------------------------------------------------------*/ -static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig) +static float16 packFloat16(flag zSign, int_fast16_t zExp, uint16_t zSig) { return make_float16( (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig); @@ -2757,7 +2757,7 @@ static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig) float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; aSign = extractFloat16Sign(a); @@ -2787,7 +2787,7 @@ float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM) float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; uint32_t mask; uint32_t increment; @@ -2890,7 +2890,7 @@ float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM) floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; a = float64_squash_input_denormal(a STATUS_VAR); @@ -2925,7 +2925,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) float128 float64_to_float128( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, zSig0, zSig1; a = float64_squash_input_denormal(a STATUS_VAR); @@ -2958,7 +2958,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM ) float64 float64_round_to_int( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t lastBitMask, roundBitsMask; int8 roundingMode; uint64_t z; @@ -3031,9 +3031,9 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM) static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3105,9 +3105,9 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) { - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; - int16 expDiff; + int_fast16_t expDiff; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3225,7 +3225,7 @@ float64 float64_sub( float64 a, float64 b STATUS_PARAM ) float64 float64_mul( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; a = float64_squash_input_denormal(a STATUS_VAR); @@ -3286,7 +3286,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) float64 float64_div( float64 a, float64 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int16 aExp, bExp, zExp; + int_fast16_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig; uint64_t rem0, rem1; uint64_t term0, term1; @@ -3358,7 +3358,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) float64 float64_rem( float64 a, float64 b STATUS_PARAM ) { flag aSign, zSign; - int16 aExp, bExp, expDiff; + int_fast16_t aExp, bExp, expDiff; uint64_t aSig, bSig; uint64_t q, alternateASig; int64_t sigMean; @@ -3444,7 +3444,7 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) float64 float64_sqrt( float64 a STATUS_PARAM ) { flag aSign; - int16 aExp, zExp; + int_fast16_t aExp, zExp; uint64_t aSig, zSig, doubleZSig; uint64_t rem0, rem1, term0, term1; a = float64_squash_input_denormal(a STATUS_VAR); @@ -3495,7 +3495,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) float64 float64_log2( float64 a STATUS_PARAM ) { flag aSign, zSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, aSig0, aSig1, zSig, i; a = float64_squash_input_denormal(a STATUS_VAR); @@ -3930,7 +3930,7 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig, zSig0, zSig1; aSig = extractFloatx80Frac( a ); @@ -6061,7 +6061,7 @@ int float128_compare_quiet( float128 a, float128 b STATUS_PARAM ) float32 float32_scalbn( float32 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint32_t aSig; a = float32_squash_input_denormal(a STATUS_VAR); @@ -6085,7 +6085,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM ) float64 float64_scalbn( float64 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; a = float64_squash_input_denormal(a STATUS_VAR); @@ -6110,7 +6110,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM ) floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) { flag aSign; - int16 aExp; + int_fast16_t aExp; uint64_t aSig; aSig = extractFloatx80Frac( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 5d05fa5..f98e50c 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -56,10 +56,6 @@ these four paragraphs for those parts of this code that are retained. typedef uint8_t flag; typedef uint8_t uint8; typedef int8_t int8; -#ifndef _AIX -typedef int uint16; -typedef int int16; -#endif typedef unsigned int uint32; typedef signed int int32; typedef uint64_t uint64; @@ -288,7 +284,7 @@ float16 float16_maybe_silence_nan( float16 ); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ -int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM ); +int_fast16_t float32_to_int16_round_to_zero( float32 STATUS_PARAM ); unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); int32 float32_to_int32( float32 STATUS_PARAM ); int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); @@ -398,7 +394,7 @@ INLINE float32 float32_set_sign(float32 a, int sign) /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ -int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM ); +int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); int32 float64_to_int32( float64 STATUS_PARAM ); int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v5 05/10] softfloat: Use [u]int_fast16_t consistently 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber @ 2011-03-07 0:34 ` Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 06/10] softfloat: Drop [u]int8 types in favor of int_fast8_t Andreas Färber 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Aurelien Jarno 1 sibling, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-03-07 0:34 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Nathan Froyd Adapt float{32,64}_to_uint16_round_to_zero(). v5: * Reworded. v3: * Split off. Use uint_fast16_t rather than uint16_t. v2: * Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat.c | 8 ++++---- fpu/softfloat.h | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index befd400..4e23511 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -5865,10 +5865,10 @@ unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) return res; } -unsigned int float32_to_uint16_round_to_zero( float32 a STATUS_PARAM ) +uint_fast16_t float32_to_uint16_round_to_zero( float32 a STATUS_PARAM ) { int64_t v; - unsigned int res; + uint_fast16_t res; v = float32_to_int64_round_to_zero(a STATUS_VAR); if (v < 0) { @@ -5919,10 +5919,10 @@ unsigned int float64_to_uint32_round_to_zero( float64 a STATUS_PARAM ) return res; } -unsigned int float64_to_uint16_round_to_zero( float64 a STATUS_PARAM ) +uint_fast16_t float64_to_uint16_round_to_zero( float64 a STATUS_PARAM ) { int64_t v; - unsigned int res; + uint_fast16_t res; v = float64_to_int64_round_to_zero(a STATUS_VAR); if (v < 0) { diff --git a/fpu/softfloat.h b/fpu/softfloat.h index f98e50c..795c2ea 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -285,7 +285,7 @@ float16 float16_maybe_silence_nan( float16 ); | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ int_fast16_t float32_to_int16_round_to_zero( float32 STATUS_PARAM ); -unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); +uint_fast16_t float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); int32 float32_to_int32( float32 STATUS_PARAM ); int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); uint32 float32_to_uint32( float32 STATUS_PARAM ); @@ -395,7 +395,7 @@ INLINE float32 float32_set_sign(float32 a, int sign) | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); -unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); +uint_fast16_t float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); int32 float64_to_int32( float64 STATUS_PARAM ); int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); uint32 float64_to_uint32( float64 STATUS_PARAM ); -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v5 06/10] softfloat: Drop [u]int8 types in favor of int_fast8_t 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 05/10] softfloat: Use [u]int_fast16_t consistently Andreas Färber @ 2011-03-07 0:34 ` Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-03-07 0:34 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber v5: * Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-macros.h | 26 +++++++++--------- fpu/softfloat-specialize.h | 2 +- fpu/softfloat.c | 62 ++++++++++++++++++++++---------------------- fpu/softfloat.h | 4 +-- 4 files changed, 46 insertions(+), 48 deletions(-) diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h index 7b350c0..28637d4 100644 --- a/fpu/softfloat-macros.h +++ b/fpu/softfloat-macros.h @@ -109,7 +109,7 @@ INLINE void uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; - int8 negCount = ( - count ) & 63; + int_fast8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -146,7 +146,7 @@ INLINE void uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; - int8 negCount = ( - count ) & 63; + int_fast8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -181,7 +181,7 @@ INLINE void uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) { uint64_t z0, z1; - int8 negCount = ( - count ) & 63; + int_fast8_t negCount = ( - count ) & 63; if ( count == 0 ) { z1 = a1; @@ -239,7 +239,7 @@ INLINE void ) { uint64_t z0, z1, z2; - int8 negCount = ( - count ) & 63; + int_fast8_t negCount = ( - count ) & 63; if ( count == 0 ) { z2 = a2; @@ -316,7 +316,7 @@ INLINE void ) { uint64_t z0, z1, z2; - int8 negCount; + int_fast8_t negCount; z2 = a2<<count; z1 = a1<<count; @@ -373,7 +373,7 @@ INLINE void ) { uint64_t z0, z1, z2; - int8 carry0, carry1; + int_fast8_t carry0, carry1; z2 = a2 + b2; carry1 = ( z2 < a2 ); @@ -429,7 +429,7 @@ INLINE void ) { uint64_t z0, z1, z2; - int8 borrow0, borrow1; + int_fast8_t borrow0, borrow1; z2 = a2 - b2; borrow1 = ( a2 < b2 ); @@ -590,7 +590,7 @@ static uint32_t estimateSqrt32( int_fast16_t aExp, uint32_t a ) 0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E, 0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002 }; - int8 index; + int_fast8_t index; uint32_t z; index = ( a>>27 ) & 15; @@ -614,9 +614,9 @@ static uint32_t estimateSqrt32( int_fast16_t aExp, uint32_t a ) | `a'. If `a' is zero, 32 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros32( uint32_t a ) +static int_fast8_t countLeadingZeros32( uint32_t a ) { - static const int8 countLeadingZerosHigh[] = { + static const int_fast8_t countLeadingZerosHigh[] = { 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, @@ -634,7 +634,7 @@ static int8 countLeadingZeros32( uint32_t a ) 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; - int8 shiftCount; + int_fast8_t shiftCount; shiftCount = 0; if ( a < 0x10000 ) { @@ -655,9 +655,9 @@ static int8 countLeadingZeros32( uint32_t a ) | `a'. If `a' is zero, 64 is returned. *----------------------------------------------------------------------------*/ -static int8 countLeadingZeros64( uint64_t a ) +static int_fast8_t countLeadingZeros64( uint64_t a ) { - int8 shiftCount; + int_fast8_t shiftCount; shiftCount = 0; if ( a < ( (uint64_t) 1 )<<32 ) { diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 4b65de6..e81ae96 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -42,7 +42,7 @@ these four paragraphs for those parts of this code that are retained. | should be simply `float_exception_flags |= flags;'. *----------------------------------------------------------------------------*/ -void float_raise( int8 flags STATUS_PARAM ) +void float_raise( int_fast8_t flags STATUS_PARAM ) { STATUS(float_exception_flags) |= flags; } diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 4e23511..e6ecf6c 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -111,9 +111,9 @@ INLINE flag extractFloat16Sign(float16 a) static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) { - int8 roundingMode; + int_fast8_t roundingMode; flag roundNearestEven; - int8 roundIncrement, roundBits; + int_fast8_t roundIncrement, roundBits; int32 z; roundingMode = STATUS(float_rounding_mode); @@ -161,7 +161,7 @@ static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM) { - int8 roundingMode; + int_fast8_t roundingMode; flag roundNearestEven, increment; int64 z; @@ -258,7 +258,7 @@ static float32 float32_squash_input_denormal(float32 a STATUS_PARAM) static void normalizeFloat32Subnormal( uint32_t aSig, int_fast16_t *zExpPtr, uint32_t *zSigPtr ) { - int8 shiftCount; + int_fast8_t shiftCount; shiftCount = countLeadingZeros32( aSig ) - 8; *zSigPtr = aSig<<shiftCount; @@ -309,9 +309,9 @@ INLINE float32 packFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig ) static float32 roundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM) { - int8 roundingMode; + int_fast8_t roundingMode; flag roundNearestEven; - int8 roundIncrement, roundBits; + int_fast8_t roundIncrement, roundBits; flag isTiny; roundingMode = STATUS(float_rounding_mode); @@ -372,7 +372,7 @@ static float32 roundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig static float32 normalizeRoundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM) { - int8 shiftCount; + int_fast8_t shiftCount; shiftCount = countLeadingZeros32( zSig ) - 1; return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR); @@ -437,7 +437,7 @@ static float64 float64_squash_input_denormal(float64 a STATUS_PARAM) static void normalizeFloat64Subnormal( uint64_t aSig, int_fast16_t *zExpPtr, uint64_t *zSigPtr ) { - int8 shiftCount; + int_fast8_t shiftCount; shiftCount = countLeadingZeros64( aSig ) - 11; *zSigPtr = aSig<<shiftCount; @@ -488,7 +488,7 @@ INLINE float64 packFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig ) static float64 roundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM) { - int8 roundingMode; + int_fast8_t roundingMode; flag roundNearestEven; int_fast16_t roundIncrement, roundBits; flag isTiny; @@ -551,7 +551,7 @@ static float64 roundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig static float64 normalizeRoundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM) { - int8 shiftCount; + int_fast8_t shiftCount; shiftCount = countLeadingZeros64( zSig ) - 1; return roundAndPackFloat64( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR); @@ -606,7 +606,7 @@ INLINE flag extractFloatx80Sign( floatx80 a ) static void normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr ) { - int8 shiftCount; + int_fast8_t shiftCount; shiftCount = countLeadingZeros64( aSig ); *zSigPtr = aSig<<shiftCount; @@ -655,10 +655,10 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig ) static floatx80 roundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 + int_fast8_t roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { - int8 roundingMode; + int_fast8_t roundingMode; flag roundNearestEven, increment, isTiny; int64 roundIncrement, roundMask, roundBits; @@ -824,10 +824,10 @@ static floatx80 static floatx80 normalizeRoundAndPackFloatx80( - int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 + int_fast8_t roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { - int8 shiftCount; + int_fast8_t shiftCount; if ( zSig0 == 0 ) { zSig0 = zSig1; @@ -912,7 +912,7 @@ static void uint64_t *zSig1Ptr ) { - int8 shiftCount; + int_fast8_t shiftCount; if ( aSig0 == 0 ) { shiftCount = countLeadingZeros64( aSig1 ) - 15; @@ -983,7 +983,7 @@ static float128 roundAndPackFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM) { - int8 roundingMode; + int_fast8_t roundingMode; flag roundNearestEven, increment, isTiny; roundingMode = STATUS(float_rounding_mode); @@ -1084,7 +1084,7 @@ static float128 normalizeRoundAndPackFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { - int8 shiftCount; + int_fast8_t shiftCount; uint64_t zSig2; if ( zSig0 == 0 ) { @@ -1135,7 +1135,7 @@ float64 int32_to_float64( int32 a STATUS_PARAM ) { flag zSign; uint32 absA; - int8 shiftCount; + int_fast8_t shiftCount; uint64_t zSig; if ( a == 0 ) return float64_zero; @@ -1160,7 +1160,7 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) { flag zSign; uint32 absA; - int8 shiftCount; + int_fast8_t shiftCount; uint64_t zSig; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); @@ -1186,7 +1186,7 @@ float128 int32_to_float128( int32 a STATUS_PARAM ) { flag zSign; uint32 absA; - int8 shiftCount; + int_fast8_t shiftCount; uint64_t zSig0; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); @@ -1210,7 +1210,7 @@ float32 int64_to_float32( int64 a STATUS_PARAM ) { flag zSign; uint64 absA; - int8 shiftCount; + int_fast8_t shiftCount; if ( a == 0 ) return float32_zero; zSign = ( a < 0 ); @@ -1234,7 +1234,7 @@ float32 int64_to_float32( int64 a STATUS_PARAM ) float32 uint64_to_float32( uint64 a STATUS_PARAM ) { - int8 shiftCount; + int_fast8_t shiftCount; if ( a == 0 ) return float32_zero; shiftCount = countLeadingZeros64( a ) - 40; @@ -1292,7 +1292,7 @@ floatx80 int64_to_floatx80( int64 a STATUS_PARAM ) { flag zSign; uint64 absA; - int8 shiftCount; + int_fast8_t shiftCount; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); zSign = ( a < 0 ); @@ -1316,7 +1316,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) { flag zSign; uint64 absA; - int8 shiftCount; + int_fast8_t shiftCount; int32 zExp; uint64_t zSig0, zSig1; @@ -1658,7 +1658,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) flag aSign; int_fast16_t aExp; uint32_t lastBitMask, roundBitsMask; - int8 roundingMode; + int_fast8_t roundingMode; uint32_t z; a = float32_squash_input_denormal(a STATUS_VAR); @@ -2771,7 +2771,7 @@ float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM) return packFloat32(aSign, 0xff, aSig << 13); } if (aExp == 0) { - int8 shiftCount; + int_fast8_t shiftCount; if (aSig == 0) { return packFloat32(aSign, 0, 0); @@ -2791,7 +2791,7 @@ float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM) uint32_t aSig; uint32_t mask; uint32_t increment; - int8 roundingMode; + int_fast8_t roundingMode; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -2960,7 +2960,7 @@ float64 float64_round_to_int( float64 a STATUS_PARAM ) flag aSign; int_fast16_t aExp; uint64_t lastBitMask, roundBitsMask; - int8 roundingMode; + int_fast8_t roundingMode; uint64_t z; a = float64_squash_input_denormal(a STATUS_VAR); @@ -3958,7 +3958,7 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) flag aSign; int32 aExp; uint64_t lastBitMask, roundBitsMask; - int8 roundingMode; + int_fast8_t roundingMode; floatx80 z; aExp = extractFloatx80Exp( a ); @@ -4999,7 +4999,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) flag aSign; int32 aExp; uint64_t lastBitMask, roundBitsMask; - int8 roundingMode; + int_fast8_t roundingMode; float128 z; aExp = extractFloat128Exp( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 795c2ea..c599cc2 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -54,8 +54,6 @@ these four paragraphs for those parts of this code that are retained. | to the same as `int'. *----------------------------------------------------------------------------*/ typedef uint8_t flag; -typedef uint8_t uint8; -typedef int8_t int8; typedef unsigned int uint32; typedef signed int int32; typedef uint64_t uint64; @@ -231,7 +229,7 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM); | Routine to raise any or all of the software IEC/IEEE floating-point | exception flags. *----------------------------------------------------------------------------*/ -void float_raise( int8 flags STATUS_PARAM); +void float_raise( int_fast8_t flags STATUS_PARAM); /*---------------------------------------------------------------------------- | Software IEC/IEEE integer-to-floating-point conversion routines. -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 06/10] softfloat: Drop [u]int8 types in favor of int_fast8_t Andreas Färber @ 2011-03-07 0:34 ` Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 08/10] softfloat: Use [u]int_fast32_t consistently Andreas Färber 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t Aurelien Jarno 0 siblings, 2 replies; 55+ messages in thread From: Andreas Färber @ 2011-03-07 0:34 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber v5: * Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat.c | 132 +++++++++++++++++++++++++++--------------------------- fpu/softfloat.h | 34 +++++++-------- 2 files changed, 82 insertions(+), 84 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index e6ecf6c..7f0f603 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -109,12 +109,12 @@ INLINE flag extractFloat16Sign(float16 a) | positive or negative integer is returned. *----------------------------------------------------------------------------*/ -static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) +static int_fast32_t roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) { int_fast8_t roundingMode; flag roundNearestEven; int_fast8_t roundIncrement, roundBits; - int32 z; + int_fast32_t z; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -577,7 +577,7 @@ INLINE uint64_t extractFloatx80Frac( floatx80 a ) | value `a'. *----------------------------------------------------------------------------*/ -INLINE int32 extractFloatx80Exp( floatx80 a ) +INLINE int_fast32_t extractFloatx80Exp( floatx80 a ) { return a.high & 0x7FFF; @@ -604,7 +604,7 @@ INLINE flag extractFloatx80Sign( floatx80 a ) *----------------------------------------------------------------------------*/ static void - normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr ) + normalizeFloatx80Subnormal( uint64_t aSig, int_fast32_t *zExpPtr, uint64_t *zSigPtr ) { int_fast8_t shiftCount; @@ -619,7 +619,7 @@ static void | extended double-precision floating-point value, returning the result. *----------------------------------------------------------------------------*/ -INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig ) +INLINE floatx80 packFloatx80( flag zSign, int_fast32_t zExp, uint64_t zSig ) { floatx80 z; @@ -655,7 +655,7 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig ) static floatx80 roundAndPackFloatx80( - int_fast8_t roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 + int_fast8_t roundingPrecision, flag zSign, int_fast32_t zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int_fast8_t roundingMode; @@ -824,7 +824,7 @@ static floatx80 static floatx80 normalizeRoundAndPackFloatx80( - int_fast8_t roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 + int_fast8_t roundingPrecision, flag zSign, int_fast32_t zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int_fast8_t shiftCount; @@ -875,7 +875,7 @@ INLINE uint64_t extractFloat128Frac0( float128 a ) | `a'. *----------------------------------------------------------------------------*/ -INLINE int32 extractFloat128Exp( float128 a ) +INLINE int_fast32_t extractFloat128Exp( float128 a ) { return ( a.high>>48 ) & 0x7FFF; @@ -907,7 +907,7 @@ static void normalizeFloat128Subnormal( uint64_t aSig0, uint64_t aSig1, - int32 *zExpPtr, + int_fast32_t *zExpPtr, uint64_t *zSig0Ptr, uint64_t *zSig1Ptr ) @@ -948,7 +948,7 @@ static void *----------------------------------------------------------------------------*/ INLINE float128 - packFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 ) + packFloat128( flag zSign, int_fast32_t zExp, uint64_t zSig0, uint64_t zSig1 ) { float128 z; @@ -981,7 +981,7 @@ INLINE float128 static float128 roundAndPackFloat128( - flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM) + flag zSign, int_fast32_t zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM) { int_fast8_t roundingMode; flag roundNearestEven, increment, isTiny; @@ -1082,7 +1082,7 @@ static float128 static float128 normalizeRoundAndPackFloat128( - flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) + flag zSign, int_fast32_t zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) { int_fast8_t shiftCount; uint64_t zSig2; @@ -1114,7 +1114,7 @@ static float128 | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float32 int32_to_float32( int32 a STATUS_PARAM ) +float32 int32_to_float32( int_fast32_t a STATUS_PARAM ) { flag zSign; @@ -1131,10 +1131,10 @@ float32 int32_to_float32( int32 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float64 int32_to_float64( int32 a STATUS_PARAM ) +float64 int32_to_float64( int_fast32_t a STATUS_PARAM ) { flag zSign; - uint32 absA; + uint_fast32_t absA; int_fast8_t shiftCount; uint64_t zSig; @@ -1156,10 +1156,10 @@ float64 int32_to_float64( int32 a STATUS_PARAM ) | Arithmetic. *----------------------------------------------------------------------------*/ -floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) +floatx80 int32_to_floatx80( int_fast32_t a STATUS_PARAM ) { flag zSign; - uint32 absA; + uint_fast32_t absA; int_fast8_t shiftCount; uint64_t zSig; @@ -1182,10 +1182,10 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float128 int32_to_float128( int32 a STATUS_PARAM ) +float128 int32_to_float128( int_fast32_t a STATUS_PARAM ) { flag zSign; - uint32 absA; + uint_fast32_t absA; int_fast8_t shiftCount; uint64_t zSig0; @@ -1317,7 +1317,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) flag zSign; uint64 absA; int_fast8_t shiftCount; - int32 zExp; + int_fast32_t zExp; uint64_t zSig0, zSig1; if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); @@ -1351,7 +1351,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 float32_to_int32( float32 a STATUS_PARAM ) +int_fast32_t float32_to_int32( float32 a STATUS_PARAM ) { flag aSign; int_fast16_t aExp, shiftCount; @@ -1382,12 +1382,12 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) +int_fast32_t float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int_fast16_t aExp, shiftCount; uint32_t aSig; - int32 z; + int_fast32_t z; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -1430,7 +1430,7 @@ int_fast16_t float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) flag aSign; int_fast16_t aExp, shiftCount; uint32_t aSig; - int32 z; + int_fast32_t z; aSig = extractFloat32Frac( a ); aExp = extractFloat32Exp( a ); @@ -2490,7 +2490,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 float64_to_int32( float64 a STATUS_PARAM ) +int_fast32_t float64_to_int32( float64 a STATUS_PARAM ) { flag aSign; int_fast16_t aExp, shiftCount; @@ -2518,12 +2518,12 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) +int_fast32_t float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int_fast16_t aExp, shiftCount; uint64_t aSig, savedASig; - int32 z; + int_fast32_t z; a = float64_squash_input_denormal(a STATUS_VAR); aSig = extractFloat64Frac( a ); @@ -2570,7 +2570,7 @@ int_fast16_t float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) flag aSign; int_fast16_t aExp, shiftCount; uint64_t aSig, savedASig; - int32 z; + int_fast32_t z; aSig = extractFloat64Frac( a ); aExp = extractFloat64Exp( a ); @@ -3716,10 +3716,10 @@ int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) | overflows, the largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) +int_fast32_t floatx80_to_int32( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int_fast32_t aExp, shiftCount; uint64_t aSig; aSig = extractFloatx80Frac( a ); @@ -3743,12 +3743,12 @@ int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) | sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) +int_fast32_t floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int_fast32_t aExp, shiftCount; uint64_t aSig, savedASig; - int32 z; + int_fast32_t z; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -3791,7 +3791,7 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int_fast32_t aExp, shiftCount; uint64_t aSig, aSigExtra; aSig = extractFloatx80Frac( a ); @@ -3831,7 +3831,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int_fast32_t aExp, shiftCount; uint64_t aSig; int64 z; @@ -3872,7 +3872,7 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int_fast32_t aExp; uint64_t aSig; aSig = extractFloatx80Frac( a ); @@ -3900,7 +3900,7 @@ float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int_fast32_t aExp; uint64_t aSig, zSig; aSig = extractFloatx80Frac( a ); @@ -3956,7 +3956,7 @@ float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int_fast32_t aExp; uint64_t lastBitMask, roundBitsMask; int_fast8_t roundingMode; floatx80 z; @@ -4029,9 +4029,9 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM) { - int32 aExp, bExp, zExp; + int_fast32_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; - int32 expDiff; + int_fast32_t expDiff; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -4095,9 +4095,9 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM ) { - int32 aExp, bExp, zExp; + int_fast32_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; - int32 expDiff; + int_fast32_t expDiff; floatx80 z; aSig = extractFloatx80Frac( a ); @@ -4204,7 +4204,7 @@ floatx80 floatx80_sub( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int_fast32_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; floatx80 z; @@ -4263,7 +4263,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int_fast32_t aExp, bExp, zExp; uint64_t aSig, bSig, zSig0, zSig1; uint64_t rem0, rem1, rem2, term0, term1, term2; floatx80 z; @@ -4343,7 +4343,7 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) { flag aSign, zSign; - int32 aExp, bExp, expDiff; + int_fast32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig; uint64_t q, term0, term1, alternateASig0, alternateASig1; floatx80 z; @@ -4439,7 +4439,7 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) { flag aSign; - int32 aExp, zExp; + int_fast32_t aExp, zExp; uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; floatx80 z; @@ -4709,10 +4709,10 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int32 float128_to_int32( float128 a STATUS_PARAM ) +int_fast32_t float128_to_int32( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int_fast32_t aExp, shiftCount; uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4738,12 +4738,12 @@ int32 float128_to_int32( float128 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) +int_fast32_t float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int_fast32_t aExp, shiftCount; uint64_t aSig0, aSig1, savedASig; - int32 z; + int_fast32_t z; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -4789,7 +4789,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) int64 float128_to_int64( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int_fast32_t aExp, shiftCount; uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4832,7 +4832,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, shiftCount; + int_fast32_t aExp, shiftCount; uint64_t aSig0, aSig1; int64 z; @@ -4890,7 +4890,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) float32 float128_to_float32( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int_fast32_t aExp; uint64_t aSig0, aSig1; uint32_t zSig; @@ -4925,7 +4925,7 @@ float32 float128_to_float32( float128 a STATUS_PARAM ) float64 float128_to_float64( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int_fast32_t aExp; uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4960,7 +4960,7 @@ float64 float128_to_float64( float128 a STATUS_PARAM ) floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int_fast32_t aExp; uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); @@ -4997,7 +4997,7 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) float128 float128_round_to_int( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp; + int_fast32_t aExp; uint64_t lastBitMask, roundBitsMask; int_fast8_t roundingMode; float128 z; @@ -5100,9 +5100,9 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { - int32 aExp, bExp, zExp; + int_fast32_t aExp, bExp, zExp; uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; - int32 expDiff; + int_fast32_t expDiff; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); @@ -5181,9 +5181,9 @@ static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM static float128 subFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) { - int32 aExp, bExp, zExp; + int_fast32_t aExp, bExp, zExp; uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; - int32 expDiff; + int_fast32_t expDiff; float128 z; aSig1 = extractFloat128Frac1( a ); @@ -5306,7 +5306,7 @@ float128 float128_sub( float128 a, float128 b STATUS_PARAM ) float128 float128_mul( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int_fast32_t aExp, bExp, zExp; uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; float128 z; @@ -5370,7 +5370,7 @@ float128 float128_mul( float128 a, float128 b STATUS_PARAM ) float128 float128_div( float128 a, float128 b STATUS_PARAM ) { flag aSign, bSign, zSign; - int32 aExp, bExp, zExp; + int_fast32_t aExp, bExp, zExp; uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; @@ -5454,7 +5454,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) float128 float128_rem( float128 a, float128 b STATUS_PARAM ) { flag aSign, zSign; - int32 aExp, bExp, expDiff; + int_fast32_t aExp, bExp, expDiff; uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; uint64_t allZero, alternateASig0, alternateASig1, sigMean1; int64_t sigMean0; @@ -5563,7 +5563,7 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) float128 float128_sqrt( float128 a STATUS_PARAM ) { flag aSign; - int32 aExp, zExp; + int_fast32_t aExp, zExp; uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; float128 z; @@ -6133,7 +6133,7 @@ floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) float128 float128_scalbn( float128 a, int n STATUS_PARAM ) { flag aSign; - int32 aExp; + int_fast32_t aExp; uint64_t aSig0, aSig1; aSig1 = extractFloat128Frac1( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index c599cc2..4c64d77 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -54,8 +54,6 @@ these four paragraphs for those parts of this code that are retained. | to the same as `int'. *----------------------------------------------------------------------------*/ typedef uint8_t flag; -typedef unsigned int uint32; -typedef signed int int32; typedef uint64_t uint64; typedef int64_t int64; @@ -234,15 +232,15 @@ void float_raise( int_fast8_t flags STATUS_PARAM); /*---------------------------------------------------------------------------- | Software IEC/IEEE integer-to-floating-point conversion routines. *----------------------------------------------------------------------------*/ -float32 int32_to_float32( int32 STATUS_PARAM ); -float64 int32_to_float64( int32 STATUS_PARAM ); +float32 int32_to_float32( int_fast32_t STATUS_PARAM ); +float64 int32_to_float64( int_fast32_t STATUS_PARAM ); float32 uint32_to_float32( unsigned int STATUS_PARAM ); float64 uint32_to_float64( unsigned int STATUS_PARAM ); #ifdef FLOATX80 -floatx80 int32_to_floatx80( int32 STATUS_PARAM ); +floatx80 int32_to_floatx80( int_fast32_t STATUS_PARAM ); #endif #ifdef FLOAT128 -float128 int32_to_float128( int32 STATUS_PARAM ); +float128 int32_to_float128( int_fast32_t STATUS_PARAM ); #endif float32 int64_to_float32( int64 STATUS_PARAM ); float32 uint64_to_float32( uint64 STATUS_PARAM ); @@ -284,10 +282,10 @@ float16 float16_maybe_silence_nan( float16 ); *----------------------------------------------------------------------------*/ int_fast16_t float32_to_int16_round_to_zero( float32 STATUS_PARAM ); uint_fast16_t float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); -int32 float32_to_int32( float32 STATUS_PARAM ); -int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); -uint32 float32_to_uint32( float32 STATUS_PARAM ); -uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); +int_fast32_t float32_to_int32( float32 STATUS_PARAM ); +int_fast32_t float32_to_int32_round_to_zero( float32 STATUS_PARAM ); +uint_fast32_t float32_to_uint32( float32 STATUS_PARAM ); +uint_fast32_t float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); int64 float32_to_int64( float32 STATUS_PARAM ); int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM ); float64 float32_to_float64( float32 STATUS_PARAM ); @@ -394,10 +392,10 @@ INLINE float32 float32_set_sign(float32 a, int sign) *----------------------------------------------------------------------------*/ int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); uint_fast16_t float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); -int32 float64_to_int32( float64 STATUS_PARAM ); -int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); -uint32 float64_to_uint32( float64 STATUS_PARAM ); -uint32 float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); +int_fast32_t float64_to_int32( float64 STATUS_PARAM ); +int_fast32_t float64_to_int32_round_to_zero( float64 STATUS_PARAM ); +uint_fast32_t float64_to_uint32( float64 STATUS_PARAM ); +uint_fast32_t float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); int64 float64_to_int64( float64 STATUS_PARAM ); int64 float64_to_int64_round_to_zero( float64 STATUS_PARAM ); uint64 float64_to_uint64 (float64 a STATUS_PARAM); @@ -501,8 +499,8 @@ INLINE float64 float64_set_sign(float64 a, int sign) /*---------------------------------------------------------------------------- | Software IEC/IEEE extended double-precision conversion routines. *----------------------------------------------------------------------------*/ -int32 floatx80_to_int32( floatx80 STATUS_PARAM ); -int32 floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); +int_fast32_t floatx80_to_int32( floatx80 STATUS_PARAM ); +int_fast32_t floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); int64 floatx80_to_int64( floatx80 STATUS_PARAM ); int64 floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); float32 floatx80_to_float32( floatx80 STATUS_PARAM ); @@ -584,8 +582,8 @@ INLINE int floatx80_is_any_nan(floatx80 a) /*---------------------------------------------------------------------------- | Software IEC/IEEE quadruple-precision conversion routines. *----------------------------------------------------------------------------*/ -int32 float128_to_int32( float128 STATUS_PARAM ); -int32 float128_to_int32_round_to_zero( float128 STATUS_PARAM ); +int_fast32_t float128_to_int32( float128 STATUS_PARAM ); +int_fast32_t float128_to_int32_round_to_zero( float128 STATUS_PARAM ); int64 float128_to_int64( float128 STATUS_PARAM ); int64 float128_to_int64_round_to_zero( float128 STATUS_PARAM ); float32 float128_to_float32( float128 STATUS_PARAM ); -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v5 08/10] softfloat: Use [u]int_fast32_t consistently 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t Andreas Färber @ 2011-03-07 0:34 ` Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 09/10] softfloat: Drop [u]int64 types in favor of [u]int_fast64_t Andreas Färber 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t Aurelien Jarno 1 sibling, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-03-07 0:34 UTC (permalink / raw) To: qemu-devel; +Cc: Andreas Färber v5: * Initial. Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-native.c | 42 +++++++++++++++++++++--------------------- fpu/softfloat-native.h | 32 ++++++++++++++++---------------- fpu/softfloat.c | 12 ++++++------ fpu/softfloat.h | 4 ++-- 4 files changed, 45 insertions(+), 45 deletions(-) diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c index 50355a4..2c08958 100644 --- a/fpu/softfloat-native.c +++ b/fpu/softfloat-native.c @@ -77,28 +77,28 @@ static double qemu_rint(double x) /*---------------------------------------------------------------------------- | Software IEC/IEEE integer-to-floating-point conversion routines. *----------------------------------------------------------------------------*/ -float32 int32_to_float32(int v STATUS_PARAM) +float32 int32_to_float32(int_fast32_t v STATUS_PARAM) { return (float32)v; } -float32 uint32_to_float32(unsigned int v STATUS_PARAM) +float32 uint32_to_float32(uint_fast32_t v STATUS_PARAM) { return (float32)v; } -float64 int32_to_float64(int v STATUS_PARAM) +float64 int32_to_float64(int_fast32_t v STATUS_PARAM) { return (float64)v; } -float64 uint32_to_float64(unsigned int v STATUS_PARAM) +float64 uint32_to_float64(uint_fast32_t v STATUS_PARAM) { return (float64)v; } #ifdef FLOATX80 -floatx80 int32_to_floatx80(int v STATUS_PARAM) +floatx80 int32_to_floatx80(int_fast32_t v STATUS_PARAM) { return (floatx80)v; } @@ -144,13 +144,13 @@ static inline int long_to_int32(long a) /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ -int float32_to_int32( float32 a STATUS_PARAM) +int_fast32_t float32_to_int32( float32 a STATUS_PARAM) { return long_to_int32(lrintf(a)); } -int float32_to_int32_round_to_zero( float32 a STATUS_PARAM) +int_fast32_t float32_to_int32_round_to_zero( float32 a STATUS_PARAM) { - return (int)a; + return (int32_t)a; } int64_t float32_to_int64( float32 a STATUS_PARAM) { @@ -173,10 +173,10 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM) } #endif -unsigned int float32_to_uint32( float32 a STATUS_PARAM) +uint_fast32_t float32_to_uint32( float32 a STATUS_PARAM) { int64_t v; - unsigned int res; + uint_fast32_t res; v = llrintf(a); if (v < 0) { @@ -188,10 +188,10 @@ unsigned int float32_to_uint32( float32 a STATUS_PARAM) } return res; } -unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM) +uint_fast32_t float32_to_uint32_round_to_zero( float32 a STATUS_PARAM) { int64_t v; - unsigned int res; + uint_fast32_t res; v = (int64_t)a; if (v < 0) { @@ -266,13 +266,13 @@ int float32_is_quiet_nan( float32 a1 ) /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ -int float64_to_int32( float64 a STATUS_PARAM) +int_fast32_t float64_to_int32( float64 a STATUS_PARAM) { return long_to_int32(lrint(a)); } -int float64_to_int32_round_to_zero( float64 a STATUS_PARAM) +int_fast32_t float64_to_int32_round_to_zero( float64 a STATUS_PARAM) { - return (int)a; + return (int32_t)a; } int64_t float64_to_int64( float64 a STATUS_PARAM) { @@ -299,10 +299,10 @@ float128 float64_to_float128( float64 a STATUS_PARAM) } #endif -unsigned int float64_to_uint32( float64 a STATUS_PARAM) +uint_fast32_t float64_to_uint32( float64 a STATUS_PARAM) { int64_t v; - unsigned int res; + uint_fast32_t res; v = llrint(a); if (v < 0) { @@ -314,10 +314,10 @@ unsigned int float64_to_uint32( float64 a STATUS_PARAM) } return res; } -unsigned int float64_to_uint32_round_to_zero( float64 a STATUS_PARAM) +uint_fast32_t float64_to_uint32_round_to_zero( float64 a STATUS_PARAM) { int64_t v; - unsigned int res; + uint_fast32_t res; v = (int64_t)a; if (v < 0) { @@ -427,11 +427,11 @@ int float64_is_quiet_nan( float64 a1 ) /*---------------------------------------------------------------------------- | Software IEC/IEEE extended double-precision conversion routines. *----------------------------------------------------------------------------*/ -int floatx80_to_int32( floatx80 a STATUS_PARAM) +int_fast32_t floatx80_to_int32( floatx80 a STATUS_PARAM) { return long_to_int32(lrintl(a)); } -int floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM) +int_fast32_t floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM) { return (int)a; } diff --git a/fpu/softfloat-native.h b/fpu/softfloat-native.h index 80b5f28..6cf5dc3 100644 --- a/fpu/softfloat-native.h +++ b/fpu/softfloat-native.h @@ -150,15 +150,15 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM); /*---------------------------------------------------------------------------- | Software IEC/IEEE integer-to-floating-point conversion routines. *----------------------------------------------------------------------------*/ -float32 int32_to_float32( int STATUS_PARAM); -float32 uint32_to_float32( unsigned int STATUS_PARAM); -float64 int32_to_float64( int STATUS_PARAM); -float64 uint32_to_float64( unsigned int STATUS_PARAM); +float32 int32_to_float32( int_fast32_t STATUS_PARAM); +float32 uint32_to_float32( uint_fast32_t STATUS_PARAM); +float64 int32_to_float64( int_fast32_t STATUS_PARAM); +float64 uint32_to_float64( uint_fast32_t STATUS_PARAM); #ifdef FLOATX80 -floatx80 int32_to_floatx80( int STATUS_PARAM); +floatx80 int32_to_floatx80( int_fast32_t STATUS_PARAM); #endif #ifdef FLOAT128 -float128 int32_to_float128( int STATUS_PARAM); +float128 int32_to_float128( int_fast32_t STATUS_PARAM); #endif float32 int64_to_float32( int64_t STATUS_PARAM); float32 uint64_to_float32( uint64_t STATUS_PARAM); @@ -174,10 +174,10 @@ float128 int64_to_float128( int64_t STATUS_PARAM); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. *----------------------------------------------------------------------------*/ -int float32_to_int32( float32 STATUS_PARAM); -int float32_to_int32_round_to_zero( float32 STATUS_PARAM); -unsigned int float32_to_uint32( float32 a STATUS_PARAM); -unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM); +int_fast32_t float32_to_int32( float32 STATUS_PARAM); +int_fast32_t float32_to_int32_round_to_zero( float32 STATUS_PARAM); +uint_fast32_t float32_to_uint32( float32 a STATUS_PARAM); +uint_fast32_t float32_to_uint32_round_to_zero( float32 a STATUS_PARAM); int64_t float32_to_int64( float32 STATUS_PARAM); int64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM); float64 float32_to_float64( float32 STATUS_PARAM); @@ -279,10 +279,10 @@ INLINE float32 float32_scalbn(float32 a, int n) /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. *----------------------------------------------------------------------------*/ -int float64_to_int32( float64 STATUS_PARAM ); -int float64_to_int32_round_to_zero( float64 STATUS_PARAM ); -unsigned int float64_to_uint32( float64 STATUS_PARAM ); -unsigned int float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); +int_fast32_t float64_to_int32( float64 STATUS_PARAM ); +int_fast32_t float64_to_int32_round_to_zero( float64 STATUS_PARAM ); +uint_fast32_t float64_to_uint32( float64 STATUS_PARAM ); +uint_fast32_t float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); int64_t float64_to_int64( float64 STATUS_PARAM ); int64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); uint64_t float64_to_uint64( float64 STATUS_PARAM ); @@ -390,8 +390,8 @@ INLINE float64 float64_scalbn(float64 a, int n) /*---------------------------------------------------------------------------- | Software IEC/IEEE extended double-precision conversion routines. *----------------------------------------------------------------------------*/ -int floatx80_to_int32( floatx80 STATUS_PARAM ); -int floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); +int_fast32_t floatx80_to_int32( floatx80 STATUS_PARAM ); +int_fast32_t floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); int64_t floatx80_to_int64( floatx80 STATUS_PARAM); int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM); float32 floatx80_to_float32( floatx80 STATUS_PARAM ); diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 7f0f603..d1e3a42 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -5819,20 +5819,20 @@ int float128_lt_quiet( float128 a, float128 b STATUS_PARAM ) #endif /* misc functions */ -float32 uint32_to_float32( unsigned int a STATUS_PARAM ) +float32 uint32_to_float32( uint_fast32_t a STATUS_PARAM ) { return int64_to_float32(a STATUS_VAR); } -float64 uint32_to_float64( unsigned int a STATUS_PARAM ) +float64 uint32_to_float64( uint_fast32_t a STATUS_PARAM ) { return int64_to_float64(a STATUS_VAR); } -unsigned int float32_to_uint32( float32 a STATUS_PARAM ) +uint_fast32_t float32_to_uint32( float32 a STATUS_PARAM ) { int64_t v; - unsigned int res; + uint_fast32_t res; v = float32_to_int64(a STATUS_VAR); if (v < 0) { @@ -5847,10 +5847,10 @@ unsigned int float32_to_uint32( float32 a STATUS_PARAM ) return res; } -unsigned int float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) +uint_fast32_t float32_to_uint32_round_to_zero( float32 a STATUS_PARAM ) { int64_t v; - unsigned int res; + uint_fast32_t res; v = float32_to_int64_round_to_zero(a STATUS_VAR); if (v < 0) { diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 4c64d77..ce65530 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -234,8 +234,8 @@ void float_raise( int_fast8_t flags STATUS_PARAM); *----------------------------------------------------------------------------*/ float32 int32_to_float32( int_fast32_t STATUS_PARAM ); float64 int32_to_float64( int_fast32_t STATUS_PARAM ); -float32 uint32_to_float32( unsigned int STATUS_PARAM ); -float64 uint32_to_float64( unsigned int STATUS_PARAM ); +float32 uint32_to_float32( uint_fast32_t STATUS_PARAM ); +float64 uint32_to_float64( uint_fast32_t STATUS_PARAM ); #ifdef FLOATX80 floatx80 int32_to_floatx80( int_fast32_t STATUS_PARAM ); #endif -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v5 09/10] softfloat: Drop [u]int64 types in favor of [u]int_fast64_t 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 08/10] softfloat: Use [u]int_fast32_t consistently Andreas Färber @ 2011-03-07 0:34 ` Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-03-07 0:34 UTC (permalink / raw) To: qemu-devel; +Cc: Peter Maydell, Andreas Färber v5: * Initial. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat.c | 48 ++++++++++++++++++++++++------------------------ fpu/softfloat.h | 34 ++++++++++++++++------------------ 2 files changed, 40 insertions(+), 42 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index d1e3a42..6b2cbd7 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -159,11 +159,11 @@ static int_fast32_t roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) | returned. *----------------------------------------------------------------------------*/ -static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM) +static int_fast64_t roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM) { int_fast8_t roundingMode; flag roundNearestEven, increment; - int64 z; + int_fast64_t z; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -660,7 +660,7 @@ static floatx80 { int_fast8_t roundingMode; flag roundNearestEven, increment, isTiny; - int64 roundIncrement, roundMask, roundBits; + int_fast64_t roundIncrement, roundMask, roundBits; roundingMode = STATUS(float_rounding_mode); roundNearestEven = ( roundingMode == float_round_nearest_even ); @@ -1206,10 +1206,10 @@ float128 int32_to_float128( int_fast32_t a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float32 int64_to_float32( int64 a STATUS_PARAM ) +float32 int64_to_float32( int_fast64_t a STATUS_PARAM ) { flag zSign; - uint64 absA; + uint_fast64_t absA; int_fast8_t shiftCount; if ( a == 0 ) return float32_zero; @@ -1232,7 +1232,7 @@ float32 int64_to_float32( int64 a STATUS_PARAM ) } -float32 uint64_to_float32( uint64 a STATUS_PARAM ) +float32 uint64_to_float32( uint_fast64_t a STATUS_PARAM ) { int_fast8_t shiftCount; @@ -1259,7 +1259,7 @@ float32 uint64_to_float32( uint64 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float64 int64_to_float64( int64 a STATUS_PARAM ) +float64 int64_to_float64( int_fast64_t a STATUS_PARAM ) { flag zSign; @@ -1272,7 +1272,7 @@ float64 int64_to_float64( int64 a STATUS_PARAM ) } -float64 uint64_to_float64( uint64 a STATUS_PARAM ) +float64 uint64_to_float64( uint_fast64_t a STATUS_PARAM ) { if ( a == 0 ) return float64_zero; return normalizeRoundAndPackFloat64( 0, 0x43C, a STATUS_VAR ); @@ -1288,10 +1288,10 @@ float64 uint64_to_float64( uint64 a STATUS_PARAM ) | Arithmetic. *----------------------------------------------------------------------------*/ -floatx80 int64_to_floatx80( int64 a STATUS_PARAM ) +floatx80 int64_to_floatx80( int_fast64_t a STATUS_PARAM ) { flag zSign; - uint64 absA; + uint_fast64_t absA; int_fast8_t shiftCount; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); @@ -1312,10 +1312,10 @@ floatx80 int64_to_floatx80( int64 a STATUS_PARAM ) | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. *----------------------------------------------------------------------------*/ -float128 int64_to_float128( int64 a STATUS_PARAM ) +float128 int64_to_float128( int_fast64_t a STATUS_PARAM ) { flag zSign; - uint64 absA; + uint_fast64_t absA; int_fast8_t shiftCount; int_fast32_t zExp; uint64_t zSig0, zSig1; @@ -1474,7 +1474,7 @@ int_fast16_t float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 float32_to_int64( float32 a STATUS_PARAM ) +int_fast64_t float32_to_int64( float32 a STATUS_PARAM ) { flag aSign; int_fast16_t aExp, shiftCount; @@ -1511,13 +1511,13 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) +int_fast64_t float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) { flag aSign; int_fast16_t aExp, shiftCount; uint32_t aSig; uint64_t aSig64; - int64 z; + int_fast64_t z; a = float32_squash_input_denormal(a STATUS_VAR); aSig = extractFloat32Frac( a ); @@ -2616,7 +2616,7 @@ int_fast16_t float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 float64_to_int64( float64 a STATUS_PARAM ) +int_fast64_t float64_to_int64( float64 a STATUS_PARAM ) { flag aSign; int_fast16_t aExp, shiftCount; @@ -2659,12 +2659,12 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) +int_fast64_t float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) { flag aSign; int_fast16_t aExp, shiftCount; uint64_t aSig; - int64 z; + int_fast64_t z; a = float64_squash_input_denormal(a STATUS_VAR); aSig = extractFloat64Frac( a ); @@ -3788,7 +3788,7 @@ int_fast32_t floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) | overflows, the largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) +int_fast64_t floatx80_to_int64( floatx80 a STATUS_PARAM ) { flag aSign; int_fast32_t aExp, shiftCount; @@ -3828,12 +3828,12 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) | sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) +int_fast64_t floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) { flag aSign; int_fast32_t aExp, shiftCount; uint64_t aSig; - int64 z; + int_fast64_t z; aSig = extractFloatx80Frac( a ); aExp = extractFloatx80Exp( a ); @@ -4786,7 +4786,7 @@ int_fast32_t float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) | largest integer with the same sign as `a' is returned. *----------------------------------------------------------------------------*/ -int64 float128_to_int64( float128 a STATUS_PARAM ) +int_fast64_t float128_to_int64( float128 a STATUS_PARAM ) { flag aSign; int_fast32_t aExp, shiftCount; @@ -4829,12 +4829,12 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) | returned. *----------------------------------------------------------------------------*/ -int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) +int_fast64_t float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) { flag aSign; int_fast32_t aExp, shiftCount; uint64_t aSig0, aSig1; - int64 z; + int_fast64_t z; aSig1 = extractFloat128Frac1( a ); aSig0 = extractFloat128Frac0( a ); diff --git a/fpu/softfloat.h b/fpu/softfloat.h index ce65530..f638a4d 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -54,8 +54,6 @@ these four paragraphs for those parts of this code that are retained. | to the same as `int'. *----------------------------------------------------------------------------*/ typedef uint8_t flag; -typedef uint64_t uint64; -typedef int64_t int64; #define LIT64( a ) a##LL #define INLINE static inline @@ -242,15 +240,15 @@ floatx80 int32_to_floatx80( int_fast32_t STATUS_PARAM ); #ifdef FLOAT128 float128 int32_to_float128( int_fast32_t STATUS_PARAM ); #endif -float32 int64_to_float32( int64 STATUS_PARAM ); -float32 uint64_to_float32( uint64 STATUS_PARAM ); -float64 int64_to_float64( int64 STATUS_PARAM ); -float64 uint64_to_float64( uint64 STATUS_PARAM ); +float32 int64_to_float32( int_fast64_t STATUS_PARAM ); +float32 uint64_to_float32( uint_fast64_t STATUS_PARAM ); +float64 int64_to_float64( int_fast64_t STATUS_PARAM ); +float64 uint64_to_float64( uint_fast64_t STATUS_PARAM ); #ifdef FLOATX80 -floatx80 int64_to_floatx80( int64 STATUS_PARAM ); +floatx80 int64_to_floatx80( int_fast64_t STATUS_PARAM ); #endif #ifdef FLOAT128 -float128 int64_to_float128( int64 STATUS_PARAM ); +float128 int64_to_float128( int_fast64_t STATUS_PARAM ); #endif /*---------------------------------------------------------------------------- @@ -286,8 +284,8 @@ int_fast32_t float32_to_int32( float32 STATUS_PARAM ); int_fast32_t float32_to_int32_round_to_zero( float32 STATUS_PARAM ); uint_fast32_t float32_to_uint32( float32 STATUS_PARAM ); uint_fast32_t float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); -int64 float32_to_int64( float32 STATUS_PARAM ); -int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM ); +int_fast64_t float32_to_int64( float32 STATUS_PARAM ); +int_fast64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM ); float64 float32_to_float64( float32 STATUS_PARAM ); #ifdef FLOATX80 floatx80 float32_to_floatx80( float32 STATUS_PARAM ); @@ -396,10 +394,10 @@ int_fast32_t float64_to_int32( float64 STATUS_PARAM ); int_fast32_t float64_to_int32_round_to_zero( float64 STATUS_PARAM ); uint_fast32_t float64_to_uint32( float64 STATUS_PARAM ); uint_fast32_t float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); -int64 float64_to_int64( float64 STATUS_PARAM ); -int64 float64_to_int64_round_to_zero( float64 STATUS_PARAM ); -uint64 float64_to_uint64 (float64 a STATUS_PARAM); -uint64 float64_to_uint64_round_to_zero (float64 a STATUS_PARAM); +int_fast64_t float64_to_int64( float64 STATUS_PARAM ); +int_fast64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); +uint_fast64_t float64_to_uint64 (float64 a STATUS_PARAM); +uint_fast64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM); float32 float64_to_float32( float64 STATUS_PARAM ); #ifdef FLOATX80 floatx80 float64_to_floatx80( float64 STATUS_PARAM ); @@ -501,8 +499,8 @@ INLINE float64 float64_set_sign(float64 a, int sign) *----------------------------------------------------------------------------*/ int_fast32_t floatx80_to_int32( floatx80 STATUS_PARAM ); int_fast32_t floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); -int64 floatx80_to_int64( floatx80 STATUS_PARAM ); -int64 floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); +int_fast64_t floatx80_to_int64( floatx80 STATUS_PARAM ); +int_fast64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); float32 floatx80_to_float32( floatx80 STATUS_PARAM ); float64 floatx80_to_float64( floatx80 STATUS_PARAM ); #ifdef FLOAT128 @@ -584,8 +582,8 @@ INLINE int floatx80_is_any_nan(floatx80 a) *----------------------------------------------------------------------------*/ int_fast32_t float128_to_int32( float128 STATUS_PARAM ); int_fast32_t float128_to_int32_round_to_zero( float128 STATUS_PARAM ); -int64 float128_to_int64( float128 STATUS_PARAM ); -int64 float128_to_int64_round_to_zero( float128 STATUS_PARAM ); +int_fast64_t float128_to_int64( float128 STATUS_PARAM ); +int_fast64_t float128_to_int64_round_to_zero( float128 STATUS_PARAM ); float32 float128_to_float32( float128 STATUS_PARAM ); float64 float128_to_float64( float128 STATUS_PARAM ); #ifdef FLOATX80 -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 09/10] softfloat: Drop [u]int64 types in favor of [u]int_fast64_t Andreas Färber @ 2011-03-07 0:34 ` Andreas Färber 2011-03-07 9:56 ` Aurelien Jarno 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-03-07 0:34 UTC (permalink / raw) To: qemu-devel; +Cc: Andreas Färber v5: * Initial. Signed-off-by: Andreas Färber <andreas.faerber@web.de> --- fpu/softfloat-native.c | 26 +++++++++++++------------- fpu/softfloat-native.h | 28 ++++++++++++++-------------- fpu/softfloat.c | 4 ++-- 3 files changed, 29 insertions(+), 29 deletions(-) diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c index 2c08958..3aa64f6 100644 --- a/fpu/softfloat-native.c +++ b/fpu/softfloat-native.c @@ -103,24 +103,24 @@ floatx80 int32_to_floatx80(int_fast32_t v STATUS_PARAM) return (floatx80)v; } #endif -float32 int64_to_float32( int64_t v STATUS_PARAM) +float32 int64_to_float32( int_fast64_t v STATUS_PARAM) { return (float32)v; } -float32 uint64_to_float32( uint64_t v STATUS_PARAM) +float32 uint64_to_float32( uint_fast64_t v STATUS_PARAM) { return (float32)v; } -float64 int64_to_float64( int64_t v STATUS_PARAM) +float64 int64_to_float64( int_fast64_t v STATUS_PARAM) { return (float64)v; } -float64 uint64_to_float64( uint64_t v STATUS_PARAM) +float64 uint64_to_float64( uint_fast64_t v STATUS_PARAM) { return (float64)v; } #ifdef FLOATX80 -floatx80 int64_to_floatx80( int64_t v STATUS_PARAM) +floatx80 int64_to_floatx80( int_fast64_t v STATUS_PARAM) { return (floatx80)v; } @@ -152,12 +152,12 @@ int_fast32_t float32_to_int32_round_to_zero( float32 a STATUS_PARAM) { return (int32_t)a; } -int64_t float32_to_int64( float32 a STATUS_PARAM) +int_fast64_t float32_to_int64( float32 a STATUS_PARAM) { return llrintf(a); } -int64_t float32_to_int64_round_to_zero( float32 a STATUS_PARAM) +int_fast64_t float32_to_int64_round_to_zero( float32 a STATUS_PARAM) { return (int64_t)a; } @@ -274,11 +274,11 @@ int_fast32_t float64_to_int32_round_to_zero( float64 a STATUS_PARAM) { return (int32_t)a; } -int64_t float64_to_int64( float64 a STATUS_PARAM) +int_fast64_t float64_to_int64( float64 a STATUS_PARAM) { return llrint(a); } -int64_t float64_to_int64_round_to_zero( float64 a STATUS_PARAM) +int_fast64_t float64_to_int64_round_to_zero( float64 a STATUS_PARAM) { return (int64_t)a; } @@ -329,7 +329,7 @@ uint_fast32_t float64_to_uint32_round_to_zero( float64 a STATUS_PARAM) } return res; } -uint64_t float64_to_uint64 (float64 a STATUS_PARAM) +uint_fast64_t float64_to_uint64 (float64 a STATUS_PARAM) { int64_t v; @@ -337,7 +337,7 @@ uint64_t float64_to_uint64 (float64 a STATUS_PARAM) return v - INT64_MIN; } -uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM) +uint_fast64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM) { int64_t v; @@ -435,11 +435,11 @@ int_fast32_t floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM) { return (int)a; } -int64_t floatx80_to_int64( floatx80 a STATUS_PARAM) +int_fast64_t floatx80_to_int64( floatx80 a STATUS_PARAM) { return llrintl(a); } -int64_t floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM) +int_fast64_t floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM) { return (int64_t)a; } diff --git a/fpu/softfloat-native.h b/fpu/softfloat-native.h index 6cf5dc3..b198f48 100644 --- a/fpu/softfloat-native.h +++ b/fpu/softfloat-native.h @@ -160,15 +160,15 @@ floatx80 int32_to_floatx80( int_fast32_t STATUS_PARAM); #ifdef FLOAT128 float128 int32_to_float128( int_fast32_t STATUS_PARAM); #endif -float32 int64_to_float32( int64_t STATUS_PARAM); -float32 uint64_to_float32( uint64_t STATUS_PARAM); -float64 int64_to_float64( int64_t STATUS_PARAM); -float64 uint64_to_float64( uint64_t v STATUS_PARAM); +float32 int64_to_float32( int_fast64_t STATUS_PARAM); +float32 uint64_to_float32( uint_fast64_t STATUS_PARAM); +float64 int64_to_float64( int_fast64_t STATUS_PARAM); +float64 uint64_to_float64( uint_fast64_t v STATUS_PARAM); #ifdef FLOATX80 -floatx80 int64_to_floatx80( int64_t STATUS_PARAM); +floatx80 int64_to_floatx80( int_fast64_t STATUS_PARAM); #endif #ifdef FLOAT128 -float128 int64_to_float128( int64_t STATUS_PARAM); +float128 int64_to_float128( int_fast64_t STATUS_PARAM); #endif /*---------------------------------------------------------------------------- @@ -178,8 +178,8 @@ int_fast32_t float32_to_int32( float32 STATUS_PARAM); int_fast32_t float32_to_int32_round_to_zero( float32 STATUS_PARAM); uint_fast32_t float32_to_uint32( float32 a STATUS_PARAM); uint_fast32_t float32_to_uint32_round_to_zero( float32 a STATUS_PARAM); -int64_t float32_to_int64( float32 STATUS_PARAM); -int64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM); +int_fast64_t float32_to_int64( float32 STATUS_PARAM); +int_fast64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM); float64 float32_to_float64( float32 STATUS_PARAM); #ifdef FLOATX80 floatx80 float32_to_floatx80( float32 STATUS_PARAM); @@ -283,10 +283,10 @@ int_fast32_t float64_to_int32( float64 STATUS_PARAM ); int_fast32_t float64_to_int32_round_to_zero( float64 STATUS_PARAM ); uint_fast32_t float64_to_uint32( float64 STATUS_PARAM ); uint_fast32_t float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); -int64_t float64_to_int64( float64 STATUS_PARAM ); -int64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); -uint64_t float64_to_uint64( float64 STATUS_PARAM ); -uint64_t float64_to_uint64_round_to_zero( float64 STATUS_PARAM ); +int_fast64_t float64_to_int64( float64 STATUS_PARAM ); +int_fast64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); +uint_fast64_t float64_to_uint64( float64 STATUS_PARAM ); +uint_fast64_t float64_to_uint64_round_to_zero( float64 STATUS_PARAM ); float32 float64_to_float32( float64 STATUS_PARAM ); #ifdef FLOATX80 floatx80 float64_to_floatx80( float64 STATUS_PARAM ); @@ -392,8 +392,8 @@ INLINE float64 float64_scalbn(float64 a, int n) *----------------------------------------------------------------------------*/ int_fast32_t floatx80_to_int32( floatx80 STATUS_PARAM ); int_fast32_t floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); -int64_t floatx80_to_int64( floatx80 STATUS_PARAM); -int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM); +int64_fast_t floatx80_to_int64( floatx80 STATUS_PARAM); +int64_fast_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM); float32 floatx80_to_float32( floatx80 STATUS_PARAM ); float64 floatx80_to_float64( floatx80 STATUS_PARAM ); #ifdef FLOAT128 diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 6b2cbd7..1a1281d 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -5938,7 +5938,7 @@ uint_fast16_t float64_to_uint16_round_to_zero( float64 a STATUS_PARAM ) } /* FIXME: This looks broken. */ -uint64_t float64_to_uint64 (float64 a STATUS_PARAM) +uint_fast64_t float64_to_uint64 (float64 a STATUS_PARAM) { int64_t v; @@ -5949,7 +5949,7 @@ uint64_t float64_to_uint64 (float64 a STATUS_PARAM) return v - INT64_MIN; } -uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM) +uint_fast64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM) { int64_t v; -- 1.7.3.4 ^ permalink raw reply related [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently Andreas Färber @ 2011-03-07 9:56 ` Aurelien Jarno 2011-03-07 23:10 ` Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Aurelien Jarno @ 2011-03-07 9:56 UTC (permalink / raw) To: Andreas Färber; +Cc: qemu-devel On Mon, Mar 07, 2011 at 01:34:13AM +0100, Andreas Färber wrote: > v5: > * Initial. > > Signed-off-by: Andreas Färber <andreas.faerber@web.de> > --- > fpu/softfloat-native.c | 26 +++++++++++++------------- > fpu/softfloat-native.h | 28 ++++++++++++++-------------- > fpu/softfloat.c | 4 ++-- > 3 files changed, 29 insertions(+), 29 deletions(-) > > diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c > index 2c08958..3aa64f6 100644 > --- a/fpu/softfloat-native.c > +++ b/fpu/softfloat-native.c > @@ -103,24 +103,24 @@ floatx80 int32_to_floatx80(int_fast32_t v STATUS_PARAM) > return (floatx80)v; > } > #endif > -float32 int64_to_float32( int64_t v STATUS_PARAM) > +float32 int64_to_float32( int_fast64_t v STATUS_PARAM) > { > return (float32)v; > } > -float32 uint64_to_float32( uint64_t v STATUS_PARAM) > +float32 uint64_to_float32( uint_fast64_t v STATUS_PARAM) > { > return (float32)v; > } > -float64 int64_to_float64( int64_t v STATUS_PARAM) > +float64 int64_to_float64( int_fast64_t v STATUS_PARAM) > { > return (float64)v; > } > -float64 uint64_to_float64( uint64_t v STATUS_PARAM) > +float64 uint64_to_float64( uint_fast64_t v STATUS_PARAM) > { > return (float64)v; > } > #ifdef FLOATX80 > -floatx80 int64_to_floatx80( int64_t v STATUS_PARAM) > +floatx80 int64_to_floatx80( int_fast64_t v STATUS_PARAM) > { > return (floatx80)v; > } > @@ -152,12 +152,12 @@ int_fast32_t float32_to_int32_round_to_zero( float32 a STATUS_PARAM) > { > return (int32_t)a; > } > -int64_t float32_to_int64( float32 a STATUS_PARAM) > +int_fast64_t float32_to_int64( float32 a STATUS_PARAM) > { > return llrintf(a); > } > > -int64_t float32_to_int64_round_to_zero( float32 a STATUS_PARAM) > +int_fast64_t float32_to_int64_round_to_zero( float32 a STATUS_PARAM) > { > return (int64_t)a; > } > @@ -274,11 +274,11 @@ int_fast32_t float64_to_int32_round_to_zero( float64 a STATUS_PARAM) > { > return (int32_t)a; > } > -int64_t float64_to_int64( float64 a STATUS_PARAM) > +int_fast64_t float64_to_int64( float64 a STATUS_PARAM) > { > return llrint(a); > } > -int64_t float64_to_int64_round_to_zero( float64 a STATUS_PARAM) > +int_fast64_t float64_to_int64_round_to_zero( float64 a STATUS_PARAM) > { > return (int64_t)a; > } > @@ -329,7 +329,7 @@ uint_fast32_t float64_to_uint32_round_to_zero( float64 a STATUS_PARAM) > } > return res; > } > -uint64_t float64_to_uint64 (float64 a STATUS_PARAM) > +uint_fast64_t float64_to_uint64 (float64 a STATUS_PARAM) > { > int64_t v; > > @@ -337,7 +337,7 @@ uint64_t float64_to_uint64 (float64 a STATUS_PARAM) > > return v - INT64_MIN; > } > -uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM) > +uint_fast64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM) > { > int64_t v; > > @@ -435,11 +435,11 @@ int_fast32_t floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM) > { > return (int)a; > } > -int64_t floatx80_to_int64( floatx80 a STATUS_PARAM) > +int_fast64_t floatx80_to_int64( floatx80 a STATUS_PARAM) > { > return llrintl(a); > } > -int64_t floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM) > +int_fast64_t floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM) > { > return (int64_t)a; > } > diff --git a/fpu/softfloat-native.h b/fpu/softfloat-native.h > index 6cf5dc3..b198f48 100644 > --- a/fpu/softfloat-native.h > +++ b/fpu/softfloat-native.h > @@ -160,15 +160,15 @@ floatx80 int32_to_floatx80( int_fast32_t STATUS_PARAM); > #ifdef FLOAT128 > float128 int32_to_float128( int_fast32_t STATUS_PARAM); > #endif > -float32 int64_to_float32( int64_t STATUS_PARAM); > -float32 uint64_to_float32( uint64_t STATUS_PARAM); > -float64 int64_to_float64( int64_t STATUS_PARAM); > -float64 uint64_to_float64( uint64_t v STATUS_PARAM); > +float32 int64_to_float32( int_fast64_t STATUS_PARAM); > +float32 uint64_to_float32( uint_fast64_t STATUS_PARAM); > +float64 int64_to_float64( int_fast64_t STATUS_PARAM); > +float64 uint64_to_float64( uint_fast64_t v STATUS_PARAM); > #ifdef FLOATX80 > -floatx80 int64_to_floatx80( int64_t STATUS_PARAM); > +floatx80 int64_to_floatx80( int_fast64_t STATUS_PARAM); > #endif > #ifdef FLOAT128 > -float128 int64_to_float128( int64_t STATUS_PARAM); > +float128 int64_to_float128( int_fast64_t STATUS_PARAM); > #endif > > /*---------------------------------------------------------------------------- > @@ -178,8 +178,8 @@ int_fast32_t float32_to_int32( float32 STATUS_PARAM); > int_fast32_t float32_to_int32_round_to_zero( float32 STATUS_PARAM); > uint_fast32_t float32_to_uint32( float32 a STATUS_PARAM); > uint_fast32_t float32_to_uint32_round_to_zero( float32 a STATUS_PARAM); > -int64_t float32_to_int64( float32 STATUS_PARAM); > -int64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM); > +int_fast64_t float32_to_int64( float32 STATUS_PARAM); > +int_fast64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM); > float64 float32_to_float64( float32 STATUS_PARAM); > #ifdef FLOATX80 > floatx80 float32_to_floatx80( float32 STATUS_PARAM); > @@ -283,10 +283,10 @@ int_fast32_t float64_to_int32( float64 STATUS_PARAM ); > int_fast32_t float64_to_int32_round_to_zero( float64 STATUS_PARAM ); > uint_fast32_t float64_to_uint32( float64 STATUS_PARAM ); > uint_fast32_t float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); > -int64_t float64_to_int64( float64 STATUS_PARAM ); > -int64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); > -uint64_t float64_to_uint64( float64 STATUS_PARAM ); > -uint64_t float64_to_uint64_round_to_zero( float64 STATUS_PARAM ); > +int_fast64_t float64_to_int64( float64 STATUS_PARAM ); > +int_fast64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); > +uint_fast64_t float64_to_uint64( float64 STATUS_PARAM ); > +uint_fast64_t float64_to_uint64_round_to_zero( float64 STATUS_PARAM ); > float32 float64_to_float32( float64 STATUS_PARAM ); > #ifdef FLOATX80 > floatx80 float64_to_floatx80( float64 STATUS_PARAM ); > @@ -392,8 +392,8 @@ INLINE float64 float64_scalbn(float64 a, int n) > *----------------------------------------------------------------------------*/ > int_fast32_t floatx80_to_int32( floatx80 STATUS_PARAM ); > int_fast32_t floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); > -int64_t floatx80_to_int64( floatx80 STATUS_PARAM); > -int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM); > +int64_fast_t floatx80_to_int64( floatx80 STATUS_PARAM); > +int64_fast_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM); This type doesn't exist, so the code doesn't even compile... -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently 2011-03-07 9:56 ` Aurelien Jarno @ 2011-03-07 23:10 ` Andreas Färber 2011-03-08 6:04 ` Aurelien Jarno 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-03-07 23:10 UTC (permalink / raw) To: Aurelien Jarno; +Cc: qemu-devel Am 07.03.2011 um 10:56 schrieb Aurelien Jarno: > On Mon, Mar 07, 2011 at 01:34:13AM +0100, Andreas Färber wrote: >> v5: >> * Initial. >> >> Signed-off-by: Andreas Färber <andreas.faerber@web.de> >> --- >> fpu/softfloat-native.c | 26 +++++++++++++------------- >> fpu/softfloat-native.h | 28 ++++++++++++++-------------- >> fpu/softfloat.c | 4 ++-- >> 3 files changed, 29 insertions(+), 29 deletions(-) >> diff --git a/fpu/softfloat-native.h b/fpu/softfloat-native.h >> index 6cf5dc3..b198f48 100644 >> --- a/fpu/softfloat-native.h >> +++ b/fpu/softfloat-native.h >> @@ -392,8 +392,8 @@ INLINE float64 float64_scalbn(float64 a, int n) >> *----------------------------------------------------------------------------*/ >> int_fast32_t floatx80_to_int32( floatx80 STATUS_PARAM ); >> int_fast32_t floatx80_to_int32_round_to_zero( floatx80 >> STATUS_PARAM ); >> -int64_t floatx80_to_int64( floatx80 STATUS_PARAM); >> -int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM); >> +int64_fast_t floatx80_to_int64( floatx80 STATUS_PARAM); >> +int64_fast_t floatx80_to_int64_round_to_zero( floatx80 >> STATUS_PARAM); > > This type doesn't exist, so the code doesn't even compile... I did compile-tested these, so apparently my host or targets do not use softfloat-native... It was late so I can't rule out other mistakes there. Would you prefer to treat softfloat-native as a separate API and not touch it in this series? Andreas ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently 2011-03-07 23:10 ` Andreas Färber @ 2011-03-08 6:04 ` Aurelien Jarno 0 siblings, 0 replies; 55+ messages in thread From: Aurelien Jarno @ 2011-03-08 6:04 UTC (permalink / raw) To: Andreas Färber; +Cc: qemu-devel On Tue, Mar 08, 2011 at 12:10:50AM +0100, Andreas Färber wrote: > Am 07.03.2011 um 10:56 schrieb Aurelien Jarno: > > >On Mon, Mar 07, 2011 at 01:34:13AM +0100, Andreas Färber wrote: > >>v5: > >>* Initial. > >> > >>Signed-off-by: Andreas Färber <andreas.faerber@web.de> > >>--- > >>fpu/softfloat-native.c | 26 +++++++++++++------------- > >>fpu/softfloat-native.h | 28 ++++++++++++++-------------- > >>fpu/softfloat.c | 4 ++-- > >>3 files changed, 29 insertions(+), 29 deletions(-) > > >>diff --git a/fpu/softfloat-native.h b/fpu/softfloat-native.h > >>index 6cf5dc3..b198f48 100644 > >>--- a/fpu/softfloat-native.h > >>+++ b/fpu/softfloat-native.h > > >>@@ -392,8 +392,8 @@ INLINE float64 float64_scalbn(float64 a, int n) > >>*----------------------------------------------------------------------------*/ > >>int_fast32_t floatx80_to_int32( floatx80 STATUS_PARAM ); > >>int_fast32_t floatx80_to_int32_round_to_zero( floatx80 > >>STATUS_PARAM ); > >>-int64_t floatx80_to_int64( floatx80 STATUS_PARAM); > >>-int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM); > >>+int64_fast_t floatx80_to_int64( floatx80 STATUS_PARAM); > >>+int64_fast_t floatx80_to_int64_round_to_zero( floatx80 > >>STATUS_PARAM); > > > >This type doesn't exist, so the code doesn't even compile... > > I did compile-tested these, so apparently my host or targets do not > use softfloat-native... It was late so I can't rule out other > mistakes there. softfloat-native is used on i386 and x86_64 targets, which are enabled by default when running ./configure. > Would you prefer to treat softfloat-native as a separate API and not > touch it in this series? > In my opinion, if we do such change, we should do them in both softfloat and softfloat-native. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 08/10] softfloat: Use [u]int_fast32_t consistently Andreas Färber @ 2011-03-07 9:56 ` Aurelien Jarno 2011-03-07 23:16 ` Andreas Färber 1 sibling, 1 reply; 55+ messages in thread From: Aurelien Jarno @ 2011-03-07 9:56 UTC (permalink / raw) To: Andreas Färber; +Cc: Peter Maydell, qemu-devel On Mon, Mar 07, 2011 at 01:34:10AM +0100, Andreas Färber wrote: > v5: > * Initial. > > Cc: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Andreas Färber <andreas.faerber@web.de> > --- > fpu/softfloat.c | 132 +++++++++++++++++++++++++++--------------------------- > fpu/softfloat.h | 34 +++++++-------- > 2 files changed, 82 insertions(+), 84 deletions(-) > > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index e6ecf6c..7f0f603 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -109,12 +109,12 @@ INLINE flag extractFloat16Sign(float16 a) > | positive or negative integer is returned. > *----------------------------------------------------------------------------*/ > > -static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) > +static int_fast32_t roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) > { > int_fast8_t roundingMode; > flag roundNearestEven; > int_fast8_t roundIncrement, roundBits; > - int32 z; > + int_fast32_t z; > > roundingMode = STATUS(float_rounding_mode); > roundNearestEven = ( roundingMode == float_round_nearest_even ); > @@ -577,7 +577,7 @@ INLINE uint64_t extractFloatx80Frac( floatx80 a ) > | value `a'. > *----------------------------------------------------------------------------*/ > > -INLINE int32 extractFloatx80Exp( floatx80 a ) > +INLINE int_fast32_t extractFloatx80Exp( floatx80 a ) > { > > return a.high & 0x7FFF; > @@ -604,7 +604,7 @@ INLINE flag extractFloatx80Sign( floatx80 a ) > *----------------------------------------------------------------------------*/ > > static void > - normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr ) > + normalizeFloatx80Subnormal( uint64_t aSig, int_fast32_t *zExpPtr, uint64_t *zSigPtr ) > { > int_fast8_t shiftCount; > > @@ -619,7 +619,7 @@ static void > | extended double-precision floating-point value, returning the result. > *----------------------------------------------------------------------------*/ > > -INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig ) > +INLINE floatx80 packFloatx80( flag zSign, int_fast32_t zExp, uint64_t zSig ) > { > floatx80 z; > > @@ -655,7 +655,7 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig ) > > static floatx80 > roundAndPackFloatx80( > - int_fast8_t roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 > + int_fast8_t roundingPrecision, flag zSign, int_fast32_t zExp, uint64_t zSig0, uint64_t zSig1 > STATUS_PARAM) > { > int_fast8_t roundingMode; > @@ -824,7 +824,7 @@ static floatx80 > > static floatx80 > normalizeRoundAndPackFloatx80( > - int_fast8_t roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 > + int_fast8_t roundingPrecision, flag zSign, int_fast32_t zExp, uint64_t zSig0, uint64_t zSig1 > STATUS_PARAM) > { > int_fast8_t shiftCount; > @@ -875,7 +875,7 @@ INLINE uint64_t extractFloat128Frac0( float128 a ) > | `a'. > *----------------------------------------------------------------------------*/ > > -INLINE int32 extractFloat128Exp( float128 a ) > +INLINE int_fast32_t extractFloat128Exp( float128 a ) > { > > return ( a.high>>48 ) & 0x7FFF; > @@ -907,7 +907,7 @@ static void > normalizeFloat128Subnormal( > uint64_t aSig0, > uint64_t aSig1, > - int32 *zExpPtr, > + int_fast32_t *zExpPtr, > uint64_t *zSig0Ptr, > uint64_t *zSig1Ptr > ) > @@ -948,7 +948,7 @@ static void > *----------------------------------------------------------------------------*/ > > INLINE float128 > - packFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 ) > + packFloat128( flag zSign, int_fast32_t zExp, uint64_t zSig0, uint64_t zSig1 ) > { > float128 z; > > @@ -981,7 +981,7 @@ INLINE float128 > > static float128 > roundAndPackFloat128( > - flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM) > + flag zSign, int_fast32_t zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM) > { > int_fast8_t roundingMode; > flag roundNearestEven, increment, isTiny; > @@ -1082,7 +1082,7 @@ static float128 > > static float128 > normalizeRoundAndPackFloat128( > - flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) > + flag zSign, int_fast32_t zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) > { > int_fast8_t shiftCount; > uint64_t zSig2; > @@ -1114,7 +1114,7 @@ static float128 > | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. > *----------------------------------------------------------------------------*/ > > -float32 int32_to_float32( int32 a STATUS_PARAM ) > +float32 int32_to_float32( int_fast32_t a STATUS_PARAM ) > { > flag zSign; > > @@ -1131,10 +1131,10 @@ float32 int32_to_float32( int32 a STATUS_PARAM ) > | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. > *----------------------------------------------------------------------------*/ > > -float64 int32_to_float64( int32 a STATUS_PARAM ) > +float64 int32_to_float64( int_fast32_t a STATUS_PARAM ) > { > flag zSign; > - uint32 absA; > + uint_fast32_t absA; > int_fast8_t shiftCount; > uint64_t zSig; > > @@ -1156,10 +1156,10 @@ float64 int32_to_float64( int32 a STATUS_PARAM ) > | Arithmetic. > *----------------------------------------------------------------------------*/ > > -floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) > +floatx80 int32_to_floatx80( int_fast32_t a STATUS_PARAM ) > { > flag zSign; > - uint32 absA; > + uint_fast32_t absA; > int_fast8_t shiftCount; > uint64_t zSig; > > @@ -1182,10 +1182,10 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) > | according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic. > *----------------------------------------------------------------------------*/ > > -float128 int32_to_float128( int32 a STATUS_PARAM ) > +float128 int32_to_float128( int_fast32_t a STATUS_PARAM ) > { > flag zSign; > - uint32 absA; > + uint_fast32_t absA; > int_fast8_t shiftCount; > uint64_t zSig0; > > @@ -1317,7 +1317,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) > flag zSign; > uint64 absA; > int_fast8_t shiftCount; > - int32 zExp; > + int_fast32_t zExp; > uint64_t zSig0, zSig1; > > if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); > @@ -1351,7 +1351,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) > | largest integer with the same sign as `a' is returned. > *----------------------------------------------------------------------------*/ > > -int32 float32_to_int32( float32 a STATUS_PARAM ) > +int_fast32_t float32_to_int32( float32 a STATUS_PARAM ) > { > flag aSign; > int_fast16_t aExp, shiftCount; > @@ -1382,12 +1382,12 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) > | returned. > *----------------------------------------------------------------------------*/ > > -int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) > +int_fast32_t float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) > { > flag aSign; > int_fast16_t aExp, shiftCount; > uint32_t aSig; > - int32 z; > + int_fast32_t z; > a = float32_squash_input_denormal(a STATUS_VAR); > > aSig = extractFloat32Frac( a ); > @@ -1430,7 +1430,7 @@ int_fast16_t float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) > flag aSign; > int_fast16_t aExp, shiftCount; > uint32_t aSig; > - int32 z; > + int_fast32_t z; > > aSig = extractFloat32Frac( a ); > aExp = extractFloat32Exp( a ); > @@ -2490,7 +2490,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) > | largest integer with the same sign as `a' is returned. > *----------------------------------------------------------------------------*/ > > -int32 float64_to_int32( float64 a STATUS_PARAM ) > +int_fast32_t float64_to_int32( float64 a STATUS_PARAM ) > { > flag aSign; > int_fast16_t aExp, shiftCount; > @@ -2518,12 +2518,12 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) > | returned. > *----------------------------------------------------------------------------*/ > > -int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) > +int_fast32_t float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) > { > flag aSign; > int_fast16_t aExp, shiftCount; > uint64_t aSig, savedASig; > - int32 z; > + int_fast32_t z; > a = float64_squash_input_denormal(a STATUS_VAR); > > aSig = extractFloat64Frac( a ); > @@ -2570,7 +2570,7 @@ int_fast16_t float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) > flag aSign; > int_fast16_t aExp, shiftCount; > uint64_t aSig, savedASig; > - int32 z; > + int_fast32_t z; > > aSig = extractFloat64Frac( a ); > aExp = extractFloat64Exp( a ); > @@ -3716,10 +3716,10 @@ int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) > | overflows, the largest integer with the same sign as `a' is returned. > *----------------------------------------------------------------------------*/ > > -int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) > +int_fast32_t floatx80_to_int32( floatx80 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp, shiftCount; > + int_fast32_t aExp, shiftCount; > uint64_t aSig; > > aSig = extractFloatx80Frac( a ); > @@ -3743,12 +3743,12 @@ int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) > | sign as `a' is returned. > *----------------------------------------------------------------------------*/ > > -int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) > +int_fast32_t floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp, shiftCount; > + int_fast32_t aExp, shiftCount; > uint64_t aSig, savedASig; > - int32 z; > + int_fast32_t z; > > aSig = extractFloatx80Frac( a ); > aExp = extractFloatx80Exp( a ); > @@ -3791,7 +3791,7 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) > int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp, shiftCount; > + int_fast32_t aExp, shiftCount; > uint64_t aSig, aSigExtra; > > aSig = extractFloatx80Frac( a ); > @@ -3831,7 +3831,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) > int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp, shiftCount; > + int_fast32_t aExp, shiftCount; > uint64_t aSig; > int64 z; > > @@ -3872,7 +3872,7 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) > float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp; > + int_fast32_t aExp; > uint64_t aSig; > > aSig = extractFloatx80Frac( a ); > @@ -3900,7 +3900,7 @@ float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) > float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp; > + int_fast32_t aExp; > uint64_t aSig, zSig; > > aSig = extractFloatx80Frac( a ); > @@ -3956,7 +3956,7 @@ float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) > floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp; > + int_fast32_t aExp; > uint64_t lastBitMask, roundBitsMask; > int_fast8_t roundingMode; > floatx80 z; > @@ -4029,9 +4029,9 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) > > static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM) > { > - int32 aExp, bExp, zExp; > + int_fast32_t aExp, bExp, zExp; > uint64_t aSig, bSig, zSig0, zSig1; > - int32 expDiff; > + int_fast32_t expDiff; > > aSig = extractFloatx80Frac( a ); > aExp = extractFloatx80Exp( a ); > @@ -4095,9 +4095,9 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM > > static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM ) > { > - int32 aExp, bExp, zExp; > + int_fast32_t aExp, bExp, zExp; > uint64_t aSig, bSig, zSig0, zSig1; > - int32 expDiff; > + int_fast32_t expDiff; > floatx80 z; > > aSig = extractFloatx80Frac( a ); > @@ -4204,7 +4204,7 @@ floatx80 floatx80_sub( floatx80 a, floatx80 b STATUS_PARAM ) > floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > - int32 aExp, bExp, zExp; > + int_fast32_t aExp, bExp, zExp; > uint64_t aSig, bSig, zSig0, zSig1; > floatx80 z; > > @@ -4263,7 +4263,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) > floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > - int32 aExp, bExp, zExp; > + int_fast32_t aExp, bExp, zExp; > uint64_t aSig, bSig, zSig0, zSig1; > uint64_t rem0, rem1, rem2, term0, term1, term2; > floatx80 z; > @@ -4343,7 +4343,7 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) > floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) > { > flag aSign, zSign; > - int32 aExp, bExp, expDiff; > + int_fast32_t aExp, bExp, expDiff; > uint64_t aSig0, aSig1, bSig; > uint64_t q, term0, term1, alternateASig0, alternateASig1; > floatx80 z; > @@ -4439,7 +4439,7 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) > floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp, zExp; > + int_fast32_t aExp, zExp; > uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0; > uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; > floatx80 z; > @@ -4709,10 +4709,10 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) > | largest integer with the same sign as `a' is returned. > *----------------------------------------------------------------------------*/ > > -int32 float128_to_int32( float128 a STATUS_PARAM ) > +int_fast32_t float128_to_int32( float128 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp, shiftCount; > + int_fast32_t aExp, shiftCount; > uint64_t aSig0, aSig1; > > aSig1 = extractFloat128Frac1( a ); > @@ -4738,12 +4738,12 @@ int32 float128_to_int32( float128 a STATUS_PARAM ) > | returned. > *----------------------------------------------------------------------------*/ > > -int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) > +int_fast32_t float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp, shiftCount; > + int_fast32_t aExp, shiftCount; > uint64_t aSig0, aSig1, savedASig; > - int32 z; > + int_fast32_t z; > > aSig1 = extractFloat128Frac1( a ); > aSig0 = extractFloat128Frac0( a ); > @@ -4789,7 +4789,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) > int64 float128_to_int64( float128 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp, shiftCount; > + int_fast32_t aExp, shiftCount; > uint64_t aSig0, aSig1; > > aSig1 = extractFloat128Frac1( a ); > @@ -4832,7 +4832,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) > int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp, shiftCount; > + int_fast32_t aExp, shiftCount; > uint64_t aSig0, aSig1; > int64 z; > > @@ -4890,7 +4890,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) > float32 float128_to_float32( float128 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp; > + int_fast32_t aExp; > uint64_t aSig0, aSig1; > uint32_t zSig; > > @@ -4925,7 +4925,7 @@ float32 float128_to_float32( float128 a STATUS_PARAM ) > float64 float128_to_float64( float128 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp; > + int_fast32_t aExp; > uint64_t aSig0, aSig1; > > aSig1 = extractFloat128Frac1( a ); > @@ -4960,7 +4960,7 @@ float64 float128_to_float64( float128 a STATUS_PARAM ) > floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp; > + int_fast32_t aExp; > uint64_t aSig0, aSig1; > > aSig1 = extractFloat128Frac1( a ); > @@ -4997,7 +4997,7 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) > float128 float128_round_to_int( float128 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp; > + int_fast32_t aExp; > uint64_t lastBitMask, roundBitsMask; > int_fast8_t roundingMode; > float128 z; > @@ -5100,9 +5100,9 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) > > static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) > { > - int32 aExp, bExp, zExp; > + int_fast32_t aExp, bExp, zExp; > uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; > - int32 expDiff; > + int_fast32_t expDiff; > > aSig1 = extractFloat128Frac1( a ); > aSig0 = extractFloat128Frac0( a ); > @@ -5181,9 +5181,9 @@ static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM > > static float128 subFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) > { > - int32 aExp, bExp, zExp; > + int_fast32_t aExp, bExp, zExp; > uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; > - int32 expDiff; > + int_fast32_t expDiff; > float128 z; > > aSig1 = extractFloat128Frac1( a ); > @@ -5306,7 +5306,7 @@ float128 float128_sub( float128 a, float128 b STATUS_PARAM ) > float128 float128_mul( float128 a, float128 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > - int32 aExp, bExp, zExp; > + int_fast32_t aExp, bExp, zExp; > uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; > float128 z; > > @@ -5370,7 +5370,7 @@ float128 float128_mul( float128 a, float128 b STATUS_PARAM ) > float128 float128_div( float128 a, float128 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > - int32 aExp, bExp, zExp; > + int_fast32_t aExp, bExp, zExp; > uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; > uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; > float128 z; > @@ -5454,7 +5454,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) > float128 float128_rem( float128 a, float128 b STATUS_PARAM ) > { > flag aSign, zSign; > - int32 aExp, bExp, expDiff; > + int_fast32_t aExp, bExp, expDiff; > uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; > uint64_t allZero, alternateASig0, alternateASig1, sigMean1; > int64_t sigMean0; > @@ -5563,7 +5563,7 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) > float128 float128_sqrt( float128 a STATUS_PARAM ) > { > flag aSign; > - int32 aExp, zExp; > + int_fast32_t aExp, zExp; > uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; > uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; > float128 z; > @@ -6133,7 +6133,7 @@ floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) > float128 float128_scalbn( float128 a, int n STATUS_PARAM ) > { > flag aSign; > - int32 aExp; > + int_fast32_t aExp; > uint64_t aSig0, aSig1; > > aSig1 = extractFloat128Frac1( a ); > diff --git a/fpu/softfloat.h b/fpu/softfloat.h > index c599cc2..4c64d77 100644 > --- a/fpu/softfloat.h > +++ b/fpu/softfloat.h > @@ -54,8 +54,6 @@ these four paragraphs for those parts of this code that are retained. > | to the same as `int'. > *----------------------------------------------------------------------------*/ > typedef uint8_t flag; > -typedef unsigned int uint32; > -typedef signed int int32; > typedef uint64_t uint64; > typedef int64_t int64; > > @@ -234,15 +232,15 @@ void float_raise( int_fast8_t flags STATUS_PARAM); > /*---------------------------------------------------------------------------- > | Software IEC/IEEE integer-to-floating-point conversion routines. > *----------------------------------------------------------------------------*/ > -float32 int32_to_float32( int32 STATUS_PARAM ); > -float64 int32_to_float64( int32 STATUS_PARAM ); > +float32 int32_to_float32( int_fast32_t STATUS_PARAM ); > +float64 int32_to_float64( int_fast32_t STATUS_PARAM ); > float32 uint32_to_float32( unsigned int STATUS_PARAM ); > float64 uint32_to_float64( unsigned int STATUS_PARAM ); > #ifdef FLOATX80 > -floatx80 int32_to_floatx80( int32 STATUS_PARAM ); > +floatx80 int32_to_floatx80( int_fast32_t STATUS_PARAM ); > #endif > #ifdef FLOAT128 > -float128 int32_to_float128( int32 STATUS_PARAM ); > +float128 int32_to_float128( int_fast32_t STATUS_PARAM ); > #endif > float32 int64_to_float32( int64 STATUS_PARAM ); > float32 uint64_to_float32( uint64 STATUS_PARAM ); > @@ -284,10 +282,10 @@ float16 float16_maybe_silence_nan( float16 ); > *----------------------------------------------------------------------------*/ > int_fast16_t float32_to_int16_round_to_zero( float32 STATUS_PARAM ); > uint_fast16_t float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); > -int32 float32_to_int32( float32 STATUS_PARAM ); > -int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); > -uint32 float32_to_uint32( float32 STATUS_PARAM ); > -uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); > +int_fast32_t float32_to_int32( float32 STATUS_PARAM ); > +int_fast32_t float32_to_int32_round_to_zero( float32 STATUS_PARAM ); > +uint_fast32_t float32_to_uint32( float32 STATUS_PARAM ); > +uint_fast32_t float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); > int64 float32_to_int64( float32 STATUS_PARAM ); > int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM ); > float64 float32_to_float64( float32 STATUS_PARAM ); > @@ -394,10 +392,10 @@ INLINE float32 float32_set_sign(float32 a, int sign) > *----------------------------------------------------------------------------*/ > int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); > uint_fast16_t float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); > -int32 float64_to_int32( float64 STATUS_PARAM ); > -int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); > -uint32 float64_to_uint32( float64 STATUS_PARAM ); > -uint32 float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); > +int_fast32_t float64_to_int32( float64 STATUS_PARAM ); > +int_fast32_t float64_to_int32_round_to_zero( float64 STATUS_PARAM ); > +uint_fast32_t float64_to_uint32( float64 STATUS_PARAM ); > +uint_fast32_t float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); If you do such a change in the declaration, you should do the same in the code, otherwise it doesn't compile... > int64 float64_to_int64( float64 STATUS_PARAM ); > int64 float64_to_int64_round_to_zero( float64 STATUS_PARAM ); > uint64 float64_to_uint64 (float64 a STATUS_PARAM); > @@ -501,8 +499,8 @@ INLINE float64 float64_set_sign(float64 a, int sign) > /*---------------------------------------------------------------------------- > | Software IEC/IEEE extended double-precision conversion routines. > *----------------------------------------------------------------------------*/ > -int32 floatx80_to_int32( floatx80 STATUS_PARAM ); > -int32 floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); > +int_fast32_t floatx80_to_int32( floatx80 STATUS_PARAM ); > +int_fast32_t floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); > int64 floatx80_to_int64( floatx80 STATUS_PARAM ); > int64 floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); > float32 floatx80_to_float32( floatx80 STATUS_PARAM ); > @@ -584,8 +582,8 @@ INLINE int floatx80_is_any_nan(floatx80 a) > /*---------------------------------------------------------------------------- > | Software IEC/IEEE quadruple-precision conversion routines. > *----------------------------------------------------------------------------*/ > -int32 float128_to_int32( float128 STATUS_PARAM ); > -int32 float128_to_int32_round_to_zero( float128 STATUS_PARAM ); > +int_fast32_t float128_to_int32( float128 STATUS_PARAM ); > +int_fast32_t float128_to_int32_round_to_zero( float128 STATUS_PARAM ); > int64 float128_to_int64( float128 STATUS_PARAM ); > int64 float128_to_int64_round_to_zero( float128 STATUS_PARAM ); > float32 float128_to_float32( float128 STATUS_PARAM ); > -- > 1.7.3.4 > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t Aurelien Jarno @ 2011-03-07 23:16 ` Andreas Färber 2011-03-07 23:33 ` Aurelien Jarno 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-03-07 23:16 UTC (permalink / raw) To: Aurelien Jarno; +Cc: Peter Maydell, qemu-devel Am 07.03.2011 um 10:56 schrieb Aurelien Jarno: > On Mon, Mar 07, 2011 at 01:34:10AM +0100, Andreas Färber wrote: >> v5: >> * Initial. >> >> Cc: Peter Maydell <peter.maydell@linaro.org> >> Signed-off-by: Andreas Färber <andreas.faerber@web.de> >> --- >> fpu/softfloat.c | 132 ++++++++++++++++++++++++++ >> +--------------------------- >> fpu/softfloat.h | 34 +++++++-------- >> 2 files changed, 82 insertions(+), 84 deletions(-) >> diff --git a/fpu/softfloat.h b/fpu/softfloat.h >> index c599cc2..4c64d77 100644 >> --- a/fpu/softfloat.h >> +++ b/fpu/softfloat.h >> @@ -394,10 +392,10 @@ INLINE float32 float32_set_sign(float32 a, >> int sign) >> *----------------------------------------------------------------------------*/ >> int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); >> uint_fast16_t float64_to_uint16_round_to_zero( float64 >> STATUS_PARAM ); >> -int32 float64_to_int32( float64 STATUS_PARAM ); >> -int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); >> -uint32 float64_to_uint32( float64 STATUS_PARAM ); >> -uint32 float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); >> +int_fast32_t float64_to_int32( float64 STATUS_PARAM ); >> +int_fast32_t float64_to_int32_round_to_zero( float64 STATUS_PARAM ); >> +uint_fast32_t float64_to_uint32( float64 STATUS_PARAM ); >> +uint_fast32_t float64_to_uint32_round_to_zero( float64 >> STATUS_PARAM ); > > If you do such a change in the declaration, you should do the same in > the code, otherwise it doesn't compile... Hrm, are you saying this is missing in 08/10, or would you like to see that squashed into this one? It did compile at some point, at least before I reordered patches. Andreas ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t 2011-03-07 23:16 ` Andreas Färber @ 2011-03-07 23:33 ` Aurelien Jarno 0 siblings, 0 replies; 55+ messages in thread From: Aurelien Jarno @ 2011-03-07 23:33 UTC (permalink / raw) To: Andreas Färber; +Cc: Peter Maydell, qemu-devel On Tue, Mar 08, 2011 at 12:16:49AM +0100, Andreas Färber wrote: > Am 07.03.2011 um 10:56 schrieb Aurelien Jarno: > > >On Mon, Mar 07, 2011 at 01:34:10AM +0100, Andreas Färber wrote: > >>v5: > >>* Initial. > >> > >>Cc: Peter Maydell <peter.maydell@linaro.org> > >>Signed-off-by: Andreas Färber <andreas.faerber@web.de> > >>--- > >>fpu/softfloat.c | 132 ++++++++++++++++++++++++++ > >>+--------------------------- > >>fpu/softfloat.h | 34 +++++++-------- > >>2 files changed, 82 insertions(+), 84 deletions(-) > > >>diff --git a/fpu/softfloat.h b/fpu/softfloat.h > >>index c599cc2..4c64d77 100644 > >>--- a/fpu/softfloat.h > >>+++ b/fpu/softfloat.h > > >>@@ -394,10 +392,10 @@ INLINE float32 float32_set_sign(float32 a, > >>int sign) > >>*----------------------------------------------------------------------------*/ > >>int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); > >>uint_fast16_t float64_to_uint16_round_to_zero( float64 > >>STATUS_PARAM ); > >>-int32 float64_to_int32( float64 STATUS_PARAM ); > >>-int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); > >>-uint32 float64_to_uint32( float64 STATUS_PARAM ); > >>-uint32 float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); > >>+int_fast32_t float64_to_int32( float64 STATUS_PARAM ); > >>+int_fast32_t float64_to_int32_round_to_zero( float64 STATUS_PARAM ); > >>+uint_fast32_t float64_to_uint32( float64 STATUS_PARAM ); > >>+uint_fast32_t float64_to_uint32_round_to_zero( float64 > >>STATUS_PARAM ); > > > >If you do such a change in the declaration, you should do the same in > >the code, otherwise it doesn't compile... > > Hrm, are you saying this is missing in 08/10, or would you like to > see that squashed into this one? > It did compile at some point, at least before I reordered patches. > You should not break bisect, so if you change the declaration in a patch, you should also change the corresponding code in the same patch. My guess is that you are using a 32-bit system, so int_fast32_t is the same size as a int. On my system int_fast32_t is equivalent to int64_t so it doesn't compile. That's why I don't think it's a good idea to use fast types. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 05/10] softfloat: Use [u]int_fast16_t consistently Andreas Färber @ 2011-03-07 9:56 ` Aurelien Jarno 2011-03-07 23:02 ` Andreas Färber 2011-03-07 23:14 ` Peter Maydell 1 sibling, 2 replies; 55+ messages in thread From: Aurelien Jarno @ 2011-03-07 9:56 UTC (permalink / raw) To: Andreas Färber; +Cc: Peter Maydell, qemu-devel On Mon, Mar 07, 2011 at 01:34:07AM +0100, Andreas Färber wrote: > AIX already didn't use our definition, so let's start ripping out this one: > As pointed out by Peter Maydell, int16 is currently int on most > supported platforms, so let's replace it with int_fast16_t, > allowing the system to use a wider type if appropriate. Do you have a rationale about the use of the fast version of the types? As you said it allows the compiler to use a wider type if appropriate, and this usually doesn't play very well when shifts are involved, which is the case of the softfloat code. Have you verified that each conversion is correct? On the other hand I really doubt it has a measurable impact on speed. I would really go for uint16_t for now. This might be changed to the fast version in a second step if we are sure everything is correct, but let's don't mix the two steps for now. > Note that Darwin uses [u]int16_t now, whereas Haiku uses [u]int32_t. > > v5: > * Rebased. Convert new use of int16. > > v3: > * Split off. Use [u]int_fast16_t rather than [u]int16_t. > > v2: > * Rebased. Fix two new instances of int16. > > Cc: Peter Maydell <peter.maydell@linaro.org> > Cc: malc <av1474@comtv.ru> > Signed-off-by: Andreas Färber <andreas.faerber@web.de> > --- > fpu/softfloat-macros.h | 18 ++++---- > fpu/softfloat.c | 116 ++++++++++++++++++++++++------------------------ > fpu/softfloat.h | 8 +--- > 3 files changed, 69 insertions(+), 73 deletions(-) > > diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h > index 3128e60..7b350c0 100644 > --- a/fpu/softfloat-macros.h > +++ b/fpu/softfloat-macros.h > @@ -44,7 +44,7 @@ these four paragraphs for those parts of this code that are retained. > | The result is stored in the location pointed to by `zPtr'. > *----------------------------------------------------------------------------*/ > > -INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) > +INLINE void shift32RightJamming( uint32_t a, int_fast16_t count, uint32_t *zPtr ) > { > uint32_t z; > > @@ -70,7 +70,7 @@ INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) > | The result is stored in the location pointed to by `zPtr'. > *----------------------------------------------------------------------------*/ > > -INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) > +INLINE void shift64RightJamming( uint64_t a, int_fast16_t count, uint64_t *zPtr ) > { > uint64_t z; > > @@ -106,7 +106,7 @@ INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) > > INLINE void > shift64ExtraRightJamming( > - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > uint64_t z0, z1; > int8 negCount = ( - count ) & 63; > @@ -143,7 +143,7 @@ INLINE void > > INLINE void > shift128Right( > - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > uint64_t z0, z1; > int8 negCount = ( - count ) & 63; > @@ -178,7 +178,7 @@ INLINE void > > INLINE void > shift128RightJamming( > - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > uint64_t z0, z1; > int8 negCount = ( - count ) & 63; > @@ -232,7 +232,7 @@ INLINE void > uint64_t a0, > uint64_t a1, > uint64_t a2, > - int16 count, > + int_fast16_t count, > uint64_t *z0Ptr, > uint64_t *z1Ptr, > uint64_t *z2Ptr > @@ -287,7 +287,7 @@ INLINE void > > INLINE void > shortShift128Left( > - uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > + uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > > *z1Ptr = a1<<count; > @@ -309,7 +309,7 @@ INLINE void > uint64_t a0, > uint64_t a1, > uint64_t a2, > - int16 count, > + int_fast16_t count, > uint64_t *z0Ptr, > uint64_t *z1Ptr, > uint64_t *z2Ptr > @@ -580,7 +580,7 @@ static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b ) > | value. > *----------------------------------------------------------------------------*/ > > -static uint32_t estimateSqrt32( int16 aExp, uint32_t a ) > +static uint32_t estimateSqrt32( int_fast16_t aExp, uint32_t a ) > { > static const uint16_t sqrtOddAdjustments[] = { > 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index 08e4ae0..befd400 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -84,7 +84,7 @@ INLINE uint32_t extractFloat16Frac(float16 a) > | Returns the exponent bits of the half-precision floating-point value `a'. > *----------------------------------------------------------------------------*/ > > -INLINE int16 extractFloat16Exp(float16 a) > +INLINE int_fast16_t extractFloat16Exp(float16 a) > { > return (float16_val(a) >> 10) & 0x1f; > } > @@ -215,7 +215,7 @@ INLINE uint32_t extractFloat32Frac( float32 a ) > | Returns the exponent bits of the single-precision floating-point value `a'. > *----------------------------------------------------------------------------*/ > > -INLINE int16 extractFloat32Exp( float32 a ) > +INLINE int_fast16_t extractFloat32Exp( float32 a ) > { > > return ( float32_val(a)>>23 ) & 0xFF; > @@ -256,7 +256,7 @@ static float32 float32_squash_input_denormal(float32 a STATUS_PARAM) > *----------------------------------------------------------------------------*/ > > static void > - normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr ) > + normalizeFloat32Subnormal( uint32_t aSig, int_fast16_t *zExpPtr, uint32_t *zSigPtr ) > { > int8 shiftCount; > > @@ -277,7 +277,7 @@ static void > | significand. > *----------------------------------------------------------------------------*/ > > -INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) > +INLINE float32 packFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig ) > { > > return make_float32( > @@ -307,7 +307,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) > | Binary Floating-Point Arithmetic. > *----------------------------------------------------------------------------*/ > > -static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) > +static float32 roundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM) > { > int8 roundingMode; > flag roundNearestEven; > @@ -370,7 +370,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS > *----------------------------------------------------------------------------*/ > > static float32 > - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) > + normalizeRoundAndPackFloat32( flag zSign, int_fast16_t zExp, uint32_t zSig STATUS_PARAM) > { > int8 shiftCount; > > @@ -394,7 +394,7 @@ INLINE uint64_t extractFloat64Frac( float64 a ) > | Returns the exponent bits of the double-precision floating-point value `a'. > *----------------------------------------------------------------------------*/ > > -INLINE int16 extractFloat64Exp( float64 a ) > +INLINE int_fast16_t extractFloat64Exp( float64 a ) > { > > return ( float64_val(a)>>52 ) & 0x7FF; > @@ -435,7 +435,7 @@ static float64 float64_squash_input_denormal(float64 a STATUS_PARAM) > *----------------------------------------------------------------------------*/ > > static void > - normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr ) > + normalizeFloat64Subnormal( uint64_t aSig, int_fast16_t *zExpPtr, uint64_t *zSigPtr ) > { > int8 shiftCount; > > @@ -456,7 +456,7 @@ static void > | significand. > *----------------------------------------------------------------------------*/ > > -INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) > +INLINE float64 packFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig ) > { > > return make_float64( > @@ -486,11 +486,11 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) > | Binary Floating-Point Arithmetic. > *----------------------------------------------------------------------------*/ > > -static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) > +static float64 roundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM) > { > int8 roundingMode; > flag roundNearestEven; > - int16 roundIncrement, roundBits; > + int_fast16_t roundIncrement, roundBits; > flag isTiny; > > roundingMode = STATUS(float_rounding_mode); > @@ -549,7 +549,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS > *----------------------------------------------------------------------------*/ > > static float64 > - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) > + normalizeRoundAndPackFloat64( flag zSign, int_fast16_t zExp, uint64_t zSig STATUS_PARAM) > { > int8 shiftCount; > > @@ -1354,7 +1354,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) > int32 float32_to_int32( float32 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, shiftCount; > + int_fast16_t aExp, shiftCount; > uint32_t aSig; > uint64_t aSig64; > > @@ -1385,7 +1385,7 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) > int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, shiftCount; > + int_fast16_t aExp, shiftCount; > uint32_t aSig; > int32 z; > a = float32_squash_input_denormal(a STATUS_VAR); > @@ -1425,10 +1425,10 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) > | returned. > *----------------------------------------------------------------------------*/ > > -int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) > +int_fast16_t float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, shiftCount; > + int_fast16_t aExp, shiftCount; > uint32_t aSig; > int32 z; > > @@ -1477,7 +1477,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) > int64 float32_to_int64( float32 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, shiftCount; > + int_fast16_t aExp, shiftCount; > uint32_t aSig; > uint64_t aSig64, aSigExtra; > a = float32_squash_input_denormal(a STATUS_VAR); > @@ -1514,7 +1514,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) > int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, shiftCount; > + int_fast16_t aExp, shiftCount; > uint32_t aSig; > uint64_t aSig64; > int64 z; > @@ -1558,7 +1558,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) > float64 float32_to_float64( float32 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint32_t aSig; > a = float32_squash_input_denormal(a STATUS_VAR); > > @@ -1590,7 +1590,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) > floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint32_t aSig; > > a = float32_squash_input_denormal(a STATUS_VAR); > @@ -1624,7 +1624,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) > float128 float32_to_float128( float32 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint32_t aSig; > > a = float32_squash_input_denormal(a STATUS_VAR); > @@ -1656,7 +1656,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) > float32 float32_round_to_int( float32 a STATUS_PARAM) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint32_t lastBitMask, roundBitsMask; > int8 roundingMode; > uint32_t z; > @@ -1716,9 +1716,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) > > static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) > { > - int16 aExp, bExp, zExp; > + int_fast16_t aExp, bExp, zExp; > uint32_t aSig, bSig, zSig; > - int16 expDiff; > + int_fast16_t expDiff; > > aSig = extractFloat32Frac( a ); > aExp = extractFloat32Exp( a ); > @@ -1790,9 +1790,9 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) > > static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) > { > - int16 aExp, bExp, zExp; > + int_fast16_t aExp, bExp, zExp; > uint32_t aSig, bSig, zSig; > - int16 expDiff; > + int_fast16_t expDiff; > > aSig = extractFloat32Frac( a ); > aExp = extractFloat32Exp( a ); > @@ -1910,7 +1910,7 @@ float32 float32_sub( float32 a, float32 b STATUS_PARAM ) > float32 float32_mul( float32 a, float32 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > - int16 aExp, bExp, zExp; > + int_fast16_t aExp, bExp, zExp; > uint32_t aSig, bSig; > uint64_t zSig64; > uint32_t zSig; > @@ -1973,7 +1973,7 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) > float32 float32_div( float32 a, float32 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > - int16 aExp, bExp, zExp; > + int_fast16_t aExp, bExp, zExp; > uint32_t aSig, bSig, zSig; > a = float32_squash_input_denormal(a STATUS_VAR); > b = float32_squash_input_denormal(b STATUS_VAR); > @@ -2037,7 +2037,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) > float32 float32_rem( float32 a, float32 b STATUS_PARAM ) > { > flag aSign, zSign; > - int16 aExp, bExp, expDiff; > + int_fast16_t aExp, bExp, expDiff; > uint32_t aSig, bSig; > uint32_t q; > uint64_t aSig64, bSig64, q64; > @@ -2138,7 +2138,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) > float32 float32_sqrt( float32 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, zExp; > + int_fast16_t aExp, zExp; > uint32_t aSig, zSig; > uint64_t rem, term; > a = float32_squash_input_denormal(a STATUS_VAR); > @@ -2224,7 +2224,7 @@ static const float64 float32_exp2_coefficients[15] = > float32 float32_exp2( float32 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint32_t aSig; > float64 r, x, xn; > int i; > @@ -2272,7 +2272,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) > float32 float32_log2( float32 a STATUS_PARAM ) > { > flag aSign, zSign; > - int16 aExp; > + int_fast16_t aExp; > uint32_t aSig, zSig, i; > > a = float32_squash_input_denormal(a STATUS_VAR); > @@ -2493,7 +2493,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) > int32 float64_to_int32( float64 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, shiftCount; > + int_fast16_t aExp, shiftCount; > uint64_t aSig; > a = float64_squash_input_denormal(a STATUS_VAR); > > @@ -2521,7 +2521,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) > int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, shiftCount; > + int_fast16_t aExp, shiftCount; > uint64_t aSig, savedASig; > int32 z; > a = float64_squash_input_denormal(a STATUS_VAR); > @@ -2565,10 +2565,10 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) > | returned. > *----------------------------------------------------------------------------*/ > > -int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) > +int_fast16_t float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, shiftCount; > + int_fast16_t aExp, shiftCount; > uint64_t aSig, savedASig; > int32 z; > > @@ -2619,7 +2619,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) > int64 float64_to_int64( float64 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, shiftCount; > + int_fast16_t aExp, shiftCount; > uint64_t aSig, aSigExtra; > a = float64_squash_input_denormal(a STATUS_VAR); > > @@ -2662,7 +2662,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) > int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, shiftCount; > + int_fast16_t aExp, shiftCount; > uint64_t aSig; > int64 z; > a = float64_squash_input_denormal(a STATUS_VAR); > @@ -2712,7 +2712,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) > float32 float64_to_float32( float64 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint64_t aSig; > uint32_t zSig; > a = float64_squash_input_denormal(a STATUS_VAR); > @@ -2745,7 +2745,7 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) > | than the desired result exponent whenever `zSig' is a complete, normalized > | significand. > *----------------------------------------------------------------------------*/ > -static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig) > +static float16 packFloat16(flag zSign, int_fast16_t zExp, uint16_t zSig) > { > return make_float16( > (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig); > @@ -2757,7 +2757,7 @@ static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig) > float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint32_t aSig; > > aSign = extractFloat16Sign(a); > @@ -2787,7 +2787,7 @@ float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM) > float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint32_t aSig; > uint32_t mask; > uint32_t increment; > @@ -2890,7 +2890,7 @@ float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM) > floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint64_t aSig; > > a = float64_squash_input_denormal(a STATUS_VAR); > @@ -2925,7 +2925,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) > float128 float64_to_float128( float64 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint64_t aSig, zSig0, zSig1; > > a = float64_squash_input_denormal(a STATUS_VAR); > @@ -2958,7 +2958,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM ) > float64 float64_round_to_int( float64 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint64_t lastBitMask, roundBitsMask; > int8 roundingMode; > uint64_t z; > @@ -3031,9 +3031,9 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM) > > static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) > { > - int16 aExp, bExp, zExp; > + int_fast16_t aExp, bExp, zExp; > uint64_t aSig, bSig, zSig; > - int16 expDiff; > + int_fast16_t expDiff; > > aSig = extractFloat64Frac( a ); > aExp = extractFloat64Exp( a ); > @@ -3105,9 +3105,9 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) > > static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) > { > - int16 aExp, bExp, zExp; > + int_fast16_t aExp, bExp, zExp; > uint64_t aSig, bSig, zSig; > - int16 expDiff; > + int_fast16_t expDiff; > > aSig = extractFloat64Frac( a ); > aExp = extractFloat64Exp( a ); > @@ -3225,7 +3225,7 @@ float64 float64_sub( float64 a, float64 b STATUS_PARAM ) > float64 float64_mul( float64 a, float64 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > - int16 aExp, bExp, zExp; > + int_fast16_t aExp, bExp, zExp; > uint64_t aSig, bSig, zSig0, zSig1; > > a = float64_squash_input_denormal(a STATUS_VAR); > @@ -3286,7 +3286,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) > float64 float64_div( float64 a, float64 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > - int16 aExp, bExp, zExp; > + int_fast16_t aExp, bExp, zExp; > uint64_t aSig, bSig, zSig; > uint64_t rem0, rem1; > uint64_t term0, term1; > @@ -3358,7 +3358,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) > float64 float64_rem( float64 a, float64 b STATUS_PARAM ) > { > flag aSign, zSign; > - int16 aExp, bExp, expDiff; > + int_fast16_t aExp, bExp, expDiff; > uint64_t aSig, bSig; > uint64_t q, alternateASig; > int64_t sigMean; > @@ -3444,7 +3444,7 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) > float64 float64_sqrt( float64 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp, zExp; > + int_fast16_t aExp, zExp; > uint64_t aSig, zSig, doubleZSig; > uint64_t rem0, rem1, term0, term1; > a = float64_squash_input_denormal(a STATUS_VAR); > @@ -3495,7 +3495,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) > float64 float64_log2( float64 a STATUS_PARAM ) > { > flag aSign, zSign; > - int16 aExp; > + int_fast16_t aExp; > uint64_t aSig, aSig0, aSig1, zSig, i; > a = float64_squash_input_denormal(a STATUS_VAR); > > @@ -3930,7 +3930,7 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) > float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint64_t aSig, zSig0, zSig1; > > aSig = extractFloatx80Frac( a ); > @@ -6061,7 +6061,7 @@ int float128_compare_quiet( float128 a, float128 b STATUS_PARAM ) > float32 float32_scalbn( float32 a, int n STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint32_t aSig; > > a = float32_squash_input_denormal(a STATUS_VAR); > @@ -6085,7 +6085,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM ) > float64 float64_scalbn( float64 a, int n STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint64_t aSig; > > a = float64_squash_input_denormal(a STATUS_VAR); > @@ -6110,7 +6110,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM ) > floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) > { > flag aSign; > - int16 aExp; > + int_fast16_t aExp; > uint64_t aSig; > > aSig = extractFloatx80Frac( a ); > diff --git a/fpu/softfloat.h b/fpu/softfloat.h > index 5d05fa5..f98e50c 100644 > --- a/fpu/softfloat.h > +++ b/fpu/softfloat.h > @@ -56,10 +56,6 @@ these four paragraphs for those parts of this code that are retained. > typedef uint8_t flag; > typedef uint8_t uint8; > typedef int8_t int8; > -#ifndef _AIX > -typedef int uint16; > -typedef int int16; > -#endif > typedef unsigned int uint32; > typedef signed int int32; > typedef uint64_t uint64; > @@ -288,7 +284,7 @@ float16 float16_maybe_silence_nan( float16 ); > /*---------------------------------------------------------------------------- > | Software IEC/IEEE single-precision conversion routines. > *----------------------------------------------------------------------------*/ > -int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM ); > +int_fast16_t float32_to_int16_round_to_zero( float32 STATUS_PARAM ); > unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); > int32 float32_to_int32( float32 STATUS_PARAM ); > int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); > @@ -398,7 +394,7 @@ INLINE float32 float32_set_sign(float32 a, int sign) > /*---------------------------------------------------------------------------- > | Software IEC/IEEE double-precision conversion routines. > *----------------------------------------------------------------------------*/ > -int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM ); > +int_fast16_t float64_to_int16_round_to_zero( float64 STATUS_PARAM ); > unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); > int32 float64_to_int32( float64 STATUS_PARAM ); > int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); > -- > 1.7.3.4 > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Aurelien Jarno @ 2011-03-07 23:02 ` Andreas Färber 2011-03-07 23:28 ` Aurelien Jarno 2011-03-07 23:14 ` Peter Maydell 1 sibling, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-03-07 23:02 UTC (permalink / raw) To: Aurelien Jarno; +Cc: Peter Maydell, qemu-devel Am 07.03.2011 um 10:56 schrieb Aurelien Jarno: > On Mon, Mar 07, 2011 at 01:34:07AM +0100, Andreas Färber wrote: >> AIX already didn't use our definition, so let's start ripping out >> this one: >> As pointed out by Peter Maydell, int16 is currently int on most >> supported platforms, so let's replace it with int_fast16_t, >> allowing the system to use a wider type if appropriate. > > Do you have a rationale about the use of the fast version of the > types? > As you said it allows the compiler to use a wider type if appropriate, > and this usually doesn't play very well when shifts are involved, > which > is the case of the softfloat code. Have you verified that each > conversion is correct? On the other hand I really doubt it has a > measurable impact on speed. > > I would really go for uint16_t for now. This might be changed to the > fast > version in a second step if we are sure everything is correct, but > let's > don't mix the two steps for now. SoftFloat distinguishes between [s]bits* and [u]int*. Wherever exact- width semantics were needed, [s]bits* was used (or should have been) and this is converted in 03/10. It was Peter's demand [1] that we retain this distinction and it was my suggestion to then use [u]int_fast*_t, which provides such semantics for POSIX, since the colliding use of [u]int* and its accidental uses outside SoftFloat are what this series seeks to address. The difference is that with POSIX the semantics are system-defined whereas right now they are QEMU- defined. Most of the series was crafted in a semi-automatic fashion, doing a search and reviewing each hit before replacing. If we drop the type distinction and use uint16_t for both bits16 and uint16 then we cannot easily do the second step you propose. My and, I figured, Peter's intent was to do this conversion without changing semantics as far as possible. Softfloat-native turned out difficult in that aspect, since it followed the definitions of the header rather than the types used in the SoftFloat implementation. There, the conversions need more careful review of whether they wrongly rely on fixed-width semantics. But seeing the persistent rate of softfloat bug fixes, I would ask to address the license issue sooner than later. Doesn't need to be my patch, if someone feels tempted to do better. Andreas [1] http://lists.nongnu.org/archive/html/qemu-devel/2010-12/msg01552.html ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-03-07 23:02 ` Andreas Färber @ 2011-03-07 23:28 ` Aurelien Jarno 0 siblings, 0 replies; 55+ messages in thread From: Aurelien Jarno @ 2011-03-07 23:28 UTC (permalink / raw) To: Andreas Färber; +Cc: Peter Maydell, qemu-devel On Tue, Mar 08, 2011 at 12:02:39AM +0100, Andreas Färber wrote: > Am 07.03.2011 um 10:56 schrieb Aurelien Jarno: > > >On Mon, Mar 07, 2011 at 01:34:07AM +0100, Andreas Färber wrote: > >>AIX already didn't use our definition, so let's start ripping > >>out this one: > >>As pointed out by Peter Maydell, int16 is currently int on most > >>supported platforms, so let's replace it with int_fast16_t, > >>allowing the system to use a wider type if appropriate. > > > >Do you have a rationale about the use of the fast version of the > >types? > >As you said it allows the compiler to use a wider type if appropriate, > >and this usually doesn't play very well when shifts are involved, > >which > >is the case of the softfloat code. Have you verified that each > >conversion is correct? On the other hand I really doubt it has a > >measurable impact on speed. > > > >I would really go for uint16_t for now. This might be changed to > >the fast > >version in a second step if we are sure everything is correct, but > >let's > >don't mix the two steps for now. > > SoftFloat distinguishes between [s]bits* and [u]int*. Wherever > exact-width semantics were needed, [s]bits* was used (or should have > been) and this is converted in 03/10. It was Peter's demand [1] that > we retain this distinction and it was my suggestion to then use > [u]int_fast*_t, which provides such semantics for POSIX, since the > colliding use of [u]int* and its accidental uses outside SoftFloat > are what this series seeks to address. The difference is that with > POSIX the semantics are system-defined whereas right now they are > QEMU-defined. The patch actually changes the semantic. Before int, ie 32 bit was used for int16. With your changes it can now be 16, 32 or 64 bit depending on the host. This is the kind of changes we don't want, it means problems are going to depend on the host for no real reason. This is actually what you observed later in the series: there are types mismatch in your patches, though they match on your machine (probably 32-bit), but not on mine. > Most of the series was crafted in a semi-automatic fashion, doing a > search and reviewing each hit before replacing. If we drop the type > distinction and use uint16_t for both bits16 and uint16 then we > cannot easily do the second step you propose. > > My and, I figured, Peter's intent was to do this conversion without > changing semantics as far as possible. Softfloat-native turned out > difficult in that aspect, since it followed the definitions of the > header rather than the types used in the SoftFloat implementation. > There, the conversions need more careful review of whether they > wrongly rely on fixed-width semantics. > > But seeing the persistent rate of softfloat bug fixes, I would ask > to address the license issue sooner than later. Doesn't need to be > my patch, if someone feels tempted to do better. > I agree it is something that should be fixed, however given we are modifying this file for more than 5 years, a few days more or less won't change anything. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Aurelien Jarno 2011-03-07 23:02 ` Andreas Färber @ 2011-03-07 23:14 ` Peter Maydell 2011-03-07 23:37 ` Aurelien Jarno 1 sibling, 1 reply; 55+ messages in thread From: Peter Maydell @ 2011-03-07 23:14 UTC (permalink / raw) To: Aurelien Jarno; +Cc: Andreas Färber, qemu-devel On 7 March 2011 09:56, Aurelien Jarno <aurelien@aurel32.net> wrote: > On Mon, Mar 07, 2011 at 01:34:07AM +0100, Andreas Färber wrote: >> AIX already didn't use our definition, so let's start ripping out this one: >> As pointed out by Peter Maydell, int16 is currently int on most >> supported platforms, so let's replace it with int_fast16_t, >> allowing the system to use a wider type if appropriate. > > Do you have a rationale about the use of the fast version of the types? > As you said it allows the compiler to use a wider type if appropriate, > and this usually doesn't play very well when shifts are involved, which > is the case of the softfloat code. Have you verified that each > conversion is correct? On the other hand I really doubt it has a > measurable impact on speed. > > I would really go for uint16_t for now. This might be changed to the fast > version in a second step if we are sure everything is correct, but let's > don't mix the two steps for now. As Andreas says, the code as it is at the moment makes the "wider is OK" vs "exact width only" distinction, it just isn't using the standard typenames to do it. So changing "int16" to "int16_t" would be the change of semantics (both in theory and in practice, since at the moment "int16" is int). -- PMM ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-03-07 23:14 ` Peter Maydell @ 2011-03-07 23:37 ` Aurelien Jarno 2011-03-08 8:29 ` Peter Maydell 0 siblings, 1 reply; 55+ messages in thread From: Aurelien Jarno @ 2011-03-07 23:37 UTC (permalink / raw) To: Peter Maydell; +Cc: Andreas Färber, qemu-devel On Mon, Mar 07, 2011 at 11:14:11PM +0000, Peter Maydell wrote: > On 7 March 2011 09:56, Aurelien Jarno <aurelien@aurel32.net> wrote: > > On Mon, Mar 07, 2011 at 01:34:07AM +0100, Andreas Färber wrote: > >> AIX already didn't use our definition, so let's start ripping out this one: > >> As pointed out by Peter Maydell, int16 is currently int on most > >> supported platforms, so let's replace it with int_fast16_t, > >> allowing the system to use a wider type if appropriate. > > > > Do you have a rationale about the use of the fast version of the types? > > As you said it allows the compiler to use a wider type if appropriate, > > and this usually doesn't play very well when shifts are involved, which > > is the case of the softfloat code. Have you verified that each > > conversion is correct? On the other hand I really doubt it has a > > measurable impact on speed. > > > > I would really go for uint16_t for now. This might be changed to the fast > > version in a second step if we are sure everything is correct, but let's > > don't mix the two steps for now. > > As Andreas says, the code as it is at the moment makes the "wider > is OK" vs "exact width only" distinction, it just isn't using the > standard typenames to do it. So changing "int16" to "int16_t" would > be the change of semantics (both in theory and in practice, since at > the moment "int16" is int). > I understand your point, but OTOH int_fast16_t means at least int16_t so in practice it doesn't bring anything more than changing to int16_t, except more pain as the size actually depends on the host. If we want to change the int here, we should either use int32_t here (which matches the size of int), or just look case by case and use the correct type. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-03-07 23:37 ` Aurelien Jarno @ 2011-03-08 8:29 ` Peter Maydell 2011-03-08 8:49 ` Aurelien Jarno 2011-03-08 18:54 ` Andreas Färber 0 siblings, 2 replies; 55+ messages in thread From: Peter Maydell @ 2011-03-08 8:29 UTC (permalink / raw) To: Aurelien Jarno; +Cc: Andreas Färber, qemu-devel On 7 March 2011 23:37, Aurelien Jarno <aurelien@aurel32.net> wrote: > I understand your point, but OTOH int_fast16_t means at least int16_t so > in practice it doesn't bring anything more than changing to int16_t, > except more pain as the size actually depends on the host. But at the moment we implement int16 as int, so (a) we'd be telling the compiler it needed to use a type that was (fractionally) less efficient and (b) we already know that the code can cope with the type being wider than 16 bits, because that's how we're compiling the code today. The thing we should be worrying about is that maybe there's code that accidentally requires more than 16 bits in an int16 which would break if you defined it as an int16_t... > If we want to change the int here, we should either use int32_t here > (which matches the size of int), or just look case by case and use the > correct type. Correct choice between 'bits16' and 'uint16' is actually one of the areas where I pretty much trust the original softfloat code: I think it's definitely a retrograde step to throw that away, and personally I would NAK any patch which merges the two together into a single typename. Maybe we should have a patchset that does the uncontroversial change (bits32->uint32_t &c, which I think should be purely mechanical) while we argue about this bit? -- PMM ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-03-08 8:29 ` Peter Maydell @ 2011-03-08 8:49 ` Aurelien Jarno 2011-03-08 18:54 ` Andreas Färber 1 sibling, 0 replies; 55+ messages in thread From: Aurelien Jarno @ 2011-03-08 8:49 UTC (permalink / raw) To: Peter Maydell; +Cc: Andreas Färber, qemu-devel On Tue, Mar 08, 2011 at 08:29:50AM +0000, Peter Maydell wrote: > On 7 March 2011 23:37, Aurelien Jarno <aurelien@aurel32.net> wrote: > > I understand your point, but OTOH int_fast16_t means at least int16_t so > > in practice it doesn't bring anything more than changing to int16_t, > > except more pain as the size actually depends on the host. > > But at the moment we implement int16 as int, so (a) we'd be telling > the compiler it needed to use a type that was (fractionally) less > efficient and (b) we already know that the code can cope with the > type being wider than 16 bits, because that's how we're compiling > the code today. The thing we should be worrying about is that maybe > there's code that accidentally requires more than 16 bits in an > int16 which would break if you defined it as an int16_t... And it might also break with int_fast16_t as it only guarantees int16_t at the minimum. So using int_fast16_t doesn't bring more safety than int16_t here. Also currently we define int16 as int, so it has the same size everywhere. int_fast16_t size is varying depending on the host. > > > If we want to change the int here, we should either use int32_t here > > (which matches the size of int), or just look case by case and use the > > correct type. > > Correct choice between 'bits16' and 'uint16' is actually one of > the areas where I pretty much trust the original softfloat code: > I think it's definitely a retrograde step to throw that away, > and personally I would NAK any patch which merges the two together > into a single typename. On most systems uint_fastxx_t types is defined in the preprocessor, so the compiler can't really exploit this. We are in 2010 and compilers are able to compile code using 16-, 32- or 64-bit ops for an uint16_t if it's faster on this architecture, while guaranteeing that the result would be the same than an uint16_t. By using uint_fast16_t we simply force the compiler to use a 64-bit op on a 64-bit machine, even if it has only have 16-bits to handle. Also a lot of functions in softfloat are static or inline functions, so the compiler can do a lot of optimizations if the type is not overestimated. In any case, I would NAK any patch that are using different size depending on the host, as it is a real nightmare to handle, and there is no real point to do that. Andreas has shown we can have code that compiles on 32-bit, but not on 64-bit. That's the best case, we can also have different results on 32-bit than 64-bit, and it's a lot more difficult to detect. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-03-08 8:29 ` Peter Maydell 2011-03-08 8:49 ` Aurelien Jarno @ 2011-03-08 18:54 ` Andreas Färber 2011-03-21 21:11 ` Aurelien Jarno 1 sibling, 1 reply; 55+ messages in thread From: Andreas Färber @ 2011-03-08 18:54 UTC (permalink / raw) To: Peter Maydell; +Cc: qemu-devel, Aurelien Jarno Am 08.03.2011 um 09:29 schrieb Peter Maydell: > Maybe we should have a patchset that does the uncontroversial > change (bits32->uint32_t &c, which I think should be purely > mechanical) while we argue about this bit? That should be patch 03 (or 02-03). :) Andreas ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t 2011-03-08 18:54 ` Andreas Färber @ 2011-03-21 21:11 ` Aurelien Jarno 0 siblings, 0 replies; 55+ messages in thread From: Aurelien Jarno @ 2011-03-21 21:11 UTC (permalink / raw) To: Andreas Färber; +Cc: Peter Maydell, qemu-devel On Tue, Mar 08, 2011 at 07:54:39PM +0100, Andreas Färber wrote: > Am 08.03.2011 um 09:29 schrieb Peter Maydell: > > >Maybe we should have a patchset that does the uncontroversial > >change (bits32->uint32_t &c, which I think should be purely > >mechanical) while we argue about this bit? > > That should be patch 03 (or 02-03). :) > I have just applied patches 01 to 03. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber @ 2011-03-07 9:56 ` Aurelien Jarno 1 sibling, 0 replies; 55+ messages in thread From: Aurelien Jarno @ 2011-03-07 9:56 UTC (permalink / raw) To: Andreas Färber; +Cc: Peter Maydell, qemu-devel On Mon, Mar 07, 2011 at 01:34:06AM +0100, Andreas Färber wrote: > They are defined with the same semantics as the POSIX types, > so prefer those for consistency. Suggested by Peter Maydell. > > v5: > * Rebased. Convert new uses of bits*. > > v4: > * Rebased. > > v3: > * Initial. > > Cc: Peter Maydell <peter.maydell@linaro.org> > Cc: Aurelien Jarno <aurelien@aurel32.net> > Signed-off-by: Andreas Färber <andreas.faerber@web.de> > --- > fpu/softfloat-macros.h | 182 +++++++------- > fpu/softfloat-native.c | 6 +- > fpu/softfloat-specialize.h | 62 +++--- > fpu/softfloat.c | 584 ++++++++++++++++++++++---------------------- > fpu/softfloat.h | 15 -- > 5 files changed, 417 insertions(+), 432 deletions(-) Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> > diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h > index 54c0bad..3128e60 100644 > --- a/fpu/softfloat-macros.h > +++ b/fpu/softfloat-macros.h > @@ -44,9 +44,9 @@ these four paragraphs for those parts of this code that are retained. > | The result is stored in the location pointed to by `zPtr'. > *----------------------------------------------------------------------------*/ > > -INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) > +INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr ) > { > - bits32 z; > + uint32_t z; > > if ( count == 0 ) { > z = a; > @@ -70,9 +70,9 @@ INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) > | The result is stored in the location pointed to by `zPtr'. > *----------------------------------------------------------------------------*/ > > -INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) > +INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr ) > { > - bits64 z; > + uint64_t z; > > if ( count == 0 ) { > z = a; > @@ -106,9 +106,9 @@ INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) > > INLINE void > shift64ExtraRightJamming( > - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) > + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > - bits64 z0, z1; > + uint64_t z0, z1; > int8 negCount = ( - count ) & 63; > > if ( count == 0 ) { > @@ -143,9 +143,9 @@ INLINE void > > INLINE void > shift128Right( > - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) > + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > - bits64 z0, z1; > + uint64_t z0, z1; > int8 negCount = ( - count ) & 63; > > if ( count == 0 ) { > @@ -178,9 +178,9 @@ INLINE void > > INLINE void > shift128RightJamming( > - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) > + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > - bits64 z0, z1; > + uint64_t z0, z1; > int8 negCount = ( - count ) & 63; > > if ( count == 0 ) { > @@ -229,16 +229,16 @@ INLINE void > > INLINE void > shift128ExtraRightJamming( > - bits64 a0, > - bits64 a1, > - bits64 a2, > + uint64_t a0, > + uint64_t a1, > + uint64_t a2, > int16 count, > - bits64 *z0Ptr, > - bits64 *z1Ptr, > - bits64 *z2Ptr > + uint64_t *z0Ptr, > + uint64_t *z1Ptr, > + uint64_t *z2Ptr > ) > { > - bits64 z0, z1, z2; > + uint64_t z0, z1, z2; > int8 negCount = ( - count ) & 63; > > if ( count == 0 ) { > @@ -287,7 +287,7 @@ INLINE void > > INLINE void > shortShift128Left( > - bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr ) > + uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > > *z1Ptr = a1<<count; > @@ -306,16 +306,16 @@ INLINE void > > INLINE void > shortShift192Left( > - bits64 a0, > - bits64 a1, > - bits64 a2, > + uint64_t a0, > + uint64_t a1, > + uint64_t a2, > int16 count, > - bits64 *z0Ptr, > - bits64 *z1Ptr, > - bits64 *z2Ptr > + uint64_t *z0Ptr, > + uint64_t *z1Ptr, > + uint64_t *z2Ptr > ) > { > - bits64 z0, z1, z2; > + uint64_t z0, z1, z2; > int8 negCount; > > z2 = a2<<count; > @@ -341,9 +341,9 @@ INLINE void > > INLINE void > add128( > - bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr ) > + uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > - bits64 z1; > + uint64_t z1; > > z1 = a1 + b1; > *z1Ptr = z1; > @@ -361,18 +361,18 @@ INLINE void > > INLINE void > add192( > - bits64 a0, > - bits64 a1, > - bits64 a2, > - bits64 b0, > - bits64 b1, > - bits64 b2, > - bits64 *z0Ptr, > - bits64 *z1Ptr, > - bits64 *z2Ptr > + uint64_t a0, > + uint64_t a1, > + uint64_t a2, > + uint64_t b0, > + uint64_t b1, > + uint64_t b2, > + uint64_t *z0Ptr, > + uint64_t *z1Ptr, > + uint64_t *z2Ptr > ) > { > - bits64 z0, z1, z2; > + uint64_t z0, z1, z2; > int8 carry0, carry1; > > z2 = a2 + b2; > @@ -399,7 +399,7 @@ INLINE void > > INLINE void > sub128( > - bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr ) > + uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > > *z1Ptr = a1 - b1; > @@ -417,18 +417,18 @@ INLINE void > > INLINE void > sub192( > - bits64 a0, > - bits64 a1, > - bits64 a2, > - bits64 b0, > - bits64 b1, > - bits64 b2, > - bits64 *z0Ptr, > - bits64 *z1Ptr, > - bits64 *z2Ptr > + uint64_t a0, > + uint64_t a1, > + uint64_t a2, > + uint64_t b0, > + uint64_t b1, > + uint64_t b2, > + uint64_t *z0Ptr, > + uint64_t *z1Ptr, > + uint64_t *z2Ptr > ) > { > - bits64 z0, z1, z2; > + uint64_t z0, z1, z2; > int8 borrow0, borrow1; > > z2 = a2 - b2; > @@ -451,21 +451,21 @@ INLINE void > | `z0Ptr' and `z1Ptr'. > *----------------------------------------------------------------------------*/ > > -INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr ) > +INLINE void mul64To128( uint64_t a, uint64_t b, uint64_t *z0Ptr, uint64_t *z1Ptr ) > { > - bits32 aHigh, aLow, bHigh, bLow; > - bits64 z0, zMiddleA, zMiddleB, z1; > + uint32_t aHigh, aLow, bHigh, bLow; > + uint64_t z0, zMiddleA, zMiddleB, z1; > > aLow = a; > aHigh = a>>32; > bLow = b; > bHigh = b>>32; > - z1 = ( (bits64) aLow ) * bLow; > - zMiddleA = ( (bits64) aLow ) * bHigh; > - zMiddleB = ( (bits64) aHigh ) * bLow; > - z0 = ( (bits64) aHigh ) * bHigh; > + z1 = ( (uint64_t) aLow ) * bLow; > + zMiddleA = ( (uint64_t) aLow ) * bHigh; > + zMiddleB = ( (uint64_t) aHigh ) * bLow; > + z0 = ( (uint64_t) aHigh ) * bHigh; > zMiddleA += zMiddleB; > - z0 += ( ( (bits64) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 ); > + z0 += ( ( (uint64_t) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 ); > zMiddleA <<= 32; > z1 += zMiddleA; > z0 += ( z1 < zMiddleA ); > @@ -483,15 +483,15 @@ INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr ) > > INLINE void > mul128By64To192( > - bits64 a0, > - bits64 a1, > - bits64 b, > - bits64 *z0Ptr, > - bits64 *z1Ptr, > - bits64 *z2Ptr > + uint64_t a0, > + uint64_t a1, > + uint64_t b, > + uint64_t *z0Ptr, > + uint64_t *z1Ptr, > + uint64_t *z2Ptr > ) > { > - bits64 z0, z1, z2, more1; > + uint64_t z0, z1, z2, more1; > > mul64To128( a1, b, &z1, &z2 ); > mul64To128( a0, b, &z0, &more1 ); > @@ -511,18 +511,18 @@ INLINE void > > INLINE void > mul128To256( > - bits64 a0, > - bits64 a1, > - bits64 b0, > - bits64 b1, > - bits64 *z0Ptr, > - bits64 *z1Ptr, > - bits64 *z2Ptr, > - bits64 *z3Ptr > + uint64_t a0, > + uint64_t a1, > + uint64_t b0, > + uint64_t b1, > + uint64_t *z0Ptr, > + uint64_t *z1Ptr, > + uint64_t *z2Ptr, > + uint64_t *z3Ptr > ) > { > - bits64 z0, z1, z2, z3; > - bits64 more1, more2; > + uint64_t z0, z1, z2, z3; > + uint64_t more1, more2; > > mul64To128( a1, b1, &z2, &z3 ); > mul64To128( a1, b0, &z1, &more2 ); > @@ -548,18 +548,18 @@ INLINE void > | unsigned integer is returned. > *----------------------------------------------------------------------------*/ > > -static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b ) > +static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b ) > { > - bits64 b0, b1; > - bits64 rem0, rem1, term0, term1; > - bits64 z; > + uint64_t b0, b1; > + uint64_t rem0, rem1, term0, term1; > + uint64_t z; > > if ( b <= a0 ) return LIT64( 0xFFFFFFFFFFFFFFFF ); > b0 = b>>32; > z = ( b0<<32 <= a0 ) ? LIT64( 0xFFFFFFFF00000000 ) : ( a0 / b0 )<<32; > mul64To128( b, z, &term0, &term1 ); > sub128( a0, a1, term0, term1, &rem0, &rem1 ); > - while ( ( (sbits64) rem0 ) < 0 ) { > + while ( ( (int64_t) rem0 ) < 0 ) { > z -= LIT64( 0x100000000 ); > b1 = b<<32; > add128( rem0, rem1, b0, b1, &rem0, &rem1 ); > @@ -580,18 +580,18 @@ static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b ) > | value. > *----------------------------------------------------------------------------*/ > > -static bits32 estimateSqrt32( int16 aExp, bits32 a ) > +static uint32_t estimateSqrt32( int16 aExp, uint32_t a ) > { > - static const bits16 sqrtOddAdjustments[] = { > + static const uint16_t sqrtOddAdjustments[] = { > 0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0, > 0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67 > }; > - static const bits16 sqrtEvenAdjustments[] = { > + static const uint16_t sqrtEvenAdjustments[] = { > 0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E, > 0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002 > }; > int8 index; > - bits32 z; > + uint32_t z; > > index = ( a>>27 ) & 15; > if ( aExp & 1 ) { > @@ -603,9 +603,9 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) > z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ (int)index ]; > z = a / z + z; > z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 ); > - if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 ); > + if ( z <= a ) return (uint32_t) ( ( (int32_t) a )>>1 ); > } > - return ( (bits32) ( ( ( (bits64) a )<<31 ) / z ) ) + ( z>>1 ); > + return ( (uint32_t) ( ( ( (uint64_t) a )<<31 ) / z ) ) + ( z>>1 ); > > } > > @@ -614,7 +614,7 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a ) > | `a'. If `a' is zero, 32 is returned. > *----------------------------------------------------------------------------*/ > > -static int8 countLeadingZeros32( bits32 a ) > +static int8 countLeadingZeros32( uint32_t a ) > { > static const int8 countLeadingZerosHigh[] = { > 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, > @@ -655,12 +655,12 @@ static int8 countLeadingZeros32( bits32 a ) > | `a'. If `a' is zero, 64 is returned. > *----------------------------------------------------------------------------*/ > > -static int8 countLeadingZeros64( bits64 a ) > +static int8 countLeadingZeros64( uint64_t a ) > { > int8 shiftCount; > > shiftCount = 0; > - if ( a < ( (bits64) 1 )<<32 ) { > + if ( a < ( (uint64_t) 1 )<<32 ) { > shiftCount += 32; > } > else { > @@ -677,7 +677,7 @@ static int8 countLeadingZeros64( bits64 a ) > | Otherwise, returns 0. > *----------------------------------------------------------------------------*/ > > -INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) > +INLINE flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) > { > > return ( a0 == b0 ) && ( a1 == b1 ); > @@ -690,7 +690,7 @@ INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) > | Otherwise, returns 0. > *----------------------------------------------------------------------------*/ > > -INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) > +INLINE flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) > { > > return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) ); > @@ -703,7 +703,7 @@ INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) > | returns 0. > *----------------------------------------------------------------------------*/ > > -INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) > +INLINE flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) > { > > return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) ); > @@ -716,7 +716,7 @@ INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) > | Otherwise, returns 0. > *----------------------------------------------------------------------------*/ > > -INLINE flag ne128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 ) > +INLINE flag ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 ) > { > > return ( a0 != b0 ) || ( a1 != b1 ); > diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c > index 008bb53..50355a4 100644 > --- a/fpu/softfloat-native.c > +++ b/fpu/softfloat-native.c > @@ -418,7 +418,7 @@ int float64_is_quiet_nan( float64 a1 ) > u.f = a1; > a = u.i; > > - return ( LIT64( 0xFFF0000000000000 ) < (bits64) ( a<<1 ) ); > + return ( LIT64( 0xFFF0000000000000 ) < (uint64_t) ( a<<1 ) ); > > } > > @@ -500,7 +500,7 @@ int floatx80_is_signaling_nan( floatx80 a1) > aLow = u.i.low & ~ LIT64( 0x4000000000000000 ); > return > ( ( u.i.high & 0x7FFF ) == 0x7FFF ) > - && (bits64) ( aLow<<1 ) > + && (uint64_t) ( aLow<<1 ) > && ( u.i.low == aLow ); > } > > @@ -508,7 +508,7 @@ int floatx80_is_quiet_nan( floatx80 a1 ) > { > floatx80u u; > u.f = a1; > - return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( u.i.low<<1 ); > + return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( u.i.low<<1 ); > } > > #endif > diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h > index 4add93c..4b65de6 100644 > --- a/fpu/softfloat-specialize.h > +++ b/fpu/softfloat-specialize.h > @@ -52,7 +52,7 @@ void float_raise( int8 flags STATUS_PARAM ) > *----------------------------------------------------------------------------*/ > typedef struct { > flag sign; > - bits64 high, low; > + uint64_t high, low; > } commonNaNT; > > /*---------------------------------------------------------------------------- > @@ -120,7 +120,7 @@ static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM ) > if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); > z.sign = float16_val(a) >> 15; > z.low = 0; > - z.high = ((bits64) float16_val(a))<<54; > + z.high = ((uint64_t) float16_val(a))<<54; > return z; > } > > @@ -156,7 +156,7 @@ int float32_is_quiet_nan( float32 a_ ) > #if SNAN_BIT_IS_ONE > return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); > #else > - return ( 0xFF800000 <= (bits32) ( a<<1 ) ); > + return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); > #endif > } > > @@ -169,7 +169,7 @@ int float32_is_signaling_nan( float32 a_ ) > { > uint32_t a = float32_val(a_); > #if SNAN_BIT_IS_ONE > - return ( 0xFF800000 <= (bits32) ( a<<1 ) ); > + return ( 0xFF800000 <= (uint32_t) ( a<<1 ) ); > #else > return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); > #endif > @@ -190,7 +190,7 @@ float32 float32_maybe_silence_nan( float32 a_ ) > # error Rules for silencing a signaling NaN are target-specific > # endif > #else > - bits32 a = float32_val(a_); > + uint32_t a = float32_val(a_); > a |= (1 << 22); > return make_float32(a); > #endif > @@ -211,7 +211,7 @@ static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM ) > if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); > z.sign = float32_val(a)>>31; > z.low = 0; > - z.high = ( (bits64) float32_val(a) )<<41; > + z.high = ( (uint64_t) float32_val(a) )<<41; > return z; > } > > @@ -222,7 +222,7 @@ static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM ) > > static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM) > { > - bits32 mantissa = a.high>>41; > + uint32_t mantissa = a.high>>41; > > if ( STATUS(default_nan_mode) ) { > return float32_default_nan; > @@ -230,7 +230,7 @@ static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM) > > if ( mantissa ) > return make_float32( > - ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); > + ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); > else > return float32_default_nan; > } > @@ -357,7 +357,7 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) > { > flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; > flag aIsLargerSignificand; > - bits32 av, bv; > + uint32_t av, bv; > > aIsQuietNaN = float32_is_quiet_nan( a ); > aIsSignalingNaN = float32_is_signaling_nan( a ); > @@ -371,9 +371,9 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) > if ( STATUS(default_nan_mode) ) > return float32_default_nan; > > - if ((bits32)(av<<1) < (bits32)(bv<<1)) { > + if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) { > aIsLargerSignificand = 0; > - } else if ((bits32)(bv<<1) < (bits32)(av<<1)) { > + } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) { > aIsLargerSignificand = 1; > } else { > aIsLargerSignificand = (av < bv) ? 1 : 0; > @@ -394,13 +394,13 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM) > > int float64_is_quiet_nan( float64 a_ ) > { > - bits64 a = float64_val(a_); > + uint64_t a = float64_val(a_); > #if SNAN_BIT_IS_ONE > return > ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) > && ( a & LIT64( 0x0007FFFFFFFFFFFF ) ); > #else > - return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); > + return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); > #endif > } > > @@ -411,9 +411,9 @@ int float64_is_quiet_nan( float64 a_ ) > > int float64_is_signaling_nan( float64 a_ ) > { > - bits64 a = float64_val(a_); > + uint64_t a = float64_val(a_); > #if SNAN_BIT_IS_ONE > - return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) ); > + return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) ); > #else > return > ( ( ( a>>51 ) & 0xFFF ) == 0xFFE ) > @@ -436,7 +436,7 @@ float64 float64_maybe_silence_nan( float64 a_ ) > # error Rules for silencing a signaling NaN are target-specific > # endif > #else > - bits64 a = float64_val(a_); > + uint64_t a = float64_val(a_); > a |= LIT64( 0x0008000000000000 ); > return make_float64(a); > #endif > @@ -468,7 +468,7 @@ static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM) > > static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM) > { > - bits64 mantissa = a.high>>12; > + uint64_t mantissa = a.high>>12; > > if ( STATUS(default_nan_mode) ) { > return float64_default_nan; > @@ -476,7 +476,7 @@ static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM) > > if ( mantissa ) > return make_float64( > - ( ( (bits64) a.sign )<<63 ) > + ( ( (uint64_t) a.sign )<<63 ) > | LIT64( 0x7FF0000000000000 ) > | ( a.high>>12 )); > else > @@ -493,7 +493,7 @@ static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) > { > flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; > flag aIsLargerSignificand; > - bits64 av, bv; > + uint64_t av, bv; > > aIsQuietNaN = float64_is_quiet_nan( a ); > aIsSignalingNaN = float64_is_signaling_nan( a ); > @@ -507,9 +507,9 @@ static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) > if ( STATUS(default_nan_mode) ) > return float64_default_nan; > > - if ((bits64)(av<<1) < (bits64)(bv<<1)) { > + if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) { > aIsLargerSignificand = 0; > - } else if ((bits64)(bv<<1) < (bits64)(av<<1)) { > + } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) { > aIsLargerSignificand = 1; > } else { > aIsLargerSignificand = (av < bv) ? 1 : 0; > @@ -534,16 +534,16 @@ static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM) > int floatx80_is_quiet_nan( floatx80 a ) > { > #if SNAN_BIT_IS_ONE > - bits64 aLow; > + uint64_t aLow; > > aLow = a.low & ~ LIT64( 0x4000000000000000 ); > return > ( ( a.high & 0x7FFF ) == 0x7FFF ) > - && (bits64) ( aLow<<1 ) > + && (uint64_t) ( aLow<<1 ) > && ( a.low == aLow ); > #else > return ( ( a.high & 0x7FFF ) == 0x7FFF ) > - && (LIT64( 0x8000000000000000 ) <= ((bits64) ( a.low<<1 ))); > + && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 ))); > #endif > } > > @@ -557,14 +557,14 @@ int floatx80_is_signaling_nan( floatx80 a ) > { > #if SNAN_BIT_IS_ONE > return ( ( a.high & 0x7FFF ) == 0x7FFF ) > - && (LIT64( 0x8000000000000000 ) <= ((bits64) ( a.low<<1 ))); > + && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 ))); > #else > - bits64 aLow; > + uint64_t aLow; > > aLow = a.low & ~ LIT64( 0x4000000000000000 ); > return > ( ( a.high & 0x7FFF ) == 0x7FFF ) > - && (bits64) ( aLow<<1 ) > + && (uint64_t) ( aLow<<1 ) > && ( a.low == aLow ); > #endif > } > @@ -628,7 +628,7 @@ static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM) > z.low = a.high; > else > z.low = floatx80_default_nan_low; > - z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF; > + z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF; > return z; > } > > @@ -689,7 +689,7 @@ int float128_is_quiet_nan( float128 a ) > && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); > #else > return > - ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) > + ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) > && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); > #endif > } > @@ -703,7 +703,7 @@ int float128_is_signaling_nan( float128 a ) > { > #if SNAN_BIT_IS_ONE > return > - ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) ) > + ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) ) > && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) ); > #else > return > @@ -767,7 +767,7 @@ static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM) > } > > shift128Right( a.high, a.low, 16, &z.high, &z.low ); > - z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 ); > + z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 ); > return z; > } > > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index e800daa..08e4ae0 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -109,7 +109,7 @@ INLINE flag extractFloat16Sign(float16 a) > | positive or negative integer is returned. > *----------------------------------------------------------------------------*/ > > -static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) > +static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM) > { > int8 roundingMode; > flag roundNearestEven; > @@ -140,7 +140,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) > if ( zSign ) z = - z; > if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) { > float_raise( float_flag_invalid STATUS_VAR); > - return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; > + return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; > } > if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact; > return z; > @@ -159,7 +159,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM) > | returned. > *----------------------------------------------------------------------------*/ > > -static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM) > +static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 STATUS_PARAM) > { > int8 roundingMode; > flag roundNearestEven, increment; > @@ -167,7 +167,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA > > roundingMode = STATUS(float_rounding_mode); > roundNearestEven = ( roundingMode == float_round_nearest_even ); > - increment = ( (sbits64) absZ1 < 0 ); > + increment = ( (int64_t) absZ1 < 0 ); > if ( ! roundNearestEven ) { > if ( roundingMode == float_round_to_zero ) { > increment = 0; > @@ -184,7 +184,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA > if ( increment ) { > ++absZ0; > if ( absZ0 == 0 ) goto overflow; > - absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven ); > + absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven ); > } > z = absZ0; > if ( zSign ) z = - z; > @@ -192,7 +192,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA > overflow: > float_raise( float_flag_invalid STATUS_VAR); > return > - zSign ? (sbits64) LIT64( 0x8000000000000000 ) > + zSign ? (int64_t) LIT64( 0x8000000000000000 ) > : LIT64( 0x7FFFFFFFFFFFFFFF ); > } > if ( absZ1 ) STATUS(float_exception_flags) |= float_flag_inexact; > @@ -204,7 +204,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PA > | Returns the fraction bits of the single-precision floating-point value `a'. > *----------------------------------------------------------------------------*/ > > -INLINE bits32 extractFloat32Frac( float32 a ) > +INLINE uint32_t extractFloat32Frac( float32 a ) > { > > return float32_val(a) & 0x007FFFFF; > @@ -256,7 +256,7 @@ static float32 float32_squash_input_denormal(float32 a STATUS_PARAM) > *----------------------------------------------------------------------------*/ > > static void > - normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr ) > + normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr ) > { > int8 shiftCount; > > @@ -277,11 +277,11 @@ static void > | significand. > *----------------------------------------------------------------------------*/ > > -INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) > +INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig ) > { > > return make_float32( > - ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig); > + ( ( (uint32_t) zSign )<<31 ) + ( ( (uint32_t) zExp )<<23 ) + zSig); > > } > > @@ -307,7 +307,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ) > | Binary Floating-Point Arithmetic. > *----------------------------------------------------------------------------*/ > > -static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) > +static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) > { > int8 roundingMode; > flag roundNearestEven; > @@ -332,10 +332,10 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_P > } > } > roundBits = zSig & 0x7F; > - if ( 0xFD <= (bits16) zExp ) { > + if ( 0xFD <= (uint16_t) zExp ) { > if ( ( 0xFD < zExp ) > || ( ( zExp == 0xFD ) > - && ( (sbits32) ( zSig + roundIncrement ) < 0 ) ) > + && ( (int32_t) ( zSig + roundIncrement ) < 0 ) ) > ) { > float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR); > return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 )); > @@ -370,7 +370,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_P > *----------------------------------------------------------------------------*/ > > static float32 > - normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM) > + normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig STATUS_PARAM) > { > int8 shiftCount; > > @@ -383,7 +383,7 @@ static float32 > | Returns the fraction bits of the double-precision floating-point value `a'. > *----------------------------------------------------------------------------*/ > > -INLINE bits64 extractFloat64Frac( float64 a ) > +INLINE uint64_t extractFloat64Frac( float64 a ) > { > > return float64_val(a) & LIT64( 0x000FFFFFFFFFFFFF ); > @@ -435,7 +435,7 @@ static float64 float64_squash_input_denormal(float64 a STATUS_PARAM) > *----------------------------------------------------------------------------*/ > > static void > - normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr ) > + normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr ) > { > int8 shiftCount; > > @@ -456,11 +456,11 @@ static void > | significand. > *----------------------------------------------------------------------------*/ > > -INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) > +INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig ) > { > > return make_float64( > - ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig); > + ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig); > > } > > @@ -486,7 +486,7 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig ) > | Binary Floating-Point Arithmetic. > *----------------------------------------------------------------------------*/ > > -static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) > +static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) > { > int8 roundingMode; > flag roundNearestEven; > @@ -511,10 +511,10 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_P > } > } > roundBits = zSig & 0x3FF; > - if ( 0x7FD <= (bits16) zExp ) { > + if ( 0x7FD <= (uint16_t) zExp ) { > if ( ( 0x7FD < zExp ) > || ( ( zExp == 0x7FD ) > - && ( (sbits64) ( zSig + roundIncrement ) < 0 ) ) > + && ( (int64_t) ( zSig + roundIncrement ) < 0 ) ) > ) { > float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR); > return packFloat64( zSign, 0x7FF, - ( roundIncrement == 0 )); > @@ -549,7 +549,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_P > *----------------------------------------------------------------------------*/ > > static float64 > - normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig STATUS_PARAM) > + normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig STATUS_PARAM) > { > int8 shiftCount; > > @@ -565,7 +565,7 @@ static float64 > | value `a'. > *----------------------------------------------------------------------------*/ > > -INLINE bits64 extractFloatx80Frac( floatx80 a ) > +INLINE uint64_t extractFloatx80Frac( floatx80 a ) > { > > return a.low; > @@ -604,7 +604,7 @@ INLINE flag extractFloatx80Sign( floatx80 a ) > *----------------------------------------------------------------------------*/ > > static void > - normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr ) > + normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr ) > { > int8 shiftCount; > > @@ -619,12 +619,12 @@ static void > | extended double-precision floating-point value, returning the result. > *----------------------------------------------------------------------------*/ > > -INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) > +INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig ) > { > floatx80 z; > > z.low = zSig; > - z.high = ( ( (bits16) zSign )<<15 ) + zExp; > + z.high = ( ( (uint16_t) zSign )<<15 ) + zExp; > return z; > > } > @@ -655,7 +655,7 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig ) > > static floatx80 > roundAndPackFloatx80( > - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 > + int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 > STATUS_PARAM) > { > int8 roundingMode; > @@ -692,7 +692,7 @@ static floatx80 > } > } > roundBits = zSig0 & roundMask; > - if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) { > + if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) { > if ( ( 0x7FFE < zExp ) > || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) ) > ) { > @@ -710,7 +710,7 @@ static floatx80 > if ( isTiny && roundBits ) float_raise( float_flag_underflow STATUS_VAR); > if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact; > zSig0 += roundIncrement; > - if ( (sbits64) zSig0 < 0 ) zExp = 1; > + if ( (int64_t) zSig0 < 0 ) zExp = 1; > roundIncrement = roundMask + 1; > if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) { > roundMask |= roundIncrement; > @@ -733,7 +733,7 @@ static floatx80 > if ( zSig0 == 0 ) zExp = 0; > return packFloatx80( zSign, zExp, zSig0 ); > precision80: > - increment = ( (sbits64) zSig1 < 0 ); > + increment = ( (int64_t) zSig1 < 0 ); > if ( ! roundNearestEven ) { > if ( roundingMode == float_round_to_zero ) { > increment = 0; > @@ -747,7 +747,7 @@ static floatx80 > } > } > } > - if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) { > + if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) { > if ( ( 0x7FFE < zExp ) > || ( ( zExp == 0x7FFE ) > && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) ) > @@ -776,7 +776,7 @@ static floatx80 > if ( isTiny && zSig1 ) float_raise( float_flag_underflow STATUS_VAR); > if ( zSig1 ) STATUS(float_exception_flags) |= float_flag_inexact; > if ( roundNearestEven ) { > - increment = ( (sbits64) zSig1 < 0 ); > + increment = ( (int64_t) zSig1 < 0 ); > } > else { > if ( zSign ) { > @@ -789,8 +789,8 @@ static floatx80 > if ( increment ) { > ++zSig0; > zSig0 &= > - ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven ); > - if ( (sbits64) zSig0 < 0 ) zExp = 1; > + ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven ); > + if ( (int64_t) zSig0 < 0 ) zExp = 1; > } > return packFloatx80( zSign, zExp, zSig0 ); > } > @@ -803,7 +803,7 @@ static floatx80 > zSig0 = LIT64( 0x8000000000000000 ); > } > else { > - zSig0 &= ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven ); > + zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven ); > } > } > else { > @@ -824,7 +824,7 @@ static floatx80 > > static floatx80 > normalizeRoundAndPackFloatx80( > - int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 > + int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 > STATUS_PARAM) > { > int8 shiftCount; > @@ -851,7 +851,7 @@ static floatx80 > | floating-point value `a'. > *----------------------------------------------------------------------------*/ > > -INLINE bits64 extractFloat128Frac1( float128 a ) > +INLINE uint64_t extractFloat128Frac1( float128 a ) > { > > return a.low; > @@ -863,7 +863,7 @@ INLINE bits64 extractFloat128Frac1( float128 a ) > | floating-point value `a'. > *----------------------------------------------------------------------------*/ > > -INLINE bits64 extractFloat128Frac0( float128 a ) > +INLINE uint64_t extractFloat128Frac0( float128 a ) > { > > return a.high & LIT64( 0x0000FFFFFFFFFFFF ); > @@ -905,11 +905,11 @@ INLINE flag extractFloat128Sign( float128 a ) > > static void > normalizeFloat128Subnormal( > - bits64 aSig0, > - bits64 aSig1, > + uint64_t aSig0, > + uint64_t aSig1, > int32 *zExpPtr, > - bits64 *zSig0Ptr, > - bits64 *zSig1Ptr > + uint64_t *zSig0Ptr, > + uint64_t *zSig1Ptr > ) > { > int8 shiftCount; > @@ -948,12 +948,12 @@ static void > *----------------------------------------------------------------------------*/ > > INLINE float128 > - packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 ) > + packFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 ) > { > float128 z; > > z.low = zSig1; > - z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0; > + z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) + zSig0; > return z; > > } > @@ -981,14 +981,14 @@ INLINE float128 > > static float128 > roundAndPackFloat128( > - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 STATUS_PARAM) > + flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 STATUS_PARAM) > { > int8 roundingMode; > flag roundNearestEven, increment, isTiny; > > roundingMode = STATUS(float_rounding_mode); > roundNearestEven = ( roundingMode == float_round_nearest_even ); > - increment = ( (sbits64) zSig2 < 0 ); > + increment = ( (int64_t) zSig2 < 0 ); > if ( ! roundNearestEven ) { > if ( roundingMode == float_round_to_zero ) { > increment = 0; > @@ -1002,7 +1002,7 @@ static float128 > } > } > } > - if ( 0x7FFD <= (bits32) zExp ) { > + if ( 0x7FFD <= (uint32_t) zExp ) { > if ( ( 0x7FFD < zExp ) > || ( ( zExp == 0x7FFD ) > && eq128( > @@ -1046,7 +1046,7 @@ static float128 > zExp = 0; > if ( isTiny && zSig2 ) float_raise( float_flag_underflow STATUS_VAR); > if ( roundNearestEven ) { > - increment = ( (sbits64) zSig2 < 0 ); > + increment = ( (int64_t) zSig2 < 0 ); > } > else { > if ( zSign ) { > @@ -1082,10 +1082,10 @@ static float128 > > static float128 > normalizeRoundAndPackFloat128( > - flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM) > + flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM) > { > int8 shiftCount; > - bits64 zSig2; > + uint64_t zSig2; > > if ( zSig0 == 0 ) { > zSig0 = zSig1; > @@ -1119,7 +1119,7 @@ float32 int32_to_float32( int32 a STATUS_PARAM ) > flag zSign; > > if ( a == 0 ) return float32_zero; > - if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 ); > + if ( a == (int32_t) 0x80000000 ) return packFloat32( 1, 0x9E, 0 ); > zSign = ( a < 0 ); > return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a STATUS_VAR ); > > @@ -1136,7 +1136,7 @@ float64 int32_to_float64( int32 a STATUS_PARAM ) > flag zSign; > uint32 absA; > int8 shiftCount; > - bits64 zSig; > + uint64_t zSig; > > if ( a == 0 ) return float64_zero; > zSign = ( a < 0 ); > @@ -1161,7 +1161,7 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM ) > flag zSign; > uint32 absA; > int8 shiftCount; > - bits64 zSig; > + uint64_t zSig; > > if ( a == 0 ) return packFloatx80( 0, 0, 0 ); > zSign = ( a < 0 ); > @@ -1187,7 +1187,7 @@ float128 int32_to_float128( int32 a STATUS_PARAM ) > flag zSign; > uint32 absA; > int8 shiftCount; > - bits64 zSig0; > + uint64_t zSig0; > > if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); > zSign = ( a < 0 ); > @@ -1264,7 +1264,7 @@ float64 int64_to_float64( int64 a STATUS_PARAM ) > flag zSign; > > if ( a == 0 ) return float64_zero; > - if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) { > + if ( a == (int64_t) LIT64( 0x8000000000000000 ) ) { > return packFloat64( 1, 0x43E, 0 ); > } > zSign = ( a < 0 ); > @@ -1318,7 +1318,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM ) > uint64 absA; > int8 shiftCount; > int32 zExp; > - bits64 zSig0, zSig1; > + uint64_t zSig0, zSig1; > > if ( a == 0 ) return packFloat128( 0, 0, 0, 0 ); > zSign = ( a < 0 ); > @@ -1355,8 +1355,8 @@ int32 float32_to_int32( float32 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, shiftCount; > - bits32 aSig; > - bits64 aSig64; > + uint32_t aSig; > + uint64_t aSig64; > > a = float32_squash_input_denormal(a STATUS_VAR); > aSig = extractFloat32Frac( a ); > @@ -1386,7 +1386,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, shiftCount; > - bits32 aSig; > + uint32_t aSig; > int32 z; > a = float32_squash_input_denormal(a STATUS_VAR); > > @@ -1399,7 +1399,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) > float_raise( float_flag_invalid STATUS_VAR); > if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF; > } > - return (sbits32) 0x80000000; > + return (int32_t) 0x80000000; > } > else if ( aExp <= 0x7E ) { > if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; > @@ -1407,7 +1407,7 @@ int32 float32_to_int32_round_to_zero( float32 a STATUS_PARAM ) > } > aSig = ( aSig | 0x00800000 )<<8; > z = aSig>>( - shiftCount ); > - if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) { > + if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) { > STATUS(float_exception_flags) |= float_flag_inexact; > } > if ( aSign ) z = - z; > @@ -1429,7 +1429,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, shiftCount; > - bits32 aSig; > + uint32_t aSig; > int32 z; > > aSig = extractFloat32Frac( a ); > @@ -1443,7 +1443,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) > return 0x7FFF; > } > } > - return (sbits32) 0xffff8000; > + return (int32_t) 0xffff8000; > } > else if ( aExp <= 0x7E ) { > if ( aExp | aSig ) { > @@ -1454,7 +1454,7 @@ int16 float32_to_int16_round_to_zero( float32 a STATUS_PARAM ) > shiftCount -= 0x10; > aSig = ( aSig | 0x00800000 )<<8; > z = aSig>>( - shiftCount ); > - if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) { > + if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) { > STATUS(float_exception_flags) |= float_flag_inexact; > } > if ( aSign ) { > @@ -1478,8 +1478,8 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, shiftCount; > - bits32 aSig; > - bits64 aSig64, aSigExtra; > + uint32_t aSig; > + uint64_t aSig64, aSigExtra; > a = float32_squash_input_denormal(a STATUS_VAR); > > aSig = extractFloat32Frac( a ); > @@ -1491,7 +1491,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM ) > if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) { > return LIT64( 0x7FFFFFFFFFFFFFFF ); > } > - return (sbits64) LIT64( 0x8000000000000000 ); > + return (int64_t) LIT64( 0x8000000000000000 ); > } > if ( aExp ) aSig |= 0x00800000; > aSig64 = aSig; > @@ -1515,8 +1515,8 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, shiftCount; > - bits32 aSig; > - bits64 aSig64; > + uint32_t aSig; > + uint64_t aSig64; > int64 z; > a = float32_squash_input_denormal(a STATUS_VAR); > > @@ -1531,7 +1531,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) > return LIT64( 0x7FFFFFFFFFFFFFFF ); > } > } > - return (sbits64) LIT64( 0x8000000000000000 ); > + return (int64_t) LIT64( 0x8000000000000000 ); > } > else if ( aExp <= 0x7E ) { > if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; > @@ -1540,7 +1540,7 @@ int64 float32_to_int64_round_to_zero( float32 a STATUS_PARAM ) > aSig64 = aSig | 0x00800000; > aSig64 <<= 40; > z = aSig64>>( - shiftCount ); > - if ( (bits64) ( aSig64<<( shiftCount & 63 ) ) ) { > + if ( (uint64_t) ( aSig64<<( shiftCount & 63 ) ) ) { > STATUS(float_exception_flags) |= float_flag_inexact; > } > if ( aSign ) z = - z; > @@ -1559,7 +1559,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits32 aSig; > + uint32_t aSig; > a = float32_squash_input_denormal(a STATUS_VAR); > > aSig = extractFloat32Frac( a ); > @@ -1574,7 +1574,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM ) > normalizeFloat32Subnormal( aSig, &aExp, &aSig ); > --aExp; > } > - return packFloat64( aSign, aExp + 0x380, ( (bits64) aSig )<<29 ); > + return packFloat64( aSign, aExp + 0x380, ( (uint64_t) aSig )<<29 ); > > } > > @@ -1591,7 +1591,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits32 aSig; > + uint32_t aSig; > > a = float32_squash_input_denormal(a STATUS_VAR); > aSig = extractFloat32Frac( a ); > @@ -1606,7 +1606,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM ) > normalizeFloat32Subnormal( aSig, &aExp, &aSig ); > } > aSig |= 0x00800000; > - return packFloatx80( aSign, aExp + 0x3F80, ( (bits64) aSig )<<40 ); > + return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 ); > > } > > @@ -1625,7 +1625,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits32 aSig; > + uint32_t aSig; > > a = float32_squash_input_denormal(a STATUS_VAR); > aSig = extractFloat32Frac( a ); > @@ -1640,7 +1640,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM ) > normalizeFloat32Subnormal( aSig, &aExp, &aSig ); > --aExp; > } > - return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 ); > + return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 ); > > } > > @@ -1657,9 +1657,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) > { > flag aSign; > int16 aExp; > - bits32 lastBitMask, roundBitsMask; > + uint32_t lastBitMask, roundBitsMask; > int8 roundingMode; > - bits32 z; > + uint32_t z; > a = float32_squash_input_denormal(a STATUS_VAR); > > aExp = extractFloat32Exp( a ); > @@ -1670,7 +1670,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) > return a; > } > if ( aExp <= 0x7E ) { > - if ( (bits32) ( float32_val(a)<<1 ) == 0 ) return a; > + if ( (uint32_t) ( float32_val(a)<<1 ) == 0 ) return a; > STATUS(float_exception_flags) |= float_flag_inexact; > aSign = extractFloat32Sign( a ); > switch ( STATUS(float_rounding_mode) ) { > @@ -1717,7 +1717,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM) > static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) > { > int16 aExp, bExp, zExp; > - bits32 aSig, bSig, zSig; > + uint32_t aSig, bSig, zSig; > int16 expDiff; > > aSig = extractFloat32Frac( a ); > @@ -1771,7 +1771,7 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) > aSig |= 0x20000000; > zSig = ( aSig + bSig )<<1; > --zExp; > - if ( (sbits32) zSig < 0 ) { > + if ( (int32_t) zSig < 0 ) { > zSig = aSig + bSig; > ++zExp; > } > @@ -1791,7 +1791,7 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) > static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM) > { > int16 aExp, bExp, zExp; > - bits32 aSig, bSig, zSig; > + uint32_t aSig, bSig, zSig; > int16 expDiff; > > aSig = extractFloat32Frac( a ); > @@ -1911,9 +1911,9 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > int16 aExp, bExp, zExp; > - bits32 aSig, bSig; > - bits64 zSig64; > - bits32 zSig; > + uint32_t aSig, bSig; > + uint64_t zSig64; > + uint32_t zSig; > > a = float32_squash_input_denormal(a STATUS_VAR); > b = float32_squash_input_denormal(b STATUS_VAR); > @@ -1954,9 +1954,9 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM ) > zExp = aExp + bExp - 0x7F; > aSig = ( aSig | 0x00800000 )<<7; > bSig = ( bSig | 0x00800000 )<<8; > - shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 ); > + shift64RightJamming( ( (uint64_t) aSig ) * bSig, 32, &zSig64 ); > zSig = zSig64; > - if ( 0 <= (sbits32) ( zSig<<1 ) ) { > + if ( 0 <= (int32_t) ( zSig<<1 ) ) { > zSig <<= 1; > --zExp; > } > @@ -1974,7 +1974,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > int16 aExp, bExp, zExp; > - bits32 aSig, bSig, zSig; > + uint32_t aSig, bSig, zSig; > a = float32_squash_input_denormal(a STATUS_VAR); > b = float32_squash_input_denormal(b STATUS_VAR); > > @@ -2020,9 +2020,9 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM ) > aSig >>= 1; > ++zExp; > } > - zSig = ( ( (bits64) aSig )<<32 ) / bSig; > + zSig = ( ( (uint64_t) aSig )<<32 ) / bSig; > if ( ( zSig & 0x3F ) == 0 ) { > - zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 ); > + zSig |= ( (uint64_t) bSig * zSig != ( (uint64_t) aSig )<<32 ); > } > return roundAndPackFloat32( zSign, zExp, zSig STATUS_VAR ); > > @@ -2038,11 +2038,11 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) > { > flag aSign, zSign; > int16 aExp, bExp, expDiff; > - bits32 aSig, bSig; > - bits32 q; > - bits64 aSig64, bSig64, q64; > - bits32 alternateASig; > - sbits32 sigMean; > + uint32_t aSig, bSig; > + uint32_t q; > + uint64_t aSig64, bSig64, q64; > + uint32_t alternateASig; > + int32_t sigMean; > a = float32_squash_input_denormal(a STATUS_VAR); > b = float32_squash_input_denormal(b STATUS_VAR); > > @@ -2086,7 +2086,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) > q = ( bSig <= aSig ); > if ( q ) aSig -= bSig; > if ( 0 < expDiff ) { > - q = ( ( (bits64) aSig )<<32 ) / bSig; > + q = ( ( (uint64_t) aSig )<<32 ) / bSig; > q >>= 32 - expDiff; > bSig >>= 2; > aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q; > @@ -2098,8 +2098,8 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) > } > else { > if ( bSig <= aSig ) aSig -= bSig; > - aSig64 = ( (bits64) aSig )<<40; > - bSig64 = ( (bits64) bSig )<<40; > + aSig64 = ( (uint64_t) aSig )<<40; > + bSig64 = ( (uint64_t) bSig )<<40; > expDiff -= 64; > while ( 0 < expDiff ) { > q64 = estimateDiv128To64( aSig64, 0, bSig64 ); > @@ -2118,12 +2118,12 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM ) > alternateASig = aSig; > ++q; > aSig -= bSig; > - } while ( 0 <= (sbits32) aSig ); > + } while ( 0 <= (int32_t) aSig ); > sigMean = aSig + alternateASig; > if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) { > aSig = alternateASig; > } > - zSign = ( (sbits32) aSig < 0 ); > + zSign = ( (int32_t) aSig < 0 ); > if ( zSign ) aSig = - aSig; > return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig STATUS_VAR ); > > @@ -2139,8 +2139,8 @@ float32 float32_sqrt( float32 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, zExp; > - bits32 aSig, zSig; > - bits64 rem, term; > + uint32_t aSig, zSig; > + uint64_t rem, term; > a = float32_squash_input_denormal(a STATUS_VAR); > > aSig = extractFloat32Frac( a ); > @@ -2170,11 +2170,11 @@ float32 float32_sqrt( float32 a STATUS_PARAM ) > goto roundAndPack; > } > aSig >>= aExp & 1; > - term = ( (bits64) zSig ) * zSig; > - rem = ( ( (bits64) aSig )<<32 ) - term; > - while ( (sbits64) rem < 0 ) { > + term = ( (uint64_t) zSig ) * zSig; > + rem = ( ( (uint64_t) aSig )<<32 ) - term; > + while ( (int64_t) rem < 0 ) { > --zSig; > - rem += ( ( (bits64) zSig )<<1 ) | 1; > + rem += ( ( (uint64_t) zSig )<<1 ) | 1; > } > zSig |= ( rem != 0 ); > } > @@ -2225,7 +2225,7 @@ float32 float32_exp2( float32 a STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits32 aSig; > + uint32_t aSig; > float64 r, x, xn; > int i; > a = float32_squash_input_denormal(a STATUS_VAR); > @@ -2273,7 +2273,7 @@ float32 float32_log2( float32 a STATUS_PARAM ) > { > flag aSign, zSign; > int16 aExp; > - bits32 aSig, zSig, i; > + uint32_t aSig, zSig, i; > > a = float32_squash_input_denormal(a STATUS_VAR); > aSig = extractFloat32Frac( a ); > @@ -2299,7 +2299,7 @@ float32 float32_log2( float32 a STATUS_PARAM ) > zSig = aExp << 23; > > for (i = 1 << 22; i > 0; i >>= 1) { > - aSig = ( (bits64)aSig * aSig ) >> 23; > + aSig = ( (uint64_t)aSig * aSig ) >> 23; > if ( aSig & 0x01000000 ) { > aSig >>= 1; > zSig |= i; > @@ -2332,7 +2332,7 @@ int float32_eq( float32 a, float32 b STATUS_PARAM ) > return 0; > } > return ( float32_val(a) == float32_val(b) ) || > - ( (bits32) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 ); > + ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 ); > > } > > @@ -2346,7 +2346,7 @@ int float32_eq( float32 a, float32 b STATUS_PARAM ) > int float32_le( float32 a, float32 b STATUS_PARAM ) > { > flag aSign, bSign; > - bits32 av, bv; > + uint32_t av, bv; > a = float32_squash_input_denormal(a STATUS_VAR); > b = float32_squash_input_denormal(b STATUS_VAR); > > @@ -2360,7 +2360,7 @@ int float32_le( float32 a, float32 b STATUS_PARAM ) > bSign = extractFloat32Sign( b ); > av = float32_val(a); > bv = float32_val(b); > - if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 ); > + if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); > return ( av == bv ) || ( aSign ^ ( av < bv ) ); > > } > @@ -2374,7 +2374,7 @@ int float32_le( float32 a, float32 b STATUS_PARAM ) > int float32_lt( float32 a, float32 b STATUS_PARAM ) > { > flag aSign, bSign; > - bits32 av, bv; > + uint32_t av, bv; > a = float32_squash_input_denormal(a STATUS_VAR); > b = float32_squash_input_denormal(b STATUS_VAR); > > @@ -2388,7 +2388,7 @@ int float32_lt( float32 a, float32 b STATUS_PARAM ) > bSign = extractFloat32Sign( b ); > av = float32_val(a); > bv = float32_val(b); > - if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 ); > + if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 ); > return ( av != bv ) && ( aSign ^ ( av < bv ) ); > > } > @@ -2402,7 +2402,7 @@ int float32_lt( float32 a, float32 b STATUS_PARAM ) > > int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) > { > - bits32 av, bv; > + uint32_t av, bv; > a = float32_squash_input_denormal(a STATUS_VAR); > b = float32_squash_input_denormal(b STATUS_VAR); > > @@ -2414,7 +2414,7 @@ int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) > } > av = float32_val(a); > bv = float32_val(b); > - return ( av == bv ) || ( (bits32) ( ( av | bv )<<1 ) == 0 ); > + return ( av == bv ) || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); > > } > > @@ -2428,7 +2428,7 @@ int float32_eq_signaling( float32 a, float32 b STATUS_PARAM ) > int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) > { > flag aSign, bSign; > - bits32 av, bv; > + uint32_t av, bv; > a = float32_squash_input_denormal(a STATUS_VAR); > b = float32_squash_input_denormal(b STATUS_VAR); > > @@ -2444,7 +2444,7 @@ int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) > bSign = extractFloat32Sign( b ); > av = float32_val(a); > bv = float32_val(b); > - if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 ); > + if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0 ); > return ( av == bv ) || ( aSign ^ ( av < bv ) ); > > } > @@ -2459,7 +2459,7 @@ int float32_le_quiet( float32 a, float32 b STATUS_PARAM ) > int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) > { > flag aSign, bSign; > - bits32 av, bv; > + uint32_t av, bv; > a = float32_squash_input_denormal(a STATUS_VAR); > b = float32_squash_input_denormal(b STATUS_VAR); > > @@ -2475,7 +2475,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM ) > bSign = extractFloat32Sign( b ); > av = float32_val(a); > bv = float32_val(b); > - if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 ); > + if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0 ); > return ( av != bv ) && ( aSign ^ ( av < bv ) ); > > } > @@ -2494,7 +2494,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, shiftCount; > - bits64 aSig; > + uint64_t aSig; > a = float64_squash_input_denormal(a STATUS_VAR); > > aSig = extractFloat64Frac( a ); > @@ -2522,7 +2522,7 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, shiftCount; > - bits64 aSig, savedASig; > + uint64_t aSig, savedASig; > int32 z; > a = float64_squash_input_denormal(a STATUS_VAR); > > @@ -2546,7 +2546,7 @@ int32 float64_to_int32_round_to_zero( float64 a STATUS_PARAM ) > if ( ( z < 0 ) ^ aSign ) { > invalid: > float_raise( float_flag_invalid STATUS_VAR); > - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; > + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; > } > if ( ( aSig<<shiftCount ) != savedASig ) { > STATUS(float_exception_flags) |= float_flag_inexact; > @@ -2569,7 +2569,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, shiftCount; > - bits64 aSig, savedASig; > + uint64_t aSig, savedASig; > int32 z; > > aSig = extractFloat64Frac( a ); > @@ -2598,7 +2598,7 @@ int16 float64_to_int16_round_to_zero( float64 a STATUS_PARAM ) > if ( ( (int16_t)z < 0 ) ^ aSign ) { > invalid: > float_raise( float_flag_invalid STATUS_VAR); > - return aSign ? (sbits32) 0xffff8000 : 0x7FFF; > + return aSign ? (int32_t) 0xffff8000 : 0x7FFF; > } > if ( ( aSig<<shiftCount ) != savedASig ) { > STATUS(float_exception_flags) |= float_flag_inexact; > @@ -2620,7 +2620,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, shiftCount; > - bits64 aSig, aSigExtra; > + uint64_t aSig, aSigExtra; > a = float64_squash_input_denormal(a STATUS_VAR); > > aSig = extractFloat64Frac( a ); > @@ -2637,7 +2637,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM ) > ) { > return LIT64( 0x7FFFFFFFFFFFFFFF ); > } > - return (sbits64) LIT64( 0x8000000000000000 ); > + return (int64_t) LIT64( 0x8000000000000000 ); > } > aSigExtra = 0; > aSig <<= - shiftCount; > @@ -2663,7 +2663,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, shiftCount; > - bits64 aSig; > + uint64_t aSig; > int64 z; > a = float64_squash_input_denormal(a STATUS_VAR); > > @@ -2683,7 +2683,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) > return LIT64( 0x7FFFFFFFFFFFFFFF ); > } > } > - return (sbits64) LIT64( 0x8000000000000000 ); > + return (int64_t) LIT64( 0x8000000000000000 ); > } > z = aSig<<shiftCount; > } > @@ -2693,7 +2693,7 @@ int64 float64_to_int64_round_to_zero( float64 a STATUS_PARAM ) > return 0; > } > z = aSig>>( - shiftCount ); > - if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { > + if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) { > STATUS(float_exception_flags) |= float_flag_inexact; > } > } > @@ -2713,8 +2713,8 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits64 aSig; > - bits32 zSig; > + uint64_t aSig; > + uint32_t zSig; > a = float64_squash_input_denormal(a STATUS_VAR); > > aSig = extractFloat64Frac( a ); > @@ -2745,10 +2745,10 @@ float32 float64_to_float32( float64 a STATUS_PARAM ) > | than the desired result exponent whenever `zSig' is a complete, normalized > | significand. > *----------------------------------------------------------------------------*/ > -static float16 packFloat16(flag zSign, int16 zExp, bits16 zSig) > +static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig) > { > return make_float16( > - (((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig); > + (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig); > } > > /* Half precision floats come in two formats: standard IEEE and "ARM" format. > @@ -2758,7 +2758,7 @@ float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM) > { > flag aSign; > int16 aExp; > - bits32 aSig; > + uint32_t aSig; > > aSign = extractFloat16Sign(a); > aExp = extractFloat16Exp(a); > @@ -2788,9 +2788,9 @@ float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM) > { > flag aSign; > int16 aExp; > - bits32 aSig; > - bits32 mask; > - bits32 increment; > + uint32_t aSig; > + uint32_t mask; > + uint32_t increment; > int8 roundingMode; > a = float32_squash_input_denormal(a STATUS_VAR); > > @@ -2891,7 +2891,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits64 aSig; > + uint64_t aSig; > > a = float64_squash_input_denormal(a STATUS_VAR); > aSig = extractFloat64Frac( a ); > @@ -2926,7 +2926,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits64 aSig, zSig0, zSig1; > + uint64_t aSig, zSig0, zSig1; > > a = float64_squash_input_denormal(a STATUS_VAR); > aSig = extractFloat64Frac( a ); > @@ -2959,9 +2959,9 @@ float64 float64_round_to_int( float64 a STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits64 lastBitMask, roundBitsMask; > + uint64_t lastBitMask, roundBitsMask; > int8 roundingMode; > - bits64 z; > + uint64_t z; > a = float64_squash_input_denormal(a STATUS_VAR); > > aExp = extractFloat64Exp( a ); > @@ -2972,7 +2972,7 @@ float64 float64_round_to_int( float64 a STATUS_PARAM ) > return a; > } > if ( aExp < 0x3FF ) { > - if ( (bits64) ( float64_val(a)<<1 ) == 0 ) return a; > + if ( (uint64_t) ( float64_val(a)<<1 ) == 0 ) return a; > STATUS(float_exception_flags) |= float_flag_inexact; > aSign = extractFloat64Sign( a ); > switch ( STATUS(float_rounding_mode) ) { > @@ -3032,7 +3032,7 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM) > static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) > { > int16 aExp, bExp, zExp; > - bits64 aSig, bSig, zSig; > + uint64_t aSig, bSig, zSig; > int16 expDiff; > > aSig = extractFloat64Frac( a ); > @@ -3086,7 +3086,7 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) > aSig |= LIT64( 0x2000000000000000 ); > zSig = ( aSig + bSig )<<1; > --zExp; > - if ( (sbits64) zSig < 0 ) { > + if ( (int64_t) zSig < 0 ) { > zSig = aSig + bSig; > ++zExp; > } > @@ -3106,7 +3106,7 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) > static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM ) > { > int16 aExp, bExp, zExp; > - bits64 aSig, bSig, zSig; > + uint64_t aSig, bSig, zSig; > int16 expDiff; > > aSig = extractFloat64Frac( a ); > @@ -3226,7 +3226,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > int16 aExp, bExp, zExp; > - bits64 aSig, bSig, zSig0, zSig1; > + uint64_t aSig, bSig, zSig0, zSig1; > > a = float64_squash_input_denormal(a STATUS_VAR); > b = float64_squash_input_denormal(b STATUS_VAR); > @@ -3269,7 +3269,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM ) > bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11; > mul64To128( aSig, bSig, &zSig0, &zSig1 ); > zSig0 |= ( zSig1 != 0 ); > - if ( 0 <= (sbits64) ( zSig0<<1 ) ) { > + if ( 0 <= (int64_t) ( zSig0<<1 ) ) { > zSig0 <<= 1; > --zExp; > } > @@ -3287,9 +3287,9 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > int16 aExp, bExp, zExp; > - bits64 aSig, bSig, zSig; > - bits64 rem0, rem1; > - bits64 term0, term1; > + uint64_t aSig, bSig, zSig; > + uint64_t rem0, rem1; > + uint64_t term0, term1; > a = float64_squash_input_denormal(a STATUS_VAR); > b = float64_squash_input_denormal(b STATUS_VAR); > > @@ -3339,7 +3339,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM ) > if ( ( zSig & 0x1FF ) <= 2 ) { > mul64To128( bSig, zSig, &term0, &term1 ); > sub128( aSig, 0, term0, term1, &rem0, &rem1 ); > - while ( (sbits64) rem0 < 0 ) { > + while ( (int64_t) rem0 < 0 ) { > --zSig; > add128( rem0, rem1, 0, bSig, &rem0, &rem1 ); > } > @@ -3359,9 +3359,9 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) > { > flag aSign, zSign; > int16 aExp, bExp, expDiff; > - bits64 aSig, bSig; > - bits64 q, alternateASig; > - sbits64 sigMean; > + uint64_t aSig, bSig; > + uint64_t q, alternateASig; > + int64_t sigMean; > > a = float64_squash_input_denormal(a STATUS_VAR); > b = float64_squash_input_denormal(b STATUS_VAR); > @@ -3424,12 +3424,12 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM ) > alternateASig = aSig; > ++q; > aSig -= bSig; > - } while ( 0 <= (sbits64) aSig ); > + } while ( 0 <= (int64_t) aSig ); > sigMean = aSig + alternateASig; > if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) { > aSig = alternateASig; > } > - zSign = ( (sbits64) aSig < 0 ); > + zSign = ( (int64_t) aSig < 0 ); > if ( zSign ) aSig = - aSig; > return normalizeRoundAndPackFloat64( aSign ^ zSign, bExp, aSig STATUS_VAR ); > > @@ -3445,8 +3445,8 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) > { > flag aSign; > int16 aExp, zExp; > - bits64 aSig, zSig, doubleZSig; > - bits64 rem0, rem1, term0, term1; > + uint64_t aSig, zSig, doubleZSig; > + uint64_t rem0, rem1, term0, term1; > a = float64_squash_input_denormal(a STATUS_VAR); > > aSig = extractFloat64Frac( a ); > @@ -3476,7 +3476,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM ) > doubleZSig = zSig<<1; > mul64To128( zSig, zSig, &term0, &term1 ); > sub128( aSig, 0, term0, term1, &rem0, &rem1 ); > - while ( (sbits64) rem0 < 0 ) { > + while ( (int64_t) rem0 < 0 ) { > --zSig; > doubleZSig -= 2; > add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 ); > @@ -3496,7 +3496,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) > { > flag aSign, zSign; > int16 aExp; > - bits64 aSig, aSig0, aSig1, zSig, i; > + uint64_t aSig, aSig0, aSig1, zSig, i; > a = float64_squash_input_denormal(a STATUS_VAR); > > aSig = extractFloat64Frac( a ); > @@ -3519,7 +3519,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) > aExp -= 0x3FF; > aSig |= LIT64( 0x0010000000000000 ); > zSign = aExp < 0; > - zSig = (bits64)aExp << 52; > + zSig = (uint64_t)aExp << 52; > for (i = 1LL << 51; i > 0; i >>= 1) { > mul64To128( aSig, aSig, &aSig0, &aSig1 ); > aSig = ( aSig0 << 12 ) | ( aSig1 >> 52 ); > @@ -3542,7 +3542,7 @@ float64 float64_log2( float64 a STATUS_PARAM ) > > int float64_eq( float64 a, float64 b STATUS_PARAM ) > { > - bits64 av, bv; > + uint64_t av, bv; > a = float64_squash_input_denormal(a STATUS_VAR); > b = float64_squash_input_denormal(b STATUS_VAR); > > @@ -3556,7 +3556,7 @@ int float64_eq( float64 a, float64 b STATUS_PARAM ) > } > av = float64_val(a); > bv = float64_val(b); > - return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 ); > + return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); > > } > > @@ -3570,7 +3570,7 @@ int float64_eq( float64 a, float64 b STATUS_PARAM ) > int float64_le( float64 a, float64 b STATUS_PARAM ) > { > flag aSign, bSign; > - bits64 av, bv; > + uint64_t av, bv; > a = float64_squash_input_denormal(a STATUS_VAR); > b = float64_squash_input_denormal(b STATUS_VAR); > > @@ -3584,7 +3584,7 @@ int float64_le( float64 a, float64 b STATUS_PARAM ) > bSign = extractFloat64Sign( b ); > av = float64_val(a); > bv = float64_val(b); > - if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 ); > + if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); > return ( av == bv ) || ( aSign ^ ( av < bv ) ); > > } > @@ -3598,7 +3598,7 @@ int float64_le( float64 a, float64 b STATUS_PARAM ) > int float64_lt( float64 a, float64 b STATUS_PARAM ) > { > flag aSign, bSign; > - bits64 av, bv; > + uint64_t av, bv; > > a = float64_squash_input_denormal(a STATUS_VAR); > b = float64_squash_input_denormal(b STATUS_VAR); > @@ -3612,7 +3612,7 @@ int float64_lt( float64 a, float64 b STATUS_PARAM ) > bSign = extractFloat64Sign( b ); > av = float64_val(a); > bv = float64_val(b); > - if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 ); > + if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 ); > return ( av != bv ) && ( aSign ^ ( av < bv ) ); > > } > @@ -3626,7 +3626,7 @@ int float64_lt( float64 a, float64 b STATUS_PARAM ) > > int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) > { > - bits64 av, bv; > + uint64_t av, bv; > a = float64_squash_input_denormal(a STATUS_VAR); > b = float64_squash_input_denormal(b STATUS_VAR); > > @@ -3638,7 +3638,7 @@ int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) > } > av = float64_val(a); > bv = float64_val(b); > - return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 ); > + return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); > > } > > @@ -3652,7 +3652,7 @@ int float64_eq_signaling( float64 a, float64 b STATUS_PARAM ) > int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) > { > flag aSign, bSign; > - bits64 av, bv; > + uint64_t av, bv; > a = float64_squash_input_denormal(a STATUS_VAR); > b = float64_squash_input_denormal(b STATUS_VAR); > > @@ -3668,7 +3668,7 @@ int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) > bSign = extractFloat64Sign( b ); > av = float64_val(a); > bv = float64_val(b); > - if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 ); > + if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 ); > return ( av == bv ) || ( aSign ^ ( av < bv ) ); > > } > @@ -3683,7 +3683,7 @@ int float64_le_quiet( float64 a, float64 b STATUS_PARAM ) > int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) > { > flag aSign, bSign; > - bits64 av, bv; > + uint64_t av, bv; > a = float64_squash_input_denormal(a STATUS_VAR); > b = float64_squash_input_denormal(b STATUS_VAR); > > @@ -3699,7 +3699,7 @@ int float64_lt_quiet( float64 a, float64 b STATUS_PARAM ) > bSign = extractFloat64Sign( b ); > av = float64_val(a); > bv = float64_val(b); > - if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 ); > + if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 ); > return ( av != bv ) && ( aSign ^ ( av < bv ) ); > > } > @@ -3720,12 +3720,12 @@ int32 floatx80_to_int32( floatx80 a STATUS_PARAM ) > { > flag aSign; > int32 aExp, shiftCount; > - bits64 aSig; > + uint64_t aSig; > > aSig = extractFloatx80Frac( a ); > aExp = extractFloatx80Exp( a ); > aSign = extractFloatx80Sign( a ); > - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0; > + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0; > shiftCount = 0x4037 - aExp; > if ( shiftCount <= 0 ) shiftCount = 1; > shift64RightJamming( aSig, shiftCount, &aSig ); > @@ -3747,14 +3747,14 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) > { > flag aSign; > int32 aExp, shiftCount; > - bits64 aSig, savedASig; > + uint64_t aSig, savedASig; > int32 z; > > aSig = extractFloatx80Frac( a ); > aExp = extractFloatx80Exp( a ); > aSign = extractFloatx80Sign( a ); > if ( 0x401E < aExp ) { > - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0; > + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0; > goto invalid; > } > else if ( aExp < 0x3FFF ) { > @@ -3769,7 +3769,7 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a STATUS_PARAM ) > if ( ( z < 0 ) ^ aSign ) { > invalid: > float_raise( float_flag_invalid STATUS_VAR); > - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; > + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; > } > if ( ( aSig<<shiftCount ) != savedASig ) { > STATUS(float_exception_flags) |= float_flag_inexact; > @@ -3792,7 +3792,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) > { > flag aSign; > int32 aExp, shiftCount; > - bits64 aSig, aSigExtra; > + uint64_t aSig, aSigExtra; > > aSig = extractFloatx80Frac( a ); > aExp = extractFloatx80Exp( a ); > @@ -3807,7 +3807,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM ) > ) { > return LIT64( 0x7FFFFFFFFFFFFFFF ); > } > - return (sbits64) LIT64( 0x8000000000000000 ); > + return (int64_t) LIT64( 0x8000000000000000 ); > } > aSigExtra = 0; > } > @@ -3832,7 +3832,7 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) > { > flag aSign; > int32 aExp, shiftCount; > - bits64 aSig; > + uint64_t aSig; > int64 z; > > aSig = extractFloatx80Frac( a ); > @@ -3847,14 +3847,14 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a STATUS_PARAM ) > return LIT64( 0x7FFFFFFFFFFFFFFF ); > } > } > - return (sbits64) LIT64( 0x8000000000000000 ); > + return (int64_t) LIT64( 0x8000000000000000 ); > } > else if ( aExp < 0x3FFF ) { > if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact; > return 0; > } > z = aSig>>( - shiftCount ); > - if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) { > + if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) { > STATUS(float_exception_flags) |= float_flag_inexact; > } > if ( aSign ) z = - z; > @@ -3873,13 +3873,13 @@ float32 floatx80_to_float32( floatx80 a STATUS_PARAM ) > { > flag aSign; > int32 aExp; > - bits64 aSig; > + uint64_t aSig; > > aSig = extractFloatx80Frac( a ); > aExp = extractFloatx80Exp( a ); > aSign = extractFloatx80Sign( a ); > if ( aExp == 0x7FFF ) { > - if ( (bits64) ( aSig<<1 ) ) { > + if ( (uint64_t) ( aSig<<1 ) ) { > return commonNaNToFloat32( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR ); > } > return packFloat32( aSign, 0xFF, 0 ); > @@ -3901,13 +3901,13 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM ) > { > flag aSign; > int32 aExp; > - bits64 aSig, zSig; > + uint64_t aSig, zSig; > > aSig = extractFloatx80Frac( a ); > aExp = extractFloatx80Exp( a ); > aSign = extractFloatx80Sign( a ); > if ( aExp == 0x7FFF ) { > - if ( (bits64) ( aSig<<1 ) ) { > + if ( (uint64_t) ( aSig<<1 ) ) { > return commonNaNToFloat64( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR ); > } > return packFloat64( aSign, 0x7FF, 0 ); > @@ -3931,12 +3931,12 @@ float128 floatx80_to_float128( floatx80 a STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits64 aSig, zSig0, zSig1; > + uint64_t aSig, zSig0, zSig1; > > aSig = extractFloatx80Frac( a ); > aExp = extractFloatx80Exp( a ); > aSign = extractFloatx80Sign( a ); > - if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) { > + if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) { > return commonNaNToFloat128( floatx80ToCommonNaN( a STATUS_VAR ) STATUS_VAR ); > } > shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 ); > @@ -3957,27 +3957,27 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) > { > flag aSign; > int32 aExp; > - bits64 lastBitMask, roundBitsMask; > + uint64_t lastBitMask, roundBitsMask; > int8 roundingMode; > floatx80 z; > > aExp = extractFloatx80Exp( a ); > if ( 0x403E <= aExp ) { > - if ( ( aExp == 0x7FFF ) && (bits64) ( extractFloatx80Frac( a )<<1 ) ) { > + if ( ( aExp == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) { > return propagateFloatx80NaN( a, a STATUS_VAR ); > } > return a; > } > if ( aExp < 0x3FFF ) { > if ( ( aExp == 0 ) > - && ( (bits64) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) { > + && ( (uint64_t) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) { > return a; > } > STATUS(float_exception_flags) |= float_flag_inexact; > aSign = extractFloatx80Sign( a ); > switch ( STATUS(float_rounding_mode) ) { > case float_round_nearest_even: > - if ( ( aExp == 0x3FFE ) && (bits64) ( extractFloatx80Frac( a )<<1 ) > + if ( ( aExp == 0x3FFE ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) > ) { > return > packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) ); > @@ -4030,7 +4030,7 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM ) > static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM) > { > int32 aExp, bExp, zExp; > - bits64 aSig, bSig, zSig0, zSig1; > + uint64_t aSig, bSig, zSig0, zSig1; > int32 expDiff; > > aSig = extractFloatx80Frac( a ); > @@ -4040,7 +4040,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM > expDiff = aExp - bExp; > if ( 0 < expDiff ) { > if ( aExp == 0x7FFF ) { > - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > return a; > } > if ( bExp == 0 ) --expDiff; > @@ -4049,7 +4049,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM > } > else if ( expDiff < 0 ) { > if ( bExp == 0x7FFF ) { > - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); > } > if ( aExp == 0 ) ++expDiff; > @@ -4058,7 +4058,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM > } > else { > if ( aExp == 0x7FFF ) { > - if ( (bits64) ( ( aSig | bSig )<<1 ) ) { > + if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) { > return propagateFloatx80NaN( a, b STATUS_VAR ); > } > return a; > @@ -4073,7 +4073,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM > goto shiftRight1; > } > zSig0 = aSig + bSig; > - if ( (sbits64) zSig0 < 0 ) goto roundAndPack; > + if ( (int64_t) zSig0 < 0 ) goto roundAndPack; > shiftRight1: > shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 ); > zSig0 |= LIT64( 0x8000000000000000 ); > @@ -4096,7 +4096,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM > static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM ) > { > int32 aExp, bExp, zExp; > - bits64 aSig, bSig, zSig0, zSig1; > + uint64_t aSig, bSig, zSig0, zSig1; > int32 expDiff; > floatx80 z; > > @@ -4108,7 +4108,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM > if ( 0 < expDiff ) goto aExpBigger; > if ( expDiff < 0 ) goto bExpBigger; > if ( aExp == 0x7FFF ) { > - if ( (bits64) ( ( aSig | bSig )<<1 ) ) { > + if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) { > return propagateFloatx80NaN( a, b STATUS_VAR ); > } > float_raise( float_flag_invalid STATUS_VAR); > @@ -4126,7 +4126,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM > return packFloatx80( STATUS(float_rounding_mode) == float_round_down, 0, 0 ); > bExpBigger: > if ( bExp == 0x7FFF ) { > - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) ); > } > if ( aExp == 0 ) ++expDiff; > @@ -4138,7 +4138,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign STATUS_PARAM > goto normalizeRoundAndPack; > aExpBigger: > if ( aExp == 0x7FFF ) { > - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > return a; > } > if ( bExp == 0 ) --expDiff; > @@ -4205,7 +4205,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > int32 aExp, bExp, zExp; > - bits64 aSig, bSig, zSig0, zSig1; > + uint64_t aSig, bSig, zSig0, zSig1; > floatx80 z; > > aSig = extractFloatx80Frac( a ); > @@ -4216,15 +4216,15 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) > bSign = extractFloatx80Sign( b ); > zSign = aSign ^ bSign; > if ( aExp == 0x7FFF ) { > - if ( (bits64) ( aSig<<1 ) > - || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) { > + if ( (uint64_t) ( aSig<<1 ) > + || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) { > return propagateFloatx80NaN( a, b STATUS_VAR ); > } > if ( ( bExp | bSig ) == 0 ) goto invalid; > return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); > } > if ( bExp == 0x7FFF ) { > - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > if ( ( aExp | aSig ) == 0 ) { > invalid: > float_raise( float_flag_invalid STATUS_VAR); > @@ -4244,7 +4244,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b STATUS_PARAM ) > } > zExp = aExp + bExp - 0x3FFE; > mul64To128( aSig, bSig, &zSig0, &zSig1 ); > - if ( 0 < (sbits64) zSig0 ) { > + if ( 0 < (int64_t) zSig0 ) { > shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 ); > --zExp; > } > @@ -4264,8 +4264,8 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > int32 aExp, bExp, zExp; > - bits64 aSig, bSig, zSig0, zSig1; > - bits64 rem0, rem1, rem2, term0, term1, term2; > + uint64_t aSig, bSig, zSig0, zSig1; > + uint64_t rem0, rem1, rem2, term0, term1, term2; > floatx80 z; > > aSig = extractFloatx80Frac( a ); > @@ -4276,15 +4276,15 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) > bSign = extractFloatx80Sign( b ); > zSign = aSign ^ bSign; > if ( aExp == 0x7FFF ) { > - if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > + if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > if ( bExp == 0x7FFF ) { > - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > goto invalid; > } > return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); > } > if ( bExp == 0x7FFF ) { > - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > return packFloatx80( zSign, 0, 0 ); > } > if ( bExp == 0 ) { > @@ -4314,15 +4314,15 @@ floatx80 floatx80_div( floatx80 a, floatx80 b STATUS_PARAM ) > zSig0 = estimateDiv128To64( aSig, rem1, bSig ); > mul64To128( bSig, zSig0, &term0, &term1 ); > sub128( aSig, rem1, term0, term1, &rem0, &rem1 ); > - while ( (sbits64) rem0 < 0 ) { > + while ( (int64_t) rem0 < 0 ) { > --zSig0; > add128( rem0, rem1, 0, bSig, &rem0, &rem1 ); > } > zSig1 = estimateDiv128To64( rem1, 0, bSig ); > - if ( (bits64) ( zSig1<<1 ) <= 8 ) { > + if ( (uint64_t) ( zSig1<<1 ) <= 8 ) { > mul64To128( bSig, zSig1, &term1, &term2 ); > sub128( rem1, 0, term1, term2, &rem1, &rem2 ); > - while ( (sbits64) rem1 < 0 ) { > + while ( (int64_t) rem1 < 0 ) { > --zSig1; > add128( rem1, rem2, 0, bSig, &rem1, &rem2 ); > } > @@ -4344,8 +4344,8 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) > { > flag aSign, zSign; > int32 aExp, bExp, expDiff; > - bits64 aSig0, aSig1, bSig; > - bits64 q, term0, term1, alternateASig0, alternateASig1; > + uint64_t aSig0, aSig1, bSig; > + uint64_t q, term0, term1, alternateASig0, alternateASig1; > floatx80 z; > > aSig0 = extractFloatx80Frac( a ); > @@ -4354,14 +4354,14 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) > bSig = extractFloatx80Frac( b ); > bExp = extractFloatx80Exp( b ); > if ( aExp == 0x7FFF ) { > - if ( (bits64) ( aSig0<<1 ) > - || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) { > + if ( (uint64_t) ( aSig0<<1 ) > + || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) { > return propagateFloatx80NaN( a, b STATUS_VAR ); > } > goto invalid; > } > if ( bExp == 0x7FFF ) { > - if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > + if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b STATUS_VAR ); > return a; > } > if ( bExp == 0 ) { > @@ -4375,7 +4375,7 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b STATUS_PARAM ) > normalizeFloatx80Subnormal( bSig, &bExp, &bSig ); > } > if ( aExp == 0 ) { > - if ( (bits64) ( aSig0<<1 ) == 0 ) return a; > + if ( (uint64_t) ( aSig0<<1 ) == 0 ) return a; > normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 ); > } > bSig |= LIT64( 0x8000000000000000 ); > @@ -4440,15 +4440,15 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) > { > flag aSign; > int32 aExp, zExp; > - bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0; > - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; > + uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0; > + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; > floatx80 z; > > aSig0 = extractFloatx80Frac( a ); > aExp = extractFloatx80Exp( a ); > aSign = extractFloatx80Sign( a ); > if ( aExp == 0x7FFF ) { > - if ( (bits64) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a STATUS_VAR ); > + if ( (uint64_t) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a STATUS_VAR ); > if ( ! aSign ) return a; > goto invalid; > } > @@ -4471,7 +4471,7 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) > doubleZSig0 = zSig0<<1; > mul64To128( zSig0, zSig0, &term0, &term1 ); > sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 ); > - while ( (sbits64) rem0 < 0 ) { > + while ( (int64_t) rem0 < 0 ) { > --zSig0; > doubleZSig0 -= 2; > add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 ); > @@ -4483,7 +4483,7 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM ) > sub128( rem1, 0, term1, term2, &rem1, &rem2 ); > mul64To128( zSig1, zSig1, &term2, &term3 ); > sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 ); > - while ( (sbits64) rem1 < 0 ) { > + while ( (int64_t) rem1 < 0 ) { > --zSig1; > shortShift128Left( 0, zSig1, 1, &term2, &term3 ); > term3 |= 1; > @@ -4511,9 +4511,9 @@ int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM ) > { > > if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) > || ( ( extractFloatx80Exp( b ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) > ) { > if ( floatx80_is_signaling_nan( a ) > || floatx80_is_signaling_nan( b ) ) { > @@ -4525,7 +4525,7 @@ int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM ) > ( a.low == b.low ) > && ( ( a.high == b.high ) > || ( ( a.low == 0 ) > - && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) ) > + && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) ) > ); > > } > @@ -4542,9 +4542,9 @@ int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM ) > flag aSign, bSign; > > if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) > || ( ( extractFloatx80Exp( b ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) > ) { > float_raise( float_flag_invalid STATUS_VAR); > return 0; > @@ -4554,7 +4554,7 @@ int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM ) > if ( aSign != bSign ) { > return > aSign > - || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > + || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > == 0 ); > } > return > @@ -4575,9 +4575,9 @@ int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM ) > flag aSign, bSign; > > if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) > || ( ( extractFloatx80Exp( b ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) > ) { > float_raise( float_flag_invalid STATUS_VAR); > return 0; > @@ -4587,7 +4587,7 @@ int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM ) > if ( aSign != bSign ) { > return > aSign > - && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > + && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > != 0 ); > } > return > @@ -4607,9 +4607,9 @@ int floatx80_eq_signaling( floatx80 a, floatx80 b STATUS_PARAM ) > { > > if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) > || ( ( extractFloatx80Exp( b ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) > ) { > float_raise( float_flag_invalid STATUS_VAR); > return 0; > @@ -4618,7 +4618,7 @@ int floatx80_eq_signaling( floatx80 a, floatx80 b STATUS_PARAM ) > ( a.low == b.low ) > && ( ( a.high == b.high ) > || ( ( a.low == 0 ) > - && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) ) > + && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) ) > ); > > } > @@ -4635,9 +4635,9 @@ int floatx80_le_quiet( floatx80 a, floatx80 b STATUS_PARAM ) > flag aSign, bSign; > > if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) > || ( ( extractFloatx80Exp( b ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) > ) { > if ( floatx80_is_signaling_nan( a ) > || floatx80_is_signaling_nan( b ) ) { > @@ -4650,7 +4650,7 @@ int floatx80_le_quiet( floatx80 a, floatx80 b STATUS_PARAM ) > if ( aSign != bSign ) { > return > aSign > - || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > + || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > == 0 ); > } > return > @@ -4671,9 +4671,9 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) > flag aSign, bSign; > > if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( a )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) > || ( ( extractFloatx80Exp( b ) == 0x7FFF ) > - && (bits64) ( extractFloatx80Frac( b )<<1 ) ) > + && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) > ) { > if ( floatx80_is_signaling_nan( a ) > || floatx80_is_signaling_nan( b ) ) { > @@ -4686,7 +4686,7 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b STATUS_PARAM ) > if ( aSign != bSign ) { > return > aSign > - && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > + && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > != 0 ); > } > return > @@ -4713,7 +4713,7 @@ int32 float128_to_int32( float128 a STATUS_PARAM ) > { > flag aSign; > int32 aExp, shiftCount; > - bits64 aSig0, aSig1; > + uint64_t aSig0, aSig1; > > aSig1 = extractFloat128Frac1( a ); > aSig0 = extractFloat128Frac0( a ); > @@ -4742,7 +4742,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) > { > flag aSign; > int32 aExp, shiftCount; > - bits64 aSig0, aSig1, savedASig; > + uint64_t aSig0, aSig1, savedASig; > int32 z; > > aSig1 = extractFloat128Frac1( a ); > @@ -4767,7 +4767,7 @@ int32 float128_to_int32_round_to_zero( float128 a STATUS_PARAM ) > if ( ( z < 0 ) ^ aSign ) { > invalid: > float_raise( float_flag_invalid STATUS_VAR); > - return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF; > + return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; > } > if ( ( aSig0<<shiftCount ) != savedASig ) { > STATUS(float_exception_flags) |= float_flag_inexact; > @@ -4790,7 +4790,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) > { > flag aSign; > int32 aExp, shiftCount; > - bits64 aSig0, aSig1; > + uint64_t aSig0, aSig1; > > aSig1 = extractFloat128Frac1( a ); > aSig0 = extractFloat128Frac0( a ); > @@ -4808,7 +4808,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM ) > ) { > return LIT64( 0x7FFFFFFFFFFFFFFF ); > } > - return (sbits64) LIT64( 0x8000000000000000 ); > + return (int64_t) LIT64( 0x8000000000000000 ); > } > shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 ); > } > @@ -4833,7 +4833,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) > { > flag aSign; > int32 aExp, shiftCount; > - bits64 aSig0, aSig1; > + uint64_t aSig0, aSig1; > int64 z; > > aSig1 = extractFloat128Frac1( a ); > @@ -4855,10 +4855,10 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) > return LIT64( 0x7FFFFFFFFFFFFFFF ); > } > } > - return (sbits64) LIT64( 0x8000000000000000 ); > + return (int64_t) LIT64( 0x8000000000000000 ); > } > z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) ); > - if ( (bits64) ( aSig1<<shiftCount ) ) { > + if ( (uint64_t) ( aSig1<<shiftCount ) ) { > STATUS(float_exception_flags) |= float_flag_inexact; > } > } > @@ -4871,7 +4871,7 @@ int64 float128_to_int64_round_to_zero( float128 a STATUS_PARAM ) > } > z = aSig0>>( - shiftCount ); > if ( aSig1 > - || ( shiftCount && (bits64) ( aSig0<<( shiftCount & 63 ) ) ) ) { > + || ( shiftCount && (uint64_t) ( aSig0<<( shiftCount & 63 ) ) ) ) { > STATUS(float_exception_flags) |= float_flag_inexact; > } > } > @@ -4891,8 +4891,8 @@ float32 float128_to_float32( float128 a STATUS_PARAM ) > { > flag aSign; > int32 aExp; > - bits64 aSig0, aSig1; > - bits32 zSig; > + uint64_t aSig0, aSig1; > + uint32_t zSig; > > aSig1 = extractFloat128Frac1( a ); > aSig0 = extractFloat128Frac0( a ); > @@ -4926,7 +4926,7 @@ float64 float128_to_float64( float128 a STATUS_PARAM ) > { > flag aSign; > int32 aExp; > - bits64 aSig0, aSig1; > + uint64_t aSig0, aSig1; > > aSig1 = extractFloat128Frac1( a ); > aSig0 = extractFloat128Frac0( a ); > @@ -4961,7 +4961,7 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM ) > { > flag aSign; > int32 aExp; > - bits64 aSig0, aSig1; > + uint64_t aSig0, aSig1; > > aSig1 = extractFloat128Frac1( a ); > aSig0 = extractFloat128Frac0( a ); > @@ -4998,7 +4998,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) > { > flag aSign; > int32 aExp; > - bits64 lastBitMask, roundBitsMask; > + uint64_t lastBitMask, roundBitsMask; > int8 roundingMode; > float128 z; > > @@ -5023,9 +5023,9 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) > if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask; > } > else { > - if ( (sbits64) z.low < 0 ) { > + if ( (int64_t) z.low < 0 ) { > ++z.high; > - if ( (bits64) ( z.low<<1 ) == 0 ) z.high &= ~1; > + if ( (uint64_t) ( z.low<<1 ) == 0 ) z.high &= ~1; > } > } > } > @@ -5039,7 +5039,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) > } > else { > if ( aExp < 0x3FFF ) { > - if ( ( ( (bits64) ( a.high<<1 ) ) | a.low ) == 0 ) return a; > + if ( ( ( (uint64_t) ( a.high<<1 ) ) | a.low ) == 0 ) return a; > STATUS(float_exception_flags) |= float_flag_inexact; > aSign = extractFloat128Sign( a ); > switch ( STATUS(float_rounding_mode) ) { > @@ -5101,7 +5101,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM ) > static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) > { > int32 aExp, bExp, zExp; > - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; > + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; > int32 expDiff; > > aSig1 = extractFloat128Frac1( a ); > @@ -5182,7 +5182,7 @@ static float128 addFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM > static float128 subFloat128Sigs( float128 a, float128 b, flag zSign STATUS_PARAM) > { > int32 aExp, bExp, zExp; > - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; > + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1; > int32 expDiff; > float128 z; > > @@ -5307,7 +5307,7 @@ float128 float128_mul( float128 a, float128 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > int32 aExp, bExp, zExp; > - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; > + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3; > float128 z; > > aSig1 = extractFloat128Frac1( a ); > @@ -5371,8 +5371,8 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) > { > flag aSign, bSign, zSign; > int32 aExp, bExp, zExp; > - bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; > - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; > + uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2; > + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; > float128 z; > > aSig1 = extractFloat128Frac1( a ); > @@ -5426,7 +5426,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) > zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 ); > mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 ); > sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 ); > - while ( (sbits64) rem0 < 0 ) { > + while ( (int64_t) rem0 < 0 ) { > --zSig0; > add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 ); > } > @@ -5434,7 +5434,7 @@ float128 float128_div( float128 a, float128 b STATUS_PARAM ) > if ( ( zSig1 & 0x3FFF ) <= 4 ) { > mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 ); > sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 ); > - while ( (sbits64) rem1 < 0 ) { > + while ( (int64_t) rem1 < 0 ) { > --zSig1; > add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 ); > } > @@ -5455,9 +5455,9 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) > { > flag aSign, zSign; > int32 aExp, bExp, expDiff; > - bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; > - bits64 allZero, alternateASig0, alternateASig1, sigMean1; > - sbits64 sigMean0; > + uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2; > + uint64_t allZero, alternateASig0, alternateASig1, sigMean1; > + int64_t sigMean0; > float128 z; > > aSig1 = extractFloat128Frac1( a ); > @@ -5539,15 +5539,15 @@ float128 float128_rem( float128 a, float128 b STATUS_PARAM ) > alternateASig1 = aSig1; > ++q; > sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 ); > - } while ( 0 <= (sbits64) aSig0 ); > + } while ( 0 <= (int64_t) aSig0 ); > add128( > - aSig0, aSig1, alternateASig0, alternateASig1, (bits64 *)&sigMean0, &sigMean1 ); > + aSig0, aSig1, alternateASig0, alternateASig1, (uint64_t *)&sigMean0, &sigMean1 ); > if ( ( sigMean0 < 0 ) > || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) { > aSig0 = alternateASig0; > aSig1 = alternateASig1; > } > - zSign = ( (sbits64) aSig0 < 0 ); > + zSign = ( (int64_t) aSig0 < 0 ); > if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 ); > return > normalizeRoundAndPackFloat128( aSign ^ zSign, bExp - 4, aSig0, aSig1 STATUS_VAR ); > @@ -5564,8 +5564,8 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) > { > flag aSign; > int32 aExp, zExp; > - bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; > - bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3; > + uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0; > + uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; > float128 z; > > aSig1 = extractFloat128Frac1( a ); > @@ -5597,7 +5597,7 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) > doubleZSig0 = zSig0<<1; > mul64To128( zSig0, zSig0, &term0, &term1 ); > sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 ); > - while ( (sbits64) rem0 < 0 ) { > + while ( (int64_t) rem0 < 0 ) { > --zSig0; > doubleZSig0 -= 2; > add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 ); > @@ -5609,7 +5609,7 @@ float128 float128_sqrt( float128 a STATUS_PARAM ) > sub128( rem1, 0, term1, term2, &rem1, &rem2 ); > mul64To128( zSig1, zSig1, &term2, &term3 ); > sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 ); > - while ( (sbits64) rem1 < 0 ) { > + while ( (int64_t) rem1 < 0 ) { > --zSig1; > shortShift128Left( 0, zSig1, 1, &term2, &term3 ); > term3 |= 1; > @@ -5647,7 +5647,7 @@ int float128_eq( float128 a, float128 b STATUS_PARAM ) > ( a.low == b.low ) > && ( ( a.high == b.high ) > || ( ( a.low == 0 ) > - && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) ) > + && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) ) > ); > > } > @@ -5676,7 +5676,7 @@ int float128_le( float128 a, float128 b STATUS_PARAM ) > if ( aSign != bSign ) { > return > aSign > - || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > + || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > == 0 ); > } > return > @@ -5708,7 +5708,7 @@ int float128_lt( float128 a, float128 b STATUS_PARAM ) > if ( aSign != bSign ) { > return > aSign > - && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > + && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > != 0 ); > } > return > @@ -5739,7 +5739,7 @@ int float128_eq_signaling( float128 a, float128 b STATUS_PARAM ) > ( a.low == b.low ) > && ( ( a.high == b.high ) > || ( ( a.low == 0 ) > - && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) ) > + && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) ) > ); > > } > @@ -5771,7 +5771,7 @@ int float128_le_quiet( float128 a, float128 b STATUS_PARAM ) > if ( aSign != bSign ) { > return > aSign > - || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > + || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > == 0 ); > } > return > @@ -5807,7 +5807,7 @@ int float128_lt_quiet( float128 a, float128 b STATUS_PARAM ) > if ( aSign != bSign ) { > return > aSign > - && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > + && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) > != 0 ); > } > return > @@ -5965,7 +5965,7 @@ INLINE int float ## s ## _compare_internal( float ## s a, float ## s b, \ > int is_quiet STATUS_PARAM ) \ > { \ > flag aSign, bSign; \ > - bits ## s av, bv; \ > + uint ## s ## _t av, bv; \ > a = float ## s ## _squash_input_denormal(a STATUS_VAR); \ > b = float ## s ## _squash_input_denormal(b STATUS_VAR); \ > \ > @@ -5985,7 +5985,7 @@ INLINE int float ## s ## _compare_internal( float ## s a, float ## s b, \ > av = float ## s ## _val(a); \ > bv = float ## s ## _val(b); \ > if ( aSign != bSign ) { \ > - if ( (bits ## s) ( ( av | bv )<<1 ) == 0 ) { \ > + if ( (uint ## s ## _t) ( ( av | bv )<<1 ) == 0 ) { \ > /* zero case */ \ > return float_relation_equal; \ > } else { \ > @@ -6062,7 +6062,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits32 aSig; > + uint32_t aSig; > > a = float32_squash_input_denormal(a STATUS_VAR); > aSig = extractFloat32Frac( a ); > @@ -6086,7 +6086,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits64 aSig; > + uint64_t aSig; > > a = float64_squash_input_denormal(a STATUS_VAR); > aSig = extractFloat64Frac( a ); > @@ -6111,7 +6111,7 @@ floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM ) > { > flag aSign; > int16 aExp; > - bits64 aSig; > + uint64_t aSig; > > aSig = extractFloatx80Frac( a ); > aExp = extractFloatx80Exp( a ); > @@ -6134,7 +6134,7 @@ float128 float128_scalbn( float128 a, int n STATUS_PARAM ) > { > flag aSign; > int32 aExp; > - bits64 aSig0, aSig1; > + uint64_t aSig0, aSig1; > > aSig1 = extractFloat128Frac1( a ); > aSig0 = extractFloat128Frac0( a ); > diff --git a/fpu/softfloat.h b/fpu/softfloat.h > index 29492bc..5d05fa5 100644 > --- a/fpu/softfloat.h > +++ b/fpu/softfloat.h > @@ -65,21 +65,6 @@ typedef signed int int32; > typedef uint64_t uint64; > typedef int64_t int64; > > -/*---------------------------------------------------------------------------- > -| Each of the following `typedef's defines a type that holds integers > -| of _exactly_ the number of bits specified. For instance, for most > -| implementation of C, `bits16' and `sbits16' should be `typedef'ed to > -| `unsigned short int' and `signed short int' (or `short int'), respectively. > -*----------------------------------------------------------------------------*/ > -typedef uint8_t bits8; > -typedef int8_t sbits8; > -typedef uint16_t bits16; > -typedef int16_t sbits16; > -typedef uint32_t bits32; > -typedef int32_t sbits32; > -typedef uint64_t bits64; > -typedef int64_t sbits64; > - > #define LIT64( a ) a##LL > #define INLINE static inline > > -- > 1.7.3.4 > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber @ 2011-03-07 9:56 ` Aurelien Jarno 1 sibling, 0 replies; 55+ messages in thread From: Aurelien Jarno @ 2011-03-07 9:56 UTC (permalink / raw) To: Andreas Färber; +Cc: Peter Maydell, Michael Lotz, qemu-devel On Mon, Mar 07, 2011 at 01:34:05AM +0100, Andreas Färber wrote: > The original SoftFloat 2.0b library avoided the use of custom integer types > in its public headers. This requires the definitions of int{8,16,32,64} to > match the assumptions in the declarations. This breaks on BeOS R5 and Haiku/x86, > where int32 is defined in {be,os}/support/SupportDefs.h in terms of a long > rather than an int. Spotted by Michael Lotz. > > Since QEMU already breaks this distinction by defining those types just above, > do use them for consistency and to allow #ifndef'ing them out as done for > [u]int16 on AIX. > > Note that the BeOS/Haiku types are exact-width types though. > > v3: > * Split off as intermediate step. > > v2: > * Rebased. > > Cc: Michael Lotz <mmlr@mlotz.ch> > Cc: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Andreas Färber <andreas.faerber@web.de> > --- > fpu/softfloat.h | 68 +++++++++++++++++++++++++++--------------------------- > 1 files changed, 34 insertions(+), 34 deletions(-) Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> > diff --git a/fpu/softfloat.h b/fpu/softfloat.h > index 9e10727..29492bc 100644 > --- a/fpu/softfloat.h > +++ b/fpu/softfloat.h > @@ -255,25 +255,25 @@ void float_raise( int8 flags STATUS_PARAM); > /*---------------------------------------------------------------------------- > | Software IEC/IEEE integer-to-floating-point conversion routines. > *----------------------------------------------------------------------------*/ > -float32 int32_to_float32( int STATUS_PARAM ); > -float64 int32_to_float64( int STATUS_PARAM ); > +float32 int32_to_float32( int32 STATUS_PARAM ); > +float64 int32_to_float64( int32 STATUS_PARAM ); > float32 uint32_to_float32( unsigned int STATUS_PARAM ); > float64 uint32_to_float64( unsigned int STATUS_PARAM ); > #ifdef FLOATX80 > -floatx80 int32_to_floatx80( int STATUS_PARAM ); > +floatx80 int32_to_floatx80( int32 STATUS_PARAM ); > #endif > #ifdef FLOAT128 > -float128 int32_to_float128( int STATUS_PARAM ); > +float128 int32_to_float128( int32 STATUS_PARAM ); > #endif > -float32 int64_to_float32( int64_t STATUS_PARAM ); > -float32 uint64_to_float32( uint64_t STATUS_PARAM ); > -float64 int64_to_float64( int64_t STATUS_PARAM ); > -float64 uint64_to_float64( uint64_t STATUS_PARAM ); > +float32 int64_to_float32( int64 STATUS_PARAM ); > +float32 uint64_to_float32( uint64 STATUS_PARAM ); > +float64 int64_to_float64( int64 STATUS_PARAM ); > +float64 uint64_to_float64( uint64 STATUS_PARAM ); > #ifdef FLOATX80 > -floatx80 int64_to_floatx80( int64_t STATUS_PARAM ); > +floatx80 int64_to_floatx80( int64 STATUS_PARAM ); > #endif > #ifdef FLOAT128 > -float128 int64_to_float128( int64_t STATUS_PARAM ); > +float128 int64_to_float128( int64 STATUS_PARAM ); > #endif > > /*---------------------------------------------------------------------------- > @@ -303,14 +303,14 @@ float16 float16_maybe_silence_nan( float16 ); > /*---------------------------------------------------------------------------- > | Software IEC/IEEE single-precision conversion routines. > *----------------------------------------------------------------------------*/ > -int float32_to_int16_round_to_zero( float32 STATUS_PARAM ); > +int16 float32_to_int16_round_to_zero( float32 STATUS_PARAM ); > unsigned int float32_to_uint16_round_to_zero( float32 STATUS_PARAM ); > -int float32_to_int32( float32 STATUS_PARAM ); > -int float32_to_int32_round_to_zero( float32 STATUS_PARAM ); > -unsigned int float32_to_uint32( float32 STATUS_PARAM ); > -unsigned int float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); > -int64_t float32_to_int64( float32 STATUS_PARAM ); > -int64_t float32_to_int64_round_to_zero( float32 STATUS_PARAM ); > +int32 float32_to_int32( float32 STATUS_PARAM ); > +int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM ); > +uint32 float32_to_uint32( float32 STATUS_PARAM ); > +uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM ); > +int64 float32_to_int64( float32 STATUS_PARAM ); > +int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM ); > float64 float32_to_float64( float32 STATUS_PARAM ); > #ifdef FLOATX80 > floatx80 float32_to_floatx80( float32 STATUS_PARAM ); > @@ -413,16 +413,16 @@ INLINE float32 float32_set_sign(float32 a, int sign) > /*---------------------------------------------------------------------------- > | Software IEC/IEEE double-precision conversion routines. > *----------------------------------------------------------------------------*/ > -int float64_to_int16_round_to_zero( float64 STATUS_PARAM ); > +int16 float64_to_int16_round_to_zero( float64 STATUS_PARAM ); > unsigned int float64_to_uint16_round_to_zero( float64 STATUS_PARAM ); > -int float64_to_int32( float64 STATUS_PARAM ); > -int float64_to_int32_round_to_zero( float64 STATUS_PARAM ); > -unsigned int float64_to_uint32( float64 STATUS_PARAM ); > -unsigned int float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); > -int64_t float64_to_int64( float64 STATUS_PARAM ); > -int64_t float64_to_int64_round_to_zero( float64 STATUS_PARAM ); > -uint64_t float64_to_uint64 (float64 a STATUS_PARAM); > -uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM); > +int32 float64_to_int32( float64 STATUS_PARAM ); > +int32 float64_to_int32_round_to_zero( float64 STATUS_PARAM ); > +uint32 float64_to_uint32( float64 STATUS_PARAM ); > +uint32 float64_to_uint32_round_to_zero( float64 STATUS_PARAM ); > +int64 float64_to_int64( float64 STATUS_PARAM ); > +int64 float64_to_int64_round_to_zero( float64 STATUS_PARAM ); > +uint64 float64_to_uint64 (float64 a STATUS_PARAM); > +uint64 float64_to_uint64_round_to_zero (float64 a STATUS_PARAM); > float32 float64_to_float32( float64 STATUS_PARAM ); > #ifdef FLOATX80 > floatx80 float64_to_floatx80( float64 STATUS_PARAM ); > @@ -522,10 +522,10 @@ INLINE float64 float64_set_sign(float64 a, int sign) > /*---------------------------------------------------------------------------- > | Software IEC/IEEE extended double-precision conversion routines. > *----------------------------------------------------------------------------*/ > -int floatx80_to_int32( floatx80 STATUS_PARAM ); > -int floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); > -int64_t floatx80_to_int64( floatx80 STATUS_PARAM ); > -int64_t floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); > +int32 floatx80_to_int32( floatx80 STATUS_PARAM ); > +int32 floatx80_to_int32_round_to_zero( floatx80 STATUS_PARAM ); > +int64 floatx80_to_int64( floatx80 STATUS_PARAM ); > +int64 floatx80_to_int64_round_to_zero( floatx80 STATUS_PARAM ); > float32 floatx80_to_float32( floatx80 STATUS_PARAM ); > float64 floatx80_to_float64( floatx80 STATUS_PARAM ); > #ifdef FLOAT128 > @@ -605,10 +605,10 @@ INLINE int floatx80_is_any_nan(floatx80 a) > /*---------------------------------------------------------------------------- > | Software IEC/IEEE quadruple-precision conversion routines. > *----------------------------------------------------------------------------*/ > -int float128_to_int32( float128 STATUS_PARAM ); > -int float128_to_int32_round_to_zero( float128 STATUS_PARAM ); > -int64_t float128_to_int64( float128 STATUS_PARAM ); > -int64_t float128_to_int64_round_to_zero( float128 STATUS_PARAM ); > +int32 float128_to_int32( float128 STATUS_PARAM ); > +int32 float128_to_int32_round_to_zero( float128 STATUS_PARAM ); > +int64 float128_to_int64( float128 STATUS_PARAM ); > +int64 float128_to_int64_round_to_zero( float128 STATUS_PARAM ); > float32 float128_to_float32( float128 STATUS_PARAM ); > float64 float128_to_float64( float128 STATUS_PARAM ); > #ifdef FLOATX80 > -- > 1.7.3.4 > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v5 01/10] [RESEND] softfloat: Prepend QEMU-style header with derivation notice 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 01/10] [RESEND] softfloat: Prepend QEMU-style header with derivation notice Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber @ 2011-03-07 9:56 ` Aurelien Jarno 1 sibling, 0 replies; 55+ messages in thread From: Aurelien Jarno @ 2011-03-07 9:56 UTC (permalink / raw) To: Andreas Färber; +Cc: Peter Maydell, qemu-devel On Mon, Mar 07, 2011 at 01:34:04AM +0100, Andreas Färber wrote: > The SoftFloat license requires "prominent notice that the work > is derivative". Having added features like improved 16-bit support > for arm already, add such a notice to the sources. > > softfloat-native.[ch] are not under the SoftFloat license > and thus are not changed. > > v4: > Initial. > > Cc: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Andreas Färber <andreas.faerber@web.de> > --- > fpu/softfloat-macros.h | 5 +++++ > fpu/softfloat-specialize.h | 5 +++++ > fpu/softfloat.c | 5 +++++ > fpu/softfloat.h | 6 ++++++ > 4 files changed, 21 insertions(+), 0 deletions(-) Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> > diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h > index 7838228..54c0bad 100644 > --- a/fpu/softfloat-macros.h > +++ b/fpu/softfloat-macros.h > @@ -1,3 +1,8 @@ > +/* > + * QEMU float support macros > + * > + * Derived from SoftFloat. > + */ > > /*============================================================================ > > diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h > index adc5ada..4add93c 100644 > --- a/fpu/softfloat-specialize.h > +++ b/fpu/softfloat-specialize.h > @@ -1,3 +1,8 @@ > +/* > + * QEMU float support > + * > + * Derived from SoftFloat. > + */ > > /*============================================================================ > > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index 30b07e9..e800daa 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -1,3 +1,8 @@ > +/* > + * QEMU float support > + * > + * Derived from SoftFloat. > + */ > > /*============================================================================ > > diff --git a/fpu/softfloat.h b/fpu/softfloat.h > index fd61dc4..9e10727 100644 > --- a/fpu/softfloat.h > +++ b/fpu/softfloat.h > @@ -1,3 +1,9 @@ > +/* > + * QEMU float support > + * > + * Derived from SoftFloat. > + */ > + > /*============================================================================ > > This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic > -- > 1.7.3.4 > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 5/7] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber @ 2010-12-19 11:28 ` Blue Swirl 2010-12-19 12:06 ` Andreas Färber 1 sibling, 1 reply; 55+ messages in thread From: Blue Swirl @ 2010-12-19 11:28 UTC (permalink / raw) To: Andreas Färber; +Cc: Peter Maydell, Michael Lotz, qemu-devel On Sat, Dec 18, 2010 at 4:25 PM, Andreas Färber <andreas.faerber@web.de> wrote: > The original SoftFloat 2.0b library avoided the use of custom integer types > in its public headers. This requires the definitions of int{8,16,32,64} to > match the assumptions in the declarations. This breaks on BeOS R5 and Haiku/x86, > where int32 is defined in {be,os}/support/SupportDefs.h in terms of a long > rather than an int. Spotted by Michael Lotz. > > Since QEMU already breaks this distinction by defining those types just above, > do use them for consistency and to allow #ifndef'ing them out as done for > [u]int16 on AIX. > > Note that the BeOS/Haiku types are exact-width types though. > > v3: > * Split off as intermediate step. > > v2: > * Rebased. > > Cc: Michael Lotz <mmlr@mlotz.ch> > Cc: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Andreas Färber <andreas.faerber@web.de> > --- > fpu/softfloat.h | 68 +++++++++++++++++++++++++++--------------------------- > 1 files changed, 34 insertions(+), 34 deletions(-) > > diff --git a/fpu/softfloat.h b/fpu/softfloat.h > index 1c1004d..c62e769 100644 > --- a/fpu/softfloat.h > +++ b/fpu/softfloat.h > @@ -221,25 +221,25 @@ void float_raise( int8 flags STATUS_PARAM); > /*---------------------------------------------------------------------------- > | Software IEC/IEEE integer-to-floating-point conversion routines. > *----------------------------------------------------------------------------*/ > -float32 int32_to_float32( int STATUS_PARAM ); > -float64 int32_to_float64( int STATUS_PARAM ); > +float32 int32_to_float32( int32 STATUS_PARAM ); > +float64 int32_to_float64( int32 STATUS_PARAM ); > float32 uint32_to_float32( unsigned int STATUS_PARAM ); > float64 uint32_to_float64( unsigned int STATUS_PARAM ); Shouldn't these use uint32 as well? ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation 2010-12-19 11:28 ` [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation Blue Swirl @ 2010-12-19 12:06 ` Andreas Färber 0 siblings, 0 replies; 55+ messages in thread From: Andreas Färber @ 2010-12-19 12:06 UTC (permalink / raw) To: Blue Swirl; +Cc: Peter Maydell, QEMU Developers Am 19.12.2010 um 12:28 schrieb Blue Swirl: > On Sat, Dec 18, 2010 at 4:25 PM, Andreas Färber <andreas.faerber@web.de > > wrote: >> The original SoftFloat 2.0b library avoided the use of custom >> integer types >> in its public headers. This requires the definitions of >> int{8,16,32,64} to >> match the assumptions in the declarations. This breaks on BeOS R5 >> and Haiku/x86, >> where int32 is defined in {be,os}/support/SupportDefs.h in terms of >> a long >> rather than an int. Spotted by Michael Lotz. >> >> Since QEMU already breaks this distinction by defining those types >> just above, >> do use them for consistency and to allow #ifndef'ing them out as >> done for >> [u]int16 on AIX. >> >> Note that the BeOS/Haiku types are exact-width types though. >> >> v3: >> * Split off as intermediate step. >> >> v2: >> * Rebased. >> >> Cc: Michael Lotz <mmlr@mlotz.ch> >> Cc: Peter Maydell <peter.maydell@linaro.org> >> Signed-off-by: Andreas Färber <andreas.faerber@web.de> >> --- >> fpu/softfloat.h | 68 ++++++++++++++++++++++++++ >> +--------------------------- >> 1 files changed, 34 insertions(+), 34 deletions(-) >> >> diff --git a/fpu/softfloat.h b/fpu/softfloat.h >> index 1c1004d..c62e769 100644 >> --- a/fpu/softfloat.h >> +++ b/fpu/softfloat.h >> @@ -221,25 +221,25 @@ void float_raise( int8 flags STATUS_PARAM); >> / >> *---------------------------------------------------------------------------- >> | Software IEC/IEEE integer-to-floating-point conversion routines. >> >> *----------------------------------------------------------------------------*/ >> -float32 int32_to_float32( int STATUS_PARAM ); >> -float64 int32_to_float64( int STATUS_PARAM ); >> +float32 int32_to_float32( int32 STATUS_PARAM ); >> +float64 int32_to_float64( int32 STATUS_PARAM ); >> float32 uint32_to_float32( unsigned int STATUS_PARAM ); >> float64 uint32_to_float64( unsigned int STATUS_PARAM ); > > Shouldn't these use uint32 as well? As requested by Peter, I took this intermediate step to really just align declarations and implementations. I manually compared the functions and some, including the recently added int16 stuff, do use unsigned int in the implementation as well. I have not converted uint32 yet, awaiting feedback on this series, so that would go into a patch such as v3 7/7, doing the semantic change separately for bisection. Andreas ^ permalink raw reply [flat|nested] 55+ messages in thread
* [Qemu-devel] Re: [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber @ 2010-12-18 20:19 ` Juan Quintela 2010-12-20 0:52 ` Huang Ying 2 siblings, 0 replies; 55+ messages in thread From: Juan Quintela @ 2010-12-18 20:19 UTC (permalink / raw) To: Andreas Färber; +Cc: qemu-devel, Huang Ying Andreas Färber <andreas.faerber@web.de> wrote: > softfloat.h's uint64 type has least-width semantics, > which seems unintended here since uint64_t is used in helpers. > > v3: > * Split off. Acked-by: Juan Quintela <quintela@redhat.com> Some days I feel the urgency of removing all the typealiases of softfloat.h :( > Cc: Huang Ying <ying.huang@intel.com> > Cc: Juan Quintela <quintela@redhat.com> > Signed-off-by: Andreas Färber <andreas.faerber@web.de> > --- > target-i386/cpu.h | 8 ++++---- > 1 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/target-i386/cpu.h b/target-i386/cpu.h > index 06e40f3..f0c07cd 100644 > --- a/target-i386/cpu.h > +++ b/target-i386/cpu.h > @@ -737,10 +737,10 @@ typedef struct CPUX86State { > user */ > struct DeviceState *apic_state; > > - uint64 mcg_cap; > - uint64 mcg_status; > - uint64 mcg_ctl; > - uint64 mce_banks[MCE_BANKS_DEF*4]; > + uint64_t mcg_cap; > + uint64_t mcg_status; > + uint64_t mcg_ctl; > + uint64_t mce_banks[MCE_BANKS_DEF*4]; > > uint64_t tsc_aux; ^ permalink raw reply [flat|nested] 55+ messages in thread
* [Qemu-devel] Re: [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber 2010-12-18 20:19 ` [Qemu-devel] Re: [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type Juan Quintela @ 2010-12-20 0:52 ` Huang Ying 2 siblings, 0 replies; 55+ messages in thread From: Huang Ying @ 2010-12-20 0:52 UTC (permalink / raw) To: Andreas Färber; +Cc: qemu-devel@nongnu.org, Juan Quintela On Sun, 2010-12-19 at 00:25 +0800, Andreas Färber wrote: > softfloat.h's uint64 type has least-width semantics, > which seems unintended here since uint64_t is used in helpers. > > v3: > * Split off. > > Cc: Huang Ying <ying.huang@intel.com> > Cc: Juan Quintela <quintela@redhat.com> > Signed-off-by: Andreas Färber <andreas.faerber@web.de> Acked-by: Huang Ying <ying.huang@intel.com> ^ permalink raw reply [flat|nested] 55+ messages in thread
* [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type Andreas Färber @ 2010-12-18 16:47 ` Richard W.M. Jones 2010-12-19 12:51 ` Andreas Färber 1 sibling, 1 reply; 55+ messages in thread From: Richard W.M. Jones @ 2010-12-18 16:47 UTC (permalink / raw) To: Andreas Färber; +Cc: qemu-devel On Sat, Dec 18, 2010 at 05:25:26PM +0100, Andreas Färber wrote: > softfloat.h's int64 type has least-width semantics, > but this doesn't seem intended here, so use plain int64_t. > > v3: > * Split off. > > Cc: Richard W.M. Jones <rjones@redhat.com> > Signed-off-by: Andreas Färber <andreas.faerber@web.de> > --- > hw/wdt_ib700.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c > index b6235eb..1248464 100644 > --- a/hw/wdt_ib700.c > +++ b/hw/wdt_ib700.c > @@ -53,7 +53,7 @@ static void ib700_write_enable_reg(void *vp, uint32_t addr, uint32_t data) > 30, 28, 26, 24, 22, 20, 18, 16, > 14, 12, 10, 8, 6, 4, 2, 0 > }; > - int64 timeout; > + int64_t timeout; > > ib700_debug("addr = %x, data = %x\n", addr, data); The use of int64(_t) was just so that the timeout calculation in the next two lines would not overflow: timeout = (int64_t) time_map[data & 0xF] * get_ticks_per_sec(); qemu_mod_timer(s->timer, qemu_get_clock (vm_clock) + timeout); and from you say it does seem like it was a mistake to use int64 instead of int64_t. ACK. In more general terms, am I doing the timeout correctly in this code? Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones virt-top is 'top' for virtual machines. Tiny program with many powerful monitoring features, net stats, disk stats, logging, etc. http://et.redhat.com/~rjones/virt-top ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type 2010-12-18 16:47 ` [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type Richard W.M. Jones @ 2010-12-19 12:51 ` Andreas Färber 2010-12-19 14:16 ` Richard W.M. Jones 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2010-12-19 12:51 UTC (permalink / raw) To: Richard W.M. Jones; +Cc: qemu-devel Am 18.12.2010 um 17:47 schrieb Richard W.M. Jones: > On Sat, Dec 18, 2010 at 05:25:26PM +0100, Andreas Färber wrote: >> softfloat.h's int64 type has least-width semantics, >> but this doesn't seem intended here, so use plain int64_t. >> >> v3: >> * Split off. >> >> Cc: Richard W.M. Jones <rjones@redhat.com> >> Signed-off-by: Andreas Färber <andreas.faerber@web.de> >> --- >> hw/wdt_ib700.c | 2 +- >> 1 files changed, 1 insertions(+), 1 deletions(-) >> >> diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c >> index b6235eb..1248464 100644 >> --- a/hw/wdt_ib700.c >> +++ b/hw/wdt_ib700.c >> @@ -53,7 +53,7 @@ static void ib700_write_enable_reg(void *vp, >> uint32_t addr, uint32_t data) >> 30, 28, 26, 24, 22, 20, 18, 16, >> 14, 12, 10, 8, 6, 4, 2, 0 >> }; >> - int64 timeout; >> + int64_t timeout; >> >> ib700_debug("addr = %x, data = %x\n", addr, data); > > The use of int64(_t) was just so that the timeout calculation in the > next two lines would not overflow: > > timeout = (int64_t) time_map[data & 0xF] * get_ticks_per_sec(); > qemu_mod_timer(s->timer, qemu_get_clock (vm_clock) + timeout); > > and from you say it does seem like it was a mistake to use int64 > instead of int64_t. int64_t should be the right choice then. > ACK. > > In more general terms, am I doing the timeout correctly in this code? Being unfamiliar with both the timer code and this device, hard to say for me. You're taking the lower nibble of uint32_t data and indexing time_map[] with it, which contains 16 elements, so okay, upcast it to 64-bit and multiply it to ticks. Assuming that vm_clock works in ticks, adding the calculated timeout for the next expiry technically looks good. Except for the extra space. ;) Care to provide a formal Reviewed-by or Acked-by? I'd respin it for Blue with updated description. Thanks, Andreas ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type 2010-12-19 12:51 ` Andreas Färber @ 2010-12-19 14:16 ` Richard W.M. Jones 2010-12-19 14:28 ` Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Richard W.M. Jones @ 2010-12-19 14:16 UTC (permalink / raw) To: Andreas Färber; +Cc: qemu-devel On Sun, Dec 19, 2010 at 01:51:22PM +0100, Andreas Färber wrote: > Am 18.12.2010 um 17:47 schrieb Richard W.M. Jones: > > >On Sat, Dec 18, 2010 at 05:25:26PM +0100, Andreas Färber wrote: > >>softfloat.h's int64 type has least-width semantics, > >>but this doesn't seem intended here, so use plain int64_t. > >> > >>v3: > >>* Split off. > >> > >>Cc: Richard W.M. Jones <rjones@redhat.com> > >>Signed-off-by: Andreas Färber <andreas.faerber@web.de> > >>--- > >>hw/wdt_ib700.c | 2 +- > >>1 files changed, 1 insertions(+), 1 deletions(-) > >> > >>diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c > >>index b6235eb..1248464 100644 > >>--- a/hw/wdt_ib700.c > >>+++ b/hw/wdt_ib700.c > >>@@ -53,7 +53,7 @@ static void ib700_write_enable_reg(void *vp, > >>uint32_t addr, uint32_t data) > >> 30, 28, 26, 24, 22, 20, 18, 16, > >> 14, 12, 10, 8, 6, 4, 2, 0 > >> }; > >>- int64 timeout; > >>+ int64_t timeout; > >> > >> ib700_debug("addr = %x, data = %x\n", addr, data); > > > >The use of int64(_t) was just so that the timeout calculation in the > >next two lines would not overflow: > > > > timeout = (int64_t) time_map[data & 0xF] * get_ticks_per_sec(); > > qemu_mod_timer(s->timer, qemu_get_clock (vm_clock) + timeout); > > > >and from you say it does seem like it was a mistake to use int64 > >instead of int64_t. > > int64_t should be the right choice then. > > >ACK. > > > >In more general terms, am I doing the timeout correctly in this code? > > Being unfamiliar with both the timer code and this device, hard to > say for me. > You're taking the lower nibble of uint32_t data and indexing > time_map[] with it, which contains 16 elements, so okay, upcast it > to 64-bit and multiply it to ticks. Assuming that vm_clock works in > ticks, adding the calculated timeout for the next expiry technically > looks good. Except for the extra space. ;) > > Care to provide a formal Reviewed-by or Acked-by? I'd respin it for > Blue with updated description. Is it enough just to write this: Reviewed-by: Richard W.M. Jones <rjones@redhat.com> Acked-by: Richard W.M. Jones <rjones@redhat.com> or do you want me to send the updated patch with this added? Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones New in Fedora 11: Fedora Windows cross-compiler. Compile Windows programs, test, and build Windows installers. Over 70 libraries supprt'd http://fedoraproject.org/wiki/MinGW http://www.annexia.org/fedora_mingw ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type 2010-12-19 14:16 ` Richard W.M. Jones @ 2010-12-19 14:28 ` Andreas Färber 2010-12-19 14:38 ` Blue Swirl 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2010-12-19 14:28 UTC (permalink / raw) To: Richard W.M. Jones; +Cc: qemu-devel Am 19.12.2010 um 15:16 schrieb Richard W.M. Jones: > On Sun, Dec 19, 2010 at 01:51:22PM +0100, Andreas Färber wrote: >> Am 18.12.2010 um 17:47 schrieb Richard W.M. Jones: >> >>> On Sat, Dec 18, 2010 at 05:25:26PM +0100, Andreas Färber wrote: >>>> softfloat.h's int64 type has least-width semantics, >>>> but this doesn't seem intended here, so use plain int64_t. >>>> >>>> v3: >>>> * Split off. >>>> >>>> Cc: Richard W.M. Jones <rjones@redhat.com> >>>> Signed-off-by: Andreas Färber <andreas.faerber@web.de> >>>> --- >>>> hw/wdt_ib700.c | 2 +- >>>> 1 files changed, 1 insertions(+), 1 deletions(-) >>>> >>>> diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c >>>> index b6235eb..1248464 100644 >>>> --- a/hw/wdt_ib700.c >>>> +++ b/hw/wdt_ib700.c >>>> @@ -53,7 +53,7 @@ static void ib700_write_enable_reg(void *vp, >>>> uint32_t addr, uint32_t data) >>>> 30, 28, 26, 24, 22, 20, 18, 16, >>>> 14, 12, 10, 8, 6, 4, 2, 0 >>>> }; >>>> - int64 timeout; >>>> + int64_t timeout; >>>> >>>> ib700_debug("addr = %x, data = %x\n", addr, data); >>> >>> The use of int64(_t) was just so that the timeout calculation in the >>> next two lines would not overflow: >>> >>> timeout = (int64_t) time_map[data & 0xF] * get_ticks_per_sec(); >>> qemu_mod_timer(s->timer, qemu_get_clock (vm_clock) + timeout); >>> >>> and from you say it does seem like it was a mistake to use int64 >>> instead of int64_t. >> >> int64_t should be the right choice then. >> >>> ACK. >>> >>> In more general terms, am I doing the timeout correctly in this >>> code? >> >> Being unfamiliar with both the timer code and this device, hard to >> say for me. >> You're taking the lower nibble of uint32_t data and indexing >> time_map[] with it, which contains 16 elements, so okay, upcast it >> to 64-bit and multiply it to ticks. Assuming that vm_clock works in >> ticks, adding the calculated timeout for the next expiry technically >> looks good. Except for the extra space. ;) >> >> Care to provide a formal Reviewed-by or Acked-by? I'd respin it for >> Blue with updated description. > > Is it enough just to write this: > > Reviewed-by: Richard W.M. Jones <rjones@redhat.com> > Acked-by: Richard W.M. Jones <rjones@redhat.com> > > or do you want me to send the updated patch with this added? Thanks, that's sufficient! I think of Acked-by as a superset of Reviewed-by so I'll go with the former. Andreas ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type 2010-12-19 14:28 ` Andreas Färber @ 2010-12-19 14:38 ` Blue Swirl 2010-12-19 15:07 ` Andreas Färber 0 siblings, 1 reply; 55+ messages in thread From: Blue Swirl @ 2010-12-19 14:38 UTC (permalink / raw) To: Andreas Färber; +Cc: Richard W.M. Jones, qemu-devel On Sun, Dec 19, 2010 at 2:28 PM, Andreas Färber <andreas.faerber@web.de> wrote: > Am 19.12.2010 um 15:16 schrieb Richard W.M. Jones: > >> On Sun, Dec 19, 2010 at 01:51:22PM +0100, Andreas Färber wrote: >>> >>> Am 18.12.2010 um 17:47 schrieb Richard W.M. Jones: >>> >>>> On Sat, Dec 18, 2010 at 05:25:26PM +0100, Andreas Färber wrote: >>>>> >>>>> softfloat.h's int64 type has least-width semantics, >>>>> but this doesn't seem intended here, so use plain int64_t. >>>>> >>>>> v3: >>>>> * Split off. >>>>> >>>>> Cc: Richard W.M. Jones <rjones@redhat.com> >>>>> Signed-off-by: Andreas Färber <andreas.faerber@web.de> >>>>> --- >>>>> hw/wdt_ib700.c | 2 +- >>>>> 1 files changed, 1 insertions(+), 1 deletions(-) >>>>> >>>>> diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c >>>>> index b6235eb..1248464 100644 >>>>> --- a/hw/wdt_ib700.c >>>>> +++ b/hw/wdt_ib700.c >>>>> @@ -53,7 +53,7 @@ static void ib700_write_enable_reg(void *vp, >>>>> uint32_t addr, uint32_t data) >>>>> 30, 28, 26, 24, 22, 20, 18, 16, >>>>> 14, 12, 10, 8, 6, 4, 2, 0 >>>>> }; >>>>> - int64 timeout; >>>>> + int64_t timeout; >>>>> >>>>> ib700_debug("addr = %x, data = %x\n", addr, data); >>>> >>>> The use of int64(_t) was just so that the timeout calculation in the >>>> next two lines would not overflow: >>>> >>>> timeout = (int64_t) time_map[data & 0xF] * get_ticks_per_sec(); >>>> qemu_mod_timer(s->timer, qemu_get_clock (vm_clock) + timeout); >>>> >>>> and from you say it does seem like it was a mistake to use int64 >>>> instead of int64_t. >>> >>> int64_t should be the right choice then. >>> >>>> ACK. >>>> >>>> In more general terms, am I doing the timeout correctly in this code? >>> >>> Being unfamiliar with both the timer code and this device, hard to >>> say for me. >>> You're taking the lower nibble of uint32_t data and indexing >>> time_map[] with it, which contains 16 elements, so okay, upcast it >>> to 64-bit and multiply it to ticks. Assuming that vm_clock works in >>> ticks, adding the calculated timeout for the next expiry technically >>> looks good. Except for the extra space. ;) >>> >>> Care to provide a formal Reviewed-by or Acked-by? I'd respin it for >>> Blue with updated description. >> >> Is it enough just to write this: >> >> Reviewed-by: Richard W.M. Jones <rjones@redhat.com> >> Acked-by: Richard W.M. Jones <rjones@redhat.com> >> >> or do you want me to send the updated patch with this added? > > Thanks, that's sufficient! I think of Acked-by as a superset of Reviewed-by > so I'll go with the former. No, Acked-by tag does not mean much but Reviewed-by carries a lot of weight: http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=Documentation/SubmittingPatches;h=689e2371095cc5dfea9927120009341f369159aa;hb=HEAD#l423 ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type 2010-12-19 14:38 ` Blue Swirl @ 2010-12-19 15:07 ` Andreas Färber 2010-12-19 15:17 ` Blue Swirl 0 siblings, 1 reply; 55+ messages in thread From: Andreas Färber @ 2010-12-19 15:07 UTC (permalink / raw) To: Blue Swirl; +Cc: Richard W.M. Jones, QEMU Developers Am 19.12.2010 um 15:38 schrieb Blue Swirl: > On Sun, Dec 19, 2010 at 2:28 PM, Andreas Färber <andreas.faerber@web.de > > wrote: >> Am 19.12.2010 um 15:16 schrieb Richard W.M. Jones: >> >>> On Sun, Dec 19, 2010 at 01:51:22PM +0100, Andreas Färber wrote: >>>> >>>> Am 18.12.2010 um 17:47 schrieb Richard W.M. Jones: >>>> >>>>> On Sat, Dec 18, 2010 at 05:25:26PM +0100, Andreas Färber wrote: >>>>>> >>>>>> softfloat.h's int64 type has least-width semantics, >>>>>> but this doesn't seem intended here, so use plain int64_t. >>>>>> >>>>>> v3: >>>>>> * Split off. >>>>>> >>>>>> Cc: Richard W.M. Jones <rjones@redhat.com> >>>>>> Signed-off-by: Andreas Färber <andreas.faerber@web.de> >>>>>> --- >>>>>> hw/wdt_ib700.c | 2 +- >>>>>> 1 files changed, 1 insertions(+), 1 deletions(-) >>>>>> >>>>>> diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c >>>>>> index b6235eb..1248464 100644 >>>>>> --- a/hw/wdt_ib700.c >>>>>> +++ b/hw/wdt_ib700.c >>>>>> @@ -53,7 +53,7 @@ static void ib700_write_enable_reg(void *vp, >>>>>> uint32_t addr, uint32_t data) >>>>>> 30, 28, 26, 24, 22, 20, 18, 16, >>>>>> 14, 12, 10, 8, 6, 4, 2, 0 >>>>>> }; >>>>>> - int64 timeout; >>>>>> + int64_t timeout; >>>>>> >>>>>> ib700_debug("addr = %x, data = %x\n", addr, data); >>>>> >>>>> The use of int64(_t) was just so that the timeout calculation in >>>>> the >>>>> next two lines would not overflow: >>>>> >>>>> timeout = (int64_t) time_map[data & 0xF] * get_ticks_per_sec(); >>>>> qemu_mod_timer(s->timer, qemu_get_clock (vm_clock) + timeout); >>>>> >>>>> and from you say it does seem like it was a mistake to use int64 >>>>> instead of int64_t. >>>> >>>> int64_t should be the right choice then. >>>> >>>>> ACK. >>>>> >>>>> In more general terms, am I doing the timeout correctly in this >>>>> code? >>>> >>>> Being unfamiliar with both the timer code and this device, hard to >>>> say for me. >>>> You're taking the lower nibble of uint32_t data and indexing >>>> time_map[] with it, which contains 16 elements, so okay, upcast it >>>> to 64-bit and multiply it to ticks. Assuming that vm_clock works in >>>> ticks, adding the calculated timeout for the next expiry >>>> technically >>>> looks good. Except for the extra space. ;) >>>> >>>> Care to provide a formal Reviewed-by or Acked-by? I'd respin it for >>>> Blue with updated description. >>> >>> Is it enough just to write this: >>> >>> Reviewed-by: Richard W.M. Jones <rjones@redhat.com> >>> Acked-by: Richard W.M. Jones <rjones@redhat.com> >>> >>> or do you want me to send the updated patch with this added? >> >> Thanks, that's sufficient! I think of Acked-by as a superset of >> Reviewed-by >> so I'll go with the former. > > No, Acked-by tag does not mean much but Reviewed-by carries a lot of > weight: > http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=Documentation/SubmittingPatches;h=689e2371095cc5dfea9927120009341f369159aa;hb=HEAD#l423 So, should I add both or just Reviewed-by or relieve him of the weight? :) ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type 2010-12-19 15:07 ` Andreas Färber @ 2010-12-19 15:17 ` Blue Swirl 0 siblings, 0 replies; 55+ messages in thread From: Blue Swirl @ 2010-12-19 15:17 UTC (permalink / raw) To: Andreas Färber; +Cc: Richard W.M. Jones, QEMU Developers On Sun, Dec 19, 2010 at 3:07 PM, Andreas Färber <andreas.faerber@web.de> wrote: > Am 19.12.2010 um 15:38 schrieb Blue Swirl: > >> On Sun, Dec 19, 2010 at 2:28 PM, Andreas Färber <andreas.faerber@web.de> >> wrote: >>> >>> Am 19.12.2010 um 15:16 schrieb Richard W.M. Jones: >>> >>>> On Sun, Dec 19, 2010 at 01:51:22PM +0100, Andreas Färber wrote: >>>>> >>>>> Am 18.12.2010 um 17:47 schrieb Richard W.M. Jones: >>>>> >>>>>> On Sat, Dec 18, 2010 at 05:25:26PM +0100, Andreas Färber wrote: >>>>>>> >>>>>>> softfloat.h's int64 type has least-width semantics, >>>>>>> but this doesn't seem intended here, so use plain int64_t. >>>>>>> >>>>>>> v3: >>>>>>> * Split off. >>>>>>> >>>>>>> Cc: Richard W.M. Jones <rjones@redhat.com> >>>>>>> Signed-off-by: Andreas Färber <andreas.faerber@web.de> >>>>>>> --- >>>>>>> hw/wdt_ib700.c | 2 +- >>>>>>> 1 files changed, 1 insertions(+), 1 deletions(-) >>>>>>> >>>>>>> diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c >>>>>>> index b6235eb..1248464 100644 >>>>>>> --- a/hw/wdt_ib700.c >>>>>>> +++ b/hw/wdt_ib700.c >>>>>>> @@ -53,7 +53,7 @@ static void ib700_write_enable_reg(void *vp, >>>>>>> uint32_t addr, uint32_t data) >>>>>>> 30, 28, 26, 24, 22, 20, 18, 16, >>>>>>> 14, 12, 10, 8, 6, 4, 2, 0 >>>>>>> }; >>>>>>> - int64 timeout; >>>>>>> + int64_t timeout; >>>>>>> >>>>>>> ib700_debug("addr = %x, data = %x\n", addr, data); >>>>>> >>>>>> The use of int64(_t) was just so that the timeout calculation in the >>>>>> next two lines would not overflow: >>>>>> >>>>>> timeout = (int64_t) time_map[data & 0xF] * get_ticks_per_sec(); >>>>>> qemu_mod_timer(s->timer, qemu_get_clock (vm_clock) + timeout); >>>>>> >>>>>> and from you say it does seem like it was a mistake to use int64 >>>>>> instead of int64_t. >>>>> >>>>> int64_t should be the right choice then. >>>>> >>>>>> ACK. >>>>>> >>>>>> In more general terms, am I doing the timeout correctly in this code? >>>>> >>>>> Being unfamiliar with both the timer code and this device, hard to >>>>> say for me. >>>>> You're taking the lower nibble of uint32_t data and indexing >>>>> time_map[] with it, which contains 16 elements, so okay, upcast it >>>>> to 64-bit and multiply it to ticks. Assuming that vm_clock works in >>>>> ticks, adding the calculated timeout for the next expiry technically >>>>> looks good. Except for the extra space. ;) >>>>> >>>>> Care to provide a formal Reviewed-by or Acked-by? I'd respin it for >>>>> Blue with updated description. >>>> >>>> Is it enough just to write this: >>>> >>>> Reviewed-by: Richard W.M. Jones <rjones@redhat.com> >>>> Acked-by: Richard W.M. Jones <rjones@redhat.com> >>>> >>>> or do you want me to send the updated patch with this added? >>> >>> Thanks, that's sufficient! I think of Acked-by as a superset of >>> Reviewed-by >>> so I'll go with the former. >> >> No, Acked-by tag does not mean much but Reviewed-by carries a lot of >> weight: >> >> http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=Documentation/SubmittingPatches;h=689e2371095cc5dfea9927120009341f369159aa;hb=HEAD#l423 > > So, should I add both or just Reviewed-by or relieve him of the weight? :) As you wish ;-) I'd suppose that in theory, a patch submitter could choose to ignore tags offered by untrustworthy reviewers or ackers, though I don't see much advantage for doing that since they are sharing some responsibility for the patch. ^ permalink raw reply [flat|nested] 55+ messages in thread
* Re: [Qemu-devel] [PATCH v3 1/7] apic: Don't use SoftFloat uint32 type 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 1/7] apic: Don't use SoftFloat uint32 type Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type Andreas Färber @ 2010-12-19 11:20 ` Blue Swirl 1 sibling, 0 replies; 55+ messages in thread From: Blue Swirl @ 2010-12-19 11:20 UTC (permalink / raw) To: Andreas Färber; +Cc: qemu-devel On Sat, Dec 18, 2010 at 4:25 PM, Andreas Färber <andreas.faerber@web.de> wrote: > softfloat.h's uint32 type has least-width semantics, > whereas surrounding code uses uint32_t, so use uint32_t too. I think patches 1 to 3 don't have much to do with softfloat, the type uses are just general sloppiness to use non-standard types instead of deliberate softfloat type use. So if there is a respin for some reason, please split off those from the softfloat patches and adjust the descriptions. Otherwise, if the patches are going to be applied, splitting is not necessary. ^ permalink raw reply [flat|nested] 55+ messages in thread
end of thread, other threads:[~2011-03-21 21:11 UTC | newest] Thread overview: 55+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2010-12-17 17:31 [Qemu-devel] [PATCH] softfloat: Fix function signature mismatches by using POSIX integer types Andreas Färber 2010-12-17 22:39 ` [Qemu-devel] [PATCH v2] " Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 1/7] apic: Don't use SoftFloat uint32 type Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 5/7] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 6/7] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber 2010-12-18 16:25 ` [Qemu-devel] [PATCH v3 7/7] softfloat: Make float{32, 64}_to_uint16_round_to_zero() use uint_fast16_t Andreas Färber 2011-01-01 13:47 ` Andreas Färber 2011-01-04 19:39 ` [Qemu-devel] [PATCH, RFC v4 1/5] softfloat: Prepend QEMU-style header with derivation notice Andreas Färber 2011-01-04 19:39 ` [Qemu-devel] [PATCH v4 2/5] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber 2011-01-04 19:39 ` [Qemu-devel] [PATCH v4 3/5] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber 2011-01-04 19:39 ` [Qemu-devel] [PATCH v4 4/5] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber 2011-01-04 19:39 ` [Qemu-devel] [FYI v4 5/5] softfloat: Make float{32, 64}_to_uint16_round_to_zero() use uint_fast16_t Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 01/10] [RESEND] softfloat: Prepend QEMU-style header with derivation notice Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 05/10] softfloat: Use [u]int_fast16_t consistently Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 06/10] softfloat: Drop [u]int8 types in favor of int_fast8_t Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 08/10] softfloat: Use [u]int_fast32_t consistently Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 09/10] softfloat: Drop [u]int64 types in favor of [u]int_fast64_t Andreas Färber 2011-03-07 0:34 ` [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently Andreas Färber 2011-03-07 9:56 ` Aurelien Jarno 2011-03-07 23:10 ` Andreas Färber 2011-03-08 6:04 ` Aurelien Jarno 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t Aurelien Jarno 2011-03-07 23:16 ` Andreas Färber 2011-03-07 23:33 ` Aurelien Jarno 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t Aurelien Jarno 2011-03-07 23:02 ` Andreas Färber 2011-03-07 23:28 ` Aurelien Jarno 2011-03-07 23:14 ` Peter Maydell 2011-03-07 23:37 ` Aurelien Jarno 2011-03-08 8:29 ` Peter Maydell 2011-03-08 8:49 ` Aurelien Jarno 2011-03-08 18:54 ` Andreas Färber 2011-03-21 21:11 ` Aurelien Jarno 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t Aurelien Jarno 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation Aurelien Jarno 2011-03-07 9:56 ` [Qemu-devel] [PATCH v5 01/10] [RESEND] softfloat: Prepend QEMU-style header with derivation notice Aurelien Jarno 2010-12-19 11:28 ` [Qemu-devel] [PATCH v3 4/7] softfloat: Resolve type mismatches between declaration and implementation Blue Swirl 2010-12-19 12:06 ` Andreas Färber 2010-12-18 20:19 ` [Qemu-devel] Re: [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type Juan Quintela 2010-12-20 0:52 ` Huang Ying 2010-12-18 16:47 ` [Qemu-devel] Re: [PATCH v3 2/7] wdt_ib700: Don't use SoftFloat int64 type Richard W.M. Jones 2010-12-19 12:51 ` Andreas Färber 2010-12-19 14:16 ` Richard W.M. Jones 2010-12-19 14:28 ` Andreas Färber 2010-12-19 14:38 ` Blue Swirl 2010-12-19 15:07 ` Andreas Färber 2010-12-19 15:17 ` Blue Swirl 2010-12-19 11:20 ` [Qemu-devel] [PATCH v3 1/7] apic: Don't use SoftFloat uint32 type Blue Swirl
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