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From: Huang Ying <ying.huang@intel.com>
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Date: Wed, 05 Jan 2011 14:42:31 +0800
Message-ID: <1294209751.22308.337.camel@yhuang-dev>
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Subject: [Qemu-devel] Re: [PATCH v3 12/21] kvm: x86: Drop MCE MSRs write back
 restrictions
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To: Jan Kiszka <jan.kiszka@web.de>
Cc: Marcelo Tosatti <mtosatti@redhat.com>, Avi Kivity <avi@redhat.com>, "kvm@vger.kernel.org" <kvm@vger.kernel.org>, "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>

On Tue, 2011-01-04 at 16:32 +0800, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@siemens.com>
> 
> There is no need to restrict writing back MCE MSRs to reset or full
> state updates as setting their values has no side effects.

Sorry for late.

The MCE MSRs contents is sticky for warm reset except MCG_STATUS, so
their content should be kept.  And the following sequence may set
uncorrected value in MCE registers.

savevm -> loadvm -> (OS clear MCE registers) -> reset -> (MCE registers
has new (uncorrected) value)

Best Regards,
Huang Ying

> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> CC: Huang Ying <ying.huang@intel.com>
> ---
>  target-i386/kvm.c |   12 ++++--------
>  1 files changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index 8267655..1789bff 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -863,14 +863,10 @@ static int kvm_put_msrs(CPUState *env, int level)
>      if (env->mcg_cap) {
>          int i;
>  
> -        if (level == KVM_PUT_RESET_STATE) {
> -            kvm_msr_entry_set(&msrs[n++], MSR_MCG_STATUS, env->mcg_status);
> -        } else if (level == KVM_PUT_FULL_STATE) {
> -            kvm_msr_entry_set(&msrs[n++], MSR_MCG_STATUS, env->mcg_status);
> -            kvm_msr_entry_set(&msrs[n++], MSR_MCG_CTL, env->mcg_ctl);
> -            for (i = 0; i < (env->mcg_cap & 0xff) * 4; i++) {
> -                kvm_msr_entry_set(&msrs[n++], MSR_MC0_CTL + i, env->mce_banks[i]);
> -            }
> +        kvm_msr_entry_set(&msrs[n++], MSR_MCG_STATUS, env->mcg_status);
> +        kvm_msr_entry_set(&msrs[n++], MSR_MCG_CTL, env->mcg_ctl);
> +        for (i = 0; i < (env->mcg_cap & 0xff) * 4; i++) {
> +            kvm_msr_entry_set(&msrs[n++], MSR_MC0_CTL + i, env->mce_banks[i]);
>          }
>      }
>  #endif