From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=60551 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PbDts-0001MY-D7 for qemu-devel@nongnu.org; Fri, 07 Jan 2011 10:06:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PbDtq-0003kX-Lj for qemu-devel@nongnu.org; Fri, 07 Jan 2011 10:06:44 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:44803) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PbDtq-0003jc-F5 for qemu-devel@nongnu.org; Fri, 07 Jan 2011 10:06:42 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.69) (envelope-from ) id 1PbDti-0006et-Fq for qemu-devel@nongnu.org; Fri, 07 Jan 2011 15:06:34 +0000 From: Peter Maydell Date: Fri, 7 Jan 2011 15:06:27 +0000 Message-Id: <1294412794-25573-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 0/7] target-arm: Translate based on TB flags, not CPUState List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This patchset corrects a number of places in the ARM translation code which were generating code which was dependent on values in the CPUState structure which might change at runtime. This is a bad idea for two reasons. Firstly, we might try to reuse the generated code later when the assumptions baked into the generated code were no longer valid. Secondly, we might try to retranslate the same TB (eg when an exception results in our calling cpu_restore_state()) but get different generated code, which could result in qemu crashing. Bug https://bugs.launchpad.net/bugs/604872 is a particular example of the latter case involving the IT bits; this patchset fixes that bug. I believe that this patchset deals with all the problems. Remaining CPUState fields referred to in translate.c are either constant after system init or trigger flushing of affected TBs when they are changed. Peter Maydell (7): target-arm: Don't generate code specific to current CPU mode for SRS target-arm: Translate with VFP-enabled from TB flags, not CPUState target-arm: Translate with VFP len/stride from TB flags, not CPUState target-arm: Translate with Thumb state from TB flags, not CPUState target-arm: Translate with condexec bits from TB flags, not CPUState target-arm: Set privileged bit in TB flags correctly for M profile target-arm: Translate with user-state from TB flags, not CPUState target-arm/cpu.h | 17 +++++++++- target-arm/helper.c | 12 +++++- target-arm/translate.c | 88 ++++++++++++++++++----------------------------- 3 files changed, 60 insertions(+), 57 deletions(-)