From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=37274 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PcmS9-0008HQ-8h for qemu-devel@nongnu.org; Tue, 11 Jan 2011 17:12:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PcmS2-0003nX-Tb for qemu-devel@nongnu.org; Tue, 11 Jan 2011 17:12:33 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:5366) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PcmS2-0003mW-Lb for qemu-devel@nongnu.org; Tue, 11 Jan 2011 17:12:26 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.69) (envelope-from ) id 1PcmRu-000579-C8 for qemu-devel@nongnu.org; Tue, 11 Jan 2011 22:12:18 +0000 From: Peter Maydell Date: Tue, 11 Jan 2011 22:12:14 +0000 Message-Id: <1294783938-19629-5-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1294783938-19629-1-git-send-email-peter.maydell@linaro.org> References: <1294783938-19629-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 4/8] target-arm: Translate with VFP len/stride from TB flags, not CPUState List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org When translating, the VFP vector length and stride for this TB are encoded in the TB flags; the CPUState copies may be different and must not be used. Signed-off-by: Peter Maydell --- target-arm/translate.c | 10 +++++++--- 1 files changed, 7 insertions(+), 3 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 9e0b0b1..624a443 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -60,6 +60,8 @@ typedef struct DisasContext { int user; #endif int vfp_enabled; + int vec_len; + int vec_stride; } DisasContext; #if defined(CONFIG_USER_ONLY) @@ -2895,7 +2897,7 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) rm = VFP_SREG_M(insn); } - veclen = env->vfp.vec_len; + veclen = s->vec_len; if (op == 15 && rn > 3) veclen = 0; @@ -2916,9 +2918,9 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) veclen = 0; } else { if (dp) - delta_d = (env->vfp.vec_stride >> 1) + 1; + delta_d = (s->vec_stride >> 1) + 1; else - delta_d = env->vfp.vec_stride + 1; + delta_d = s->vec_stride + 1; if ((rm & bank_mask) == 0) { /* mixed scalar/vector */ @@ -9083,6 +9085,8 @@ static inline void gen_intermediate_code_internal(CPUState *env, } #endif dc->vfp_enabled = ARM_TBFLAG_VFPEN(tb->flags); + dc->vec_len = ARM_TBFLAG_VECLEN(tb->flags); + dc->vec_stride = ARM_TBFLAG_VECSTRIDE(tb->flags); cpu_F0s = tcg_temp_new_i32(); cpu_F1s = tcg_temp_new_i32(); cpu_F0d = tcg_temp_new_i64(); -- 1.6.3.3