From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 5/8] target-arm: Translate with Thumb state from TB flags, not CPUState
Date: Tue, 11 Jan 2011 22:12:15 +0000 [thread overview]
Message-ID: <1294783938-19629-6-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1294783938-19629-1-git-send-email-peter.maydell@linaro.org>
The Thumb/ARM state for the TB being translated should come from
the TB flags, not the CPUState.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/translate.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 624a443..bda5d47 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -9074,7 +9074,7 @@ static inline void gen_intermediate_code_internal(CPUState *env,
dc->pc = pc_start;
dc->singlestep_enabled = env->singlestep_enabled;
dc->condjmp = 0;
- dc->thumb = env->thumb;
+ dc->thumb = ARM_TBFLAG_THUMB(tb->flags);
dc->condexec_mask = (env->condexec_bits & 0xf) << 1;
dc->condexec_cond = env->condexec_bits >> 4;
#if !defined(CONFIG_USER_ONLY)
@@ -9161,7 +9161,7 @@ static inline void gen_intermediate_code_internal(CPUState *env,
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
gen_io_start();
- if (env->thumb) {
+ if (dc->thumb) {
disas_thumb_insn(env, dc);
if (dc->condexec_mask) {
dc->condexec_cond = (dc->condexec_cond & 0xe)
@@ -9275,7 +9275,7 @@ done_generating:
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
- log_target_disas(pc_start, dc->pc - pc_start, env->thumb);
+ log_target_disas(pc_start, dc->pc - pc_start, dc->thumb);
qemu_log("\n");
}
#endif
--
1.6.3.3
next prev parent reply other threads:[~2011-01-11 22:12 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-11 22:12 [Qemu-devel] [PATCH v2 0/8] target-arm: Translate based on TB flags, not CPUState Peter Maydell
2011-01-11 22:12 ` [Qemu-devel] [PATCH 1/8] target-arm: Don't generate code specific to current CPU mode for SRS Peter Maydell
2011-01-12 10:21 ` Aurelien Jarno
2011-01-11 22:12 ` [Qemu-devel] [PATCH 2/8] target-arm: Add symbolic constants for bitfields in TB flags Peter Maydell
2011-01-12 10:21 ` Aurelien Jarno
2011-01-11 22:12 ` [Qemu-devel] [PATCH 3/8] target-arm: Translate with VFP-enabled from TB flags, not CPUState Peter Maydell
2011-01-12 10:21 ` Aurelien Jarno
2011-01-11 22:12 ` [Qemu-devel] [PATCH 4/8] target-arm: Translate with VFP len/stride " Peter Maydell
2011-01-12 10:21 ` Aurelien Jarno
2011-01-11 22:12 ` Peter Maydell [this message]
2011-01-12 10:21 ` [Qemu-devel] [PATCH 5/8] target-arm: Translate with Thumb state " Aurelien Jarno
2011-01-11 22:12 ` [Qemu-devel] [PATCH 6/8] target-arm: Translate with condexec bits " Peter Maydell
2011-01-12 10:22 ` Aurelien Jarno
2011-01-11 22:12 ` [Qemu-devel] [PATCH 7/8] target-arm: Set privileged bit in TB flags correctly for M profile Peter Maydell
2011-01-12 10:22 ` Aurelien Jarno
2011-01-11 22:12 ` [Qemu-devel] [PATCH 8/8] target-arm: Translate with user-state from TB flags, not CPUState Peter Maydell
2011-01-12 10:22 ` Aurelien Jarno
2011-01-14 19:40 ` [Qemu-devel] [PATCH v2 0/8] target-arm: Translate based on " Aurelien Jarno
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