From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=37217 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pl55s-0004zQ-Mn for qemu-devel@nongnu.org; Thu, 03 Feb 2011 14:43:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Pl55a-0002Ok-S4 for qemu-devel@nongnu.org; Thu, 03 Feb 2011 14:43:35 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:26905) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Pl55a-0002NL-LE for qemu-devel@nongnu.org; Thu, 03 Feb 2011 14:43:34 -0500 From: Peter Maydell Date: Thu, 3 Feb 2011 19:43:22 +0000 Message-Id: <1296762205-3043-2-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1296762205-3043-1-git-send-email-peter.maydell@linaro.org> References: <1296762205-3043-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 1/4] target-arm: Add CPU feature flag for v7MP List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: patches@linaro.org Add a CPU feature flag for v7MP (the multiprocessing extensions); some instructions exist only for v7MP and not for the base v7 architecture. Signed-off-by: Peter Maydell --- target-arm/cpu.h | 3 ++- target-arm/helper.c | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 5bcd53a..0d96325 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -362,7 +362,8 @@ enum arm_features { ARM_FEATURE_DIV, ARM_FEATURE_M, /* Microcontroller profile. */ ARM_FEATURE_OMAPCP, /* OMAP specific CP15 ops handling. */ - ARM_FEATURE_THUMB2EE + ARM_FEATURE_THUMB2EE, + ARM_FEATURE_V7MP /* v7 Multiprocessing Extensions */ }; static inline int arm_feature(CPUARMState *env, int feature) diff --git a/target-arm/helper.c b/target-arm/helper.c index b562767..3cf9181 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -123,6 +123,11 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) set_feature(env, ARM_FEATURE_VFP_FP16); set_feature(env, ARM_FEATURE_NEON); set_feature(env, ARM_FEATURE_THUMB2EE); + /* Note that A9 supports the MP extensions even for + * A9UP and single-core A9MP (which are both different + * and valid configurations; we don't model A9UP). + */ + set_feature(env, ARM_FEATURE_V7MP); env->vfp.xregs[ARM_VFP_FPSID] = 0x41034000; /* Guess */ env->vfp.xregs[ARM_VFP_MVFR0] = 0x11110222; env->vfp.xregs[ARM_VFP_MVFR1] = 0x01111111; @@ -152,6 +157,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) set_feature(env, ARM_FEATURE_NEON); set_feature(env, ARM_FEATURE_THUMB2EE); set_feature(env, ARM_FEATURE_DIV); + set_feature(env, ARM_FEATURE_V7MP); break; case ARM_CPUID_TI915T: case ARM_CPUID_TI925T: -- 1.7.1