[Qemu-devel] [PATCH 0/6] target-arm: Fix floating point conversions

[Peter Maydell <peter.maydell@linaro.org>]

This patchset fixes two issues:
 * default_nan_mode not being honoured for float-to-float conversions
 * half precision conversions being broken in a number of ways as
   well as not handling default_nan_mode.

With this patchset qemu passes random-instruction-selection tests
for VCVT.F32.F16, VCVT.F16.F32, VCVTB and VCVTT, in both IEEE and
non-IEEE modes, with and without default-NaN behaviour.

Christophe: this patchset includes your softfloat v3 patch, although
I have split it up a little to keep the float16 bits separate.

Peter Maydell (6):
  softfloat: Add float16 type and float16 NaN handling functions
  softfloat: Honour default_nan_mode for float-to-float conversions
  softfloat: Fix single-to-half precision float conversions
  softfloat: Correctly handle NaNs in float16_to_float32()
  target-arm: Silence NaNs resulting from half-precision conversions
  target-arm: Use standard FPSCR for Neon half-precision operations

 fpu/softfloat-specialize.h |  125 ++++++++++++++++++++++++++++++++++++++++++--
 fpu/softfloat.c            |   66 ++++++++++++-----------
 fpu/softfloat.h            |   12 ++++-
 target-arm/helper.c        |   38 +++++++++++--
 target-arm/helpers.h       |    2 +
 target-arm/translate.c     |   16 +++---
 6 files changed, 208 insertions(+), 51 deletions(-)