From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=33430 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PnUtj-0002nO-2o for qemu-devel@nongnu.org; Thu, 10 Feb 2011 06:41:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PnUtP-0001PJ-0Q for qemu-devel@nongnu.org; Thu, 10 Feb 2011 06:41:00 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:15475) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PnUtO-0001PB-JZ for qemu-devel@nongnu.org; Thu, 10 Feb 2011 06:40:58 -0500 From: Peter Maydell Date: Thu, 10 Feb 2011 11:28:59 +0000 Message-Id: <1297337341-10815-5-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1297337341-10815-1-git-send-email-peter.maydell@linaro.org> References: <1297337341-10815-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH v3 4/6] softfloat: Correctly handle NaNs in float16_to_float32() List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Christophe Lyon , patches@linaro.org Correctly handle NaNs in float16_to_float32(), by defining and using a float16ToCommonNaN() function, as we do with the other formats. Signed-off-by: Peter Maydell --- fpu/softfloat-specialize.h | 17 +++++++++++++++++ fpu/softfloat.c | 4 +--- 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 1c0b12b..2d025bf 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -120,6 +120,23 @@ float16 float16_maybe_silence_nan(float16 a_) } /*---------------------------------------------------------------------------- +| Returns the result of converting the half-precision floating-point NaN +| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid +| exception is raised. +*----------------------------------------------------------------------------*/ + +static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM ) +{ + commonNaNT z; + + if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); + z.sign = float16_val(a) >> 15; + z.low = 0; + z.high = ((bits64) float16_val(a))<<54; + return z; +} + +/*---------------------------------------------------------------------------- | Returns the result of converting the canonical NaN `a' to the half- | precision floating-point format. *----------------------------------------------------------------------------*/ diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 80d8cc4..3abd170 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -2761,9 +2761,7 @@ float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM) if (aExp == 0x1f && ieee) { if (aSig) { - /* Make sure correct exceptions are raised. */ - float32ToCommonNaN(a STATUS_VAR); - aSig |= 0x200; + return commonNaNToFloat32(float16ToCommonNaN(a STATUS_VAR) STATUS_VAR); } return packFloat32(aSign, 0xff, aSig << 13); } -- 1.7.1