From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=41051 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PpLDD-0005ls-E7 for qemu-devel@nongnu.org; Tue, 15 Feb 2011 08:45:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PpLDA-0005Km-Bc for qemu-devel@nongnu.org; Tue, 15 Feb 2011 08:45:03 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:56889) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PpLDA-0005J7-0f for qemu-devel@nongnu.org; Tue, 15 Feb 2011 08:45:00 -0500 From: Peter Maydell Date: Tue, 15 Feb 2011 13:44:44 +0000 Message-Id: <1297777490-5323-5-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1297777490-5323-1-git-send-email-peter.maydell@linaro.org> References: <1297777490-5323-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 04/10] target-arm: fix unsigned 64 bit right shifts. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Christophe Lyon , patches@linaro.org From: Christophe Lyon Fix range of shift amounts which always give 0 as result. Signed-off-by: Christophe Lyon Reviewed-by: Peter Maydell --- target-arm/neon_helper.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index 2930b5e..a8885fa 100644 --- a/target-arm/neon_helper.c +++ b/target-arm/neon_helper.c @@ -639,7 +639,7 @@ uint32_t HELPER(neon_rshl_u32)(uint32_t val, uint32_t shiftop) uint64_t HELPER(neon_rshl_u64)(uint64_t val, uint64_t shiftop) { int8_t shift = (uint8_t)shiftop; - if (shift >= 64 || shift < 64) { + if (shift >= 64 || shift < -64) { val = 0; } else if (shift == -64) { /* Rounding a 1-bit result just preserves that bit. */ -- 1.7.1