From: Michael Walle <michael@walle.cc>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
Michael Walle <michael@walle.cc>, Alexander Graf <agraf@suse.de>,
Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH 03/17] lm32: translation code helper
Date: Thu, 17 Feb 2011 23:45:04 +0100 [thread overview]
Message-ID: <1297982718-21865-4-git-send-email-michael@walle.cc> (raw)
In-Reply-To: <1297982718-21865-1-git-send-email-michael@walle.cc>
This patch adds translation helper functions.
Signed-off-by: Michael Walle <michael@walle.cc>
---
target-lm32/helper.h | 14 ++++++
target-lm32/op_helper.c | 106 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 120 insertions(+), 0 deletions(-)
create mode 100644 target-lm32/helper.h
create mode 100644 target-lm32/op_helper.c
diff --git a/target-lm32/helper.h b/target-lm32/helper.h
new file mode 100644
index 0000000..9d335ef
--- /dev/null
+++ b/target-lm32/helper.h
@@ -0,0 +1,14 @@
+#include "def-helper.h"
+
+DEF_HELPER_1(raise_exception, void, i32)
+DEF_HELPER_0(hlt, void)
+DEF_HELPER_1(wcsr_im, void, i32)
+DEF_HELPER_1(wcsr_ip, void, i32)
+DEF_HELPER_1(wcsr_jtx, void, i32)
+DEF_HELPER_1(wcsr_jrx, void, i32)
+DEF_HELPER_0(rcsr_im, i32)
+DEF_HELPER_0(rcsr_ip, i32)
+DEF_HELPER_0(rcsr_jtx, i32)
+DEF_HELPER_0(rcsr_jrx, i32)
+
+#include "def-helper.h"
diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c
new file mode 100644
index 0000000..e84ba48
--- /dev/null
+++ b/target-lm32/op_helper.c
@@ -0,0 +1,106 @@
+#include <assert.h>
+#include "exec.h"
+#include "helper.h"
+#include "host-utils.h"
+
+#include "hw/lm32_pic.h"
+#include "hw/lm32_juart.h"
+
+#if !defined(CONFIG_USER_ONLY)
+#define MMUSUFFIX _mmu
+#define SHIFT 0
+#include "softmmu_template.h"
+#define SHIFT 1
+#include "softmmu_template.h"
+#define SHIFT 2
+#include "softmmu_template.h"
+#define SHIFT 3
+#include "softmmu_template.h"
+
+void helper_raise_exception(uint32_t index)
+{
+ env->exception_index = index;
+ cpu_loop_exit();
+}
+
+void helper_hlt(void)
+{
+ env->halted = 1;
+ env->exception_index = EXCP_HLT;
+ cpu_loop_exit();
+}
+
+void helper_wcsr_im(uint32_t im)
+{
+ lm32_pic_set_im(env->pic_state, im);
+}
+
+void helper_wcsr_ip(uint32_t im)
+{
+ lm32_pic_set_ip(env->pic_state, im);
+}
+
+void helper_wcsr_jtx(uint32_t jtx)
+{
+ lm32_juart_set_jtx(env->juart_state, jtx);
+}
+
+void helper_wcsr_jrx(uint32_t jrx)
+{
+ lm32_juart_set_jrx(env->juart_state, jrx);
+}
+
+uint32_t helper_rcsr_im(void)
+{
+ return lm32_pic_get_im(env->pic_state);
+}
+
+uint32_t helper_rcsr_ip(void)
+{
+ return lm32_pic_get_ip(env->pic_state);
+}
+
+uint32_t helper_rcsr_jtx(void)
+{
+ return lm32_juart_get_jtx(env->juart_state);
+}
+
+uint32_t helper_rcsr_jrx(void)
+{
+ return lm32_juart_get_jrx(env->juart_state);
+}
+
+/* Try to fill the TLB and return an exception if error. If retaddr is
+ NULL, it means that the function was called in C code (i.e. not
+ from generated code or from helper.c) */
+/* XXX: fix it to restore all registers */
+void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
+{
+ TranslationBlock *tb;
+ CPUState *saved_env;
+ unsigned long pc;
+ int ret;
+
+ /* XXX: hack to restore env in all cases, even if not called from
+ generated code */
+ saved_env = env;
+ env = cpu_single_env;
+
+ ret = cpu_lm32_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
+ if (unlikely(ret)) {
+ if (retaddr) {
+ /* now we have a real cpu fault */
+ pc = (unsigned long)retaddr;
+ tb = tb_find_pc(pc);
+ if (tb) {
+ /* the PC is inside the translated code. It means that we have
+ a virtual CPU fault */
+ cpu_restore_state(tb, env, pc, NULL);
+ }
+ }
+ cpu_loop_exit();
+ }
+ env = saved_env;
+}
+#endif
+
--
1.7.2.3
next prev parent reply other threads:[~2011-02-17 22:46 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-17 22:45 [Qemu-devel] [PATCH 00/17 v3] LatticeMico32 target Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 01/17] LatticeMico32 target support Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 02/17] lm32: translation routines Michael Walle
2011-02-17 22:45 ` Michael Walle [this message]
2011-02-17 22:45 ` [Qemu-devel] [PATCH 04/17] lm32: machine state loading/saving Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 05/17] lm32: gdbstub support Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 06/17] lm32: interrupt controller model Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 07/17] lm32: juart model Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 08/17] lm32: pic and juart helper functions Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 09/17] lm32: timer model Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 10/17] lm32: uart model Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 11/17] lm32: system control model Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 12/17] lm32: support for creating device tree Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 13/17] lm32: EVR32 and uclinux BSP Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 14/17] lm32: todo and documentation Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 15/17] lm32: opcode testsuite Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 16/17] Add lm32 target to configure Michael Walle
2011-02-17 22:45 ` [Qemu-devel] [PATCH 17/17] MAINTAINERS: add LatticeMico32 maintainer Michael Walle
2011-02-24 23:03 ` [Qemu-devel] [PATCH 00/17 v3] LatticeMico32 target Michael Walle
2011-03-01 21:31 ` Edgar E. Iglesias
2011-03-05 9:55 ` Blue Swirl
2011-03-06 22:47 ` Michael Walle
2011-03-07 13:20 ` Edgar E. Iglesias
2011-03-13 22:36 ` Michael Walle
-- strict thread matches above, loose matches on Subject: below --
2011-02-10 23:11 [Qemu-devel] [PATCH 00/17 v2] " Michael Walle
2011-02-10 23:11 ` [Qemu-devel] [PATCH 03/17] lm32: translation code helper Michael Walle
2011-01-31 0:30 [Qemu-devel] [PATCH 00/17] LatticeMico32 target Michael Walle
2011-01-31 0:30 ` [Qemu-devel] [PATCH 03/17] lm32: translation code helper Michael Walle
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