From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=55325 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PupwI-0007Zt-F0 for qemu-devel@nongnu.org; Wed, 02 Mar 2011 12:34:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PupwH-0001Qs-4w for qemu-devel@nongnu.org; Wed, 02 Mar 2011 12:34:18 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:57986) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PupwG-0001Pn-Ug for qemu-devel@nongnu.org; Wed, 02 Mar 2011 12:34:17 -0500 From: Peter Maydell Date: Wed, 2 Mar 2011 17:34:08 +0000 Message-Id: <1299087248-622-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH] target-arm: Set carry flag correctly for Thumb2 ORNS List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: patches@linaro.org The code for Thumb2 ORNS (or negated and set flags) was trashing a TCG input register which was needed later for use in calculating flags, with the effect that the carry flag was always set with the wrong sense. Fix this by using a TCG temporary instead. Signed-off-by: Peter Maydell --- target-arm/translate.c | 11 +++++++++-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index dbd958b..8f4e16b 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7326,10 +7326,17 @@ gen_thumb2_data_op(DisasContext *s, int op, int conds, uint32_t shifter_out, TCG logic_cc = conds; break; case 3: /* orn */ - tcg_gen_not_i32(t1, t1); - tcg_gen_or_i32(t0, t0, t1); + { + /* We can't just invert t1 in place because we might need it + * to calculate the carry flag later. + */ + TCGv tmp = tcg_temp_new_i32(); + tcg_gen_not_i32(tmp, t1); + tcg_gen_or_i32(t0, t0, tmp); + tcg_temp_free_i32(tmp); logic_cc = conds; break; + } case 4: /* eor */ tcg_gen_xor_i32(t0, t0, t1); logic_cc = conds; -- 1.7.1