From: Michael Walle <michael@walle.cc>
To: qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
Michael Walle <michael@walle.cc>
Subject: [Qemu-devel] [PATCH] lm32: rename raise opcode to scall
Date: Mon, 7 Mar 2011 23:00:13 +0100 [thread overview]
Message-ID: <1299535213-13866-1-git-send-email-michael@walle.cc> (raw)
To be consistent with the new reference manual.
Signed-off-by: Michael Walle <michael@walle.cc>
---
target-lm32/lm32-decode.h | 2 +-
target-lm32/translate.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-lm32/lm32-decode.h b/target-lm32/lm32-decode.h
index f745b39..42205d9 100644
--- a/target-lm32/lm32-decode.h
+++ b/target-lm32/lm32-decode.h
@@ -60,7 +60,7 @@
#define DEC_NOR {B8(00000001), B8(00011111)}
#define DEC_OR {B8(00001110), B8(00011111)}
#define DEC_ORHI {B8(00011110), B8(00111111)}
-#define DEC_RAISE {B8(00101011), B8(00111111)}
+#define DEC_SCALL {B8(00101011), B8(00111111)}
#define DEC_RCSR {B8(00100100), B8(00111111)}
#define DEC_SB {B8(00001100), B8(00111111)}
#define DEC_SEXTB {B8(00101100), B8(00111111)}
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 0b0e405..aa08a14 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -583,7 +583,7 @@ static void dec_orhi(DisasContext *dc)
tcg_gen_ori_tl(cpu_R[dc->r1], cpu_R[dc->r0], (dc->imm16 << 16));
}
-static void dec_raise(DisasContext *dc)
+static void dec_scall(DisasContext *dc)
{
TCGv t0;
int l1;
@@ -1002,7 +1002,7 @@ static const DecoderInfo decinfo[] = {
{DEC_NOR, dec_nor},
{DEC_OR, dec_or},
{DEC_ORHI, dec_orhi},
- {DEC_RAISE, dec_raise},
+ {DEC_SCALL, dec_scall},
{DEC_RCSR, dec_rcsr},
{DEC_SB, dec_sb},
{DEC_SEXTB, dec_sextb},
--
1.7.2.3
next reply other threads:[~2011-03-07 22:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-07 22:00 Michael Walle [this message]
2011-03-31 6:56 ` [Qemu-devel] Re: [PATCH] lm32: rename raise opcode to scall Edgar E. Iglesias
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