* [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers
@ 2011-03-12 17:04 Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 1/5] add more helper functions with explicit milli/nanosecond resolution Paolo Bonzini
` (5 more replies)
0 siblings, 6 replies; 10+ messages in thread
From: Paolo Bonzini @ 2011-03-12 17:04 UTC (permalink / raw)
To: qemu-devel
Right now, rt_clock timers are limited to millisecond resolutions;
other clocks are limited to nanoseconds. This patch series removes
the limitation.
In order to ease transition, new functions are provided with
explicit resolution (milli/nanosecond). The old qemu_get_clock
is removed. The old qemu_new_timer is grown a new argument to
specify the resolution.
Most of the patch series (patches 2/3) is mechanical (sed).
Paolo Bonzini (5):
add more helper functions with explicit milli/nanosecond resolution
change all rt_clock references to use millisecond resolution
accessors
change all other clock references to use nanosecond resolution
accessors
add a generic scaling mechanism for timers
remove qemu_get_clock
audio/audio.c | 4 +-
audio/noaudio.c | 4 +-
audio/spiceaudio.c | 4 +-
audio/wavaudio.c | 2 +-
buffered_file.c | 6 ++--
console.c | 4 +-
hw/acpi_piix4.c | 8 +++---
hw/adlib.c | 2 +-
hw/apic.c | 8 +++---
hw/arm_sysctl.c | 2 +-
hw/armv7m_nvic.c | 8 +++---
hw/baum.c | 4 +-
hw/bt-hci-csr.c | 4 +-
hw/bt-hci.c | 12 +++++-----
hw/cuda.c | 24 ++++++++++----------
hw/dp8393x.c | 6 ++--
hw/etraxfs_timer.c | 2 +-
hw/fdc.c | 4 +-
hw/hpet.c | 14 +++++-----
hw/i8254.c | 12 +++++-----
hw/i8259.c | 4 +-
hw/ide/core.c | 4 +-
hw/intel-hda.c | 2 +-
hw/lan9118.c | 4 +-
hw/lm832x.c | 6 ++--
hw/m48t59.c | 6 ++--
hw/mc146818rtc.c | 16 ++++++------
hw/mips_timer.c | 10 ++++----
hw/mpcore.c | 6 ++--
hw/omap1.c | 30 ++++++++++++------------
hw/omap_gptimer.c | 14 +++++-----
hw/omap_synctimer.c | 2 +-
hw/pcnet.c | 6 ++--
hw/pcspk.c | 2 +-
hw/pflash_cfi01.c | 2 +-
hw/pflash_cfi02.c | 6 ++--
hw/pl031.c | 8 +++---
hw/ppc.c | 52 +++++++++++++++++++++---------------------
hw/ppc405_uc.c | 6 ++--
hw/ppc_prep.c | 2 +-
hw/ptimer.c | 14 +++++-----
hw/pxa2xx.c | 30 ++++++++++++------------
hw/pxa2xx_timer.c | 28 +++++++++++-----------
hw/rc4030.c | 4 +-
hw/rtl8139.c | 22 +++++++++---------
hw/sb16.c | 4 +-
hw/serial.c | 20 ++++++++--------
hw/soc_dma.c | 4 +-
hw/spitz.c | 6 ++--
hw/stellaris.c | 6 ++--
hw/sun4u.c | 12 +++++-----
hw/syborg_rtc.c | 2 +-
hw/tsc2005.c | 4 +-
hw/tsc210x.c | 20 ++++++++--------
hw/tusb6010.c | 8 +++---
hw/twl92230.c | 8 +++---
hw/usb-hid.c | 6 ++--
hw/usb-musb.c | 4 +-
hw/usb-ohci.c | 8 +++---
hw/usb-uhci.c | 6 ++--
hw/vga.c | 2 +-
hw/virtio-net.c | 6 ++--
hw/vt82c686.c | 8 +++---
hw/wdt_i6300esb.c | 4 +-
hw/wdt_ib700.c | 4 +-
hw/xen_domainbuild.c | 6 ++--
monitor.c | 4 +-
net/dump.c | 2 +-
qemu-char.c | 8 +++---
qemu-timer.c | 60 +++++++++++++++++++++----------------------------
qemu-timer.h | 25 +++++++++++++++++++-
savevm.c | 6 ++--
slirp/slirp.c | 2 +-
target-ppc/kvm.c | 4 +-
target-ppc/kvm_ppc.c | 6 ++--
ui/spice-core.c | 4 +-
ui/vnc.c | 10 ++++----
usb-linux.c | 4 +-
vl.c | 12 +++++-----
79 files changed, 364 insertions(+), 351 deletions(-)
--
1.7.4
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Qemu-devel] [RFC PATCH 1/5] add more helper functions with explicit milli/nanosecond resolution
2011-03-12 17:04 [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Paolo Bonzini
@ 2011-03-12 17:04 ` Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 2/5] change all rt_clock references to use millisecond resolution accessors Paolo Bonzini
` (4 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Paolo Bonzini @ 2011-03-12 17:04 UTC (permalink / raw)
To: qemu-devel
The code doesn't make much sense right now, but it will as
soon as timers will be able to scale their resolution arbitrarily.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
qemu-timer.h | 23 +++++++++++++++++++++++
1 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/qemu-timer.h b/qemu-timer.h
index 8cd8f83..345feea 100644
--- a/qemu-timer.h
+++ b/qemu-timer.h
@@ -12,6 +12,10 @@
/* timers */
+#define SCALE_MS 1000000
+#define SCALE_US 1000
+#define SCALE_NS 1
+
typedef struct QEMUClock QEMUClock;
typedef void QEMUTimerCB(void *opaque);
@@ -54,6 +58,25 @@ void init_clocks(void);
int init_timer_alarm(void);
void quit_timers(void);
+static inline QEMUTimer *qemu_new_timer_ns(QEMUClock *clock, QEMUTimerCB *cb,
+ void *opaque)
+{
+ assert(clock != rt_clock);
+ return qemu_new_timer(clock, cb, opaque);
+}
+
+static inline QEMUTimer *qemu_new_timer_ms(QEMUClock *clock, QEMUTimerCB *cb,
+ void *opaque)
+{
+ assert(clock == rt_clock);
+ return qemu_new_timer(clock, cb, opaque);
+}
+
+static inline int64_t qemu_get_clock_ms(QEMUClock *clock)
+{
+ return qemu_get_clock_ns(clock) / SCALE_MS;
+}
+
static inline int64_t get_ticks_per_sec(void)
{
return 1000000000LL;
--
1.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [RFC PATCH 2/5] change all rt_clock references to use millisecond resolution accessors
2011-03-12 17:04 [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 1/5] add more helper functions with explicit milli/nanosecond resolution Paolo Bonzini
@ 2011-03-12 17:04 ` Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 3/5] change all other clock references to use nanosecond " Paolo Bonzini
` (3 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Paolo Bonzini @ 2011-03-12 17:04 UTC (permalink / raw)
To: qemu-devel
This was done with:
sed -i '/get_clock\>.*rt_clock/s/get_clock\>/get_clock_ms/' \
$(git grep -l 'get_clock\>.*rt_clock' )
sed -i '/new_timer\>.*rt_clock/s/new_timer\>/new_timer_ms/' \
$(git grep -l 'new_timer\>.*rt_clock' )
after checking that get_clock and new_timer never occur twice
on the same line. There were no missed occurrences; however, even
if there had been, they would have been caught by the compiler.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
buffered_file.c | 6 +++---
console.c | 4 ++--
hw/omap1.c | 10 +++++-----
hw/pxa2xx.c | 28 ++++++++++++++--------------
hw/twl92230.c | 8 ++++----
hw/xen_domainbuild.c | 6 +++---
qemu-char.c | 8 ++++----
qemu-timer.c | 6 +++---
savevm.c | 4 ++--
slirp/slirp.c | 2 +-
ui/spice-core.c | 4 ++--
ui/vnc.c | 10 +++++-----
usb-linux.c | 4 ++--
vl.c | 12 ++++++------
14 files changed, 56 insertions(+), 56 deletions(-)
diff --git a/buffered_file.c b/buffered_file.c
index 8435a31..b5e2baf 100644
--- a/buffered_file.c
+++ b/buffered_file.c
@@ -238,7 +238,7 @@ static void buffered_rate_tick(void *opaque)
return;
}
- qemu_mod_timer(s->timer, qemu_get_clock(rt_clock) + 100);
+ qemu_mod_timer(s->timer, qemu_get_clock_ms(rt_clock) + 100);
if (s->freeze_output)
return;
@@ -274,9 +274,9 @@ QEMUFile *qemu_fopen_ops_buffered(void *opaque,
buffered_set_rate_limit,
buffered_get_rate_limit);
- s->timer = qemu_new_timer(rt_clock, buffered_rate_tick, s);
+ s->timer = qemu_new_timer_ms(rt_clock, buffered_rate_tick, s);
- qemu_mod_timer(s->timer, qemu_get_clock(rt_clock) + 100);
+ qemu_mod_timer(s->timer, qemu_get_clock_ms(rt_clock) + 100);
return s->file;
}
diff --git a/console.c b/console.c
index 57d6eb5..12407b3 100644
--- a/console.c
+++ b/console.c
@@ -1135,7 +1135,7 @@ static void kbd_send_chars(void *opaque)
/* characters are pending: we send them a bit later (XXX:
horrible, should change char device API) */
if (s->out_fifo.count > 0) {
- qemu_mod_timer(s->kbd_timer, qemu_get_clock(rt_clock) + 1);
+ qemu_mod_timer(s->kbd_timer, qemu_get_clock_ms(rt_clock) + 1);
}
}
@@ -1457,7 +1457,7 @@ static void text_console_do_init(CharDriverState *chr, DisplayState *ds)
s->out_fifo.buf = s->out_fifo_buf;
s->out_fifo.buf_size = sizeof(s->out_fifo_buf);
- s->kbd_timer = qemu_new_timer(rt_clock, kbd_send_chars, s);
+ s->kbd_timer = qemu_new_timer_ms(rt_clock, kbd_send_chars, s);
s->ds = ds;
if (!color_inited) {
diff --git a/hw/omap1.c b/hw/omap1.c
index d5e4dab..f2be4de 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -2802,7 +2802,7 @@ static void omap_rtc_reset(struct omap_rtc_s *s)
s->pm_am = 0;
s->auto_comp = 0;
s->round = 0;
- s->tick = qemu_get_clock(rt_clock);
+ s->tick = qemu_get_clock_ms(rt_clock);
memset(&s->alarm_tm, 0, sizeof(s->alarm_tm));
s->alarm_tm.tm_mday = 0x01;
s->status = 1 << 7;
@@ -2822,7 +2822,7 @@ static struct omap_rtc_s *omap_rtc_init(target_phys_addr_t base,
s->irq = irq[0];
s->alarm = irq[1];
- s->clk = qemu_new_timer(rt_clock, omap_rtc_tick, s);
+ s->clk = qemu_new_timer_ms(rt_clock, omap_rtc_tick, s);
omap_rtc_reset(s);
@@ -3399,9 +3399,9 @@ static void omap_lpg_tick(void *opaque)
struct omap_lpg_s *s = opaque;
if (s->cycle)
- qemu_mod_timer(s->tm, qemu_get_clock(rt_clock) + s->period - s->on);
+ qemu_mod_timer(s->tm, qemu_get_clock_ms(rt_clock) + s->period - s->on);
else
- qemu_mod_timer(s->tm, qemu_get_clock(rt_clock) + s->on);
+ qemu_mod_timer(s->tm, qemu_get_clock_ms(rt_clock) + s->on);
s->cycle = !s->cycle;
printf("%s: LED is %s\n", __FUNCTION__, s->cycle ? "on" : "off");
@@ -3516,7 +3516,7 @@ static struct omap_lpg_s *omap_lpg_init(target_phys_addr_t base, omap_clk clk)
struct omap_lpg_s *s = (struct omap_lpg_s *)
qemu_mallocz(sizeof(struct omap_lpg_s));
- s->tm = qemu_new_timer(rt_clock, omap_lpg_tick, s);
+ s->tm = qemu_new_timer_ms(rt_clock, omap_lpg_tick, s);
omap_lpg_reset(s);
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 4c7b9e6..d75a817 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -921,7 +921,7 @@ static inline void pxa2xx_rtc_int_update(PXA2xxRTCState *s)
static void pxa2xx_rtc_hzupdate(PXA2xxRTCState *s)
{
- int64_t rt = qemu_get_clock(rt_clock);
+ int64_t rt = qemu_get_clock_ms(rt_clock);
s->last_rcnr += ((rt - s->last_hz) << 15) /
(1000 * ((s->rttr & 0xffff) + 1));
s->last_rdcr += ((rt - s->last_hz) << 15) /
@@ -931,7 +931,7 @@ static void pxa2xx_rtc_hzupdate(PXA2xxRTCState *s)
static void pxa2xx_rtc_swupdate(PXA2xxRTCState *s)
{
- int64_t rt = qemu_get_clock(rt_clock);
+ int64_t rt = qemu_get_clock_ms(rt_clock);
if (s->rtsr & (1 << 12))
s->last_swcr += (rt - s->last_sw) / 10;
s->last_sw = rt;
@@ -939,7 +939,7 @@ static void pxa2xx_rtc_swupdate(PXA2xxRTCState *s)
static void pxa2xx_rtc_piupdate(PXA2xxRTCState *s)
{
- int64_t rt = qemu_get_clock(rt_clock);
+ int64_t rt = qemu_get_clock_ms(rt_clock);
if (s->rtsr & (1 << 15))
s->last_swcr += rt - s->last_pi;
s->last_pi = rt;
@@ -1064,16 +1064,16 @@ static uint32_t pxa2xx_rtc_read(void *opaque, target_phys_addr_t addr)
case PIAR:
return s->piar;
case RCNR:
- return s->last_rcnr + ((qemu_get_clock(rt_clock) - s->last_hz) << 15) /
+ return s->last_rcnr + ((qemu_get_clock_ms(rt_clock) - s->last_hz) << 15) /
(1000 * ((s->rttr & 0xffff) + 1));
case RDCR:
- return s->last_rdcr + ((qemu_get_clock(rt_clock) - s->last_hz) << 15) /
+ return s->last_rdcr + ((qemu_get_clock_ms(rt_clock) - s->last_hz) << 15) /
(1000 * ((s->rttr & 0xffff) + 1));
case RYCR:
return s->last_rycr;
case SWCR:
if (s->rtsr & (1 << 12))
- return s->last_swcr + (qemu_get_clock(rt_clock) - s->last_sw) / 10;
+ return s->last_swcr + (qemu_get_clock_ms(rt_clock) - s->last_sw) / 10;
else
return s->last_swcr;
default:
@@ -1219,14 +1219,14 @@ static int pxa2xx_rtc_init(SysBusDevice *dev)
s->last_swcr = (tm.tm_hour << 19) |
(tm.tm_min << 13) | (tm.tm_sec << 7);
s->last_rtcpicr = 0;
- s->last_hz = s->last_sw = s->last_pi = qemu_get_clock(rt_clock);
-
- s->rtc_hz = qemu_new_timer(rt_clock, pxa2xx_rtc_hz_tick, s);
- s->rtc_rdal1 = qemu_new_timer(rt_clock, pxa2xx_rtc_rdal1_tick, s);
- s->rtc_rdal2 = qemu_new_timer(rt_clock, pxa2xx_rtc_rdal2_tick, s);
- s->rtc_swal1 = qemu_new_timer(rt_clock, pxa2xx_rtc_swal1_tick, s);
- s->rtc_swal2 = qemu_new_timer(rt_clock, pxa2xx_rtc_swal2_tick, s);
- s->rtc_pi = qemu_new_timer(rt_clock, pxa2xx_rtc_pi_tick, s);
+ s->last_hz = s->last_sw = s->last_pi = qemu_get_clock_ms(rt_clock);
+
+ s->rtc_hz = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_hz_tick, s);
+ s->rtc_rdal1 = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_rdal1_tick, s);
+ s->rtc_rdal2 = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_rdal2_tick, s);
+ s->rtc_swal1 = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_swal1_tick, s);
+ s->rtc_swal2 = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_swal2_tick, s);
+ s->rtc_pi = qemu_new_timer_ms(rt_clock, pxa2xx_rtc_pi_tick, s);
sysbus_init_irq(dev, &s->rtc_irq);
diff --git a/hw/twl92230.c b/hw/twl92230.c
index e61f17f..8e74acc 100644
--- a/hw/twl92230.c
+++ b/hw/twl92230.c
@@ -74,14 +74,14 @@ static inline void menelaus_update(MenelausState *s)
static inline void menelaus_rtc_start(MenelausState *s)
{
- s->rtc.next += qemu_get_clock(rt_clock);
+ s->rtc.next += qemu_get_clock_ms(rt_clock);
qemu_mod_timer(s->rtc.hz_tm, s->rtc.next);
}
static inline void menelaus_rtc_stop(MenelausState *s)
{
qemu_del_timer(s->rtc.hz_tm);
- s->rtc.next -= qemu_get_clock(rt_clock);
+ s->rtc.next -= qemu_get_clock_ms(rt_clock);
if (s->rtc.next < 1)
s->rtc.next = 1;
}
@@ -786,7 +786,7 @@ static void menelaus_pre_save(void *opaque)
{
MenelausState *s = opaque;
/* Should be <= 1000 */
- s->rtc_next_vmstate = s->rtc.next - qemu_get_clock(rt_clock);
+ s->rtc_next_vmstate = s->rtc.next - qemu_get_clock_ms(rt_clock);
}
static int menelaus_post_load(void *opaque, int version_id)
@@ -847,7 +847,7 @@ static int twl92230_init(i2c_slave *i2c)
{
MenelausState *s = FROM_I2C_SLAVE(MenelausState, i2c);
- s->rtc.hz_tm = qemu_new_timer(rt_clock, menelaus_rtc_hz, s);
+ s->rtc.hz_tm = qemu_new_timer_ms(rt_clock, menelaus_rtc_hz, s);
/* Three output pins plus one interrupt pin. */
qdev_init_gpio_out(&i2c->qdev, s->out, 4);
qdev_init_gpio_in(&i2c->qdev, menelaus_gpio_set, 3);
diff --git a/hw/xen_domainbuild.c b/hw/xen_domainbuild.c
index 7f1fd66..371c562 100644
--- a/hw/xen_domainbuild.c
+++ b/hw/xen_domainbuild.c
@@ -149,7 +149,7 @@ static void xen_domain_poll(void *opaque)
goto quit;
}
- qemu_mod_timer(xen_poll, qemu_get_clock(rt_clock) + 1000);
+ qemu_mod_timer(xen_poll, qemu_get_clock_ms(rt_clock) + 1000);
return;
quit:
@@ -291,8 +291,8 @@ int xen_domain_build_pv(const char *kernel, const char *ramdisk,
goto err;
}
- xen_poll = qemu_new_timer(rt_clock, xen_domain_poll, NULL);
- qemu_mod_timer(xen_poll, qemu_get_clock(rt_clock) + 1000);
+ xen_poll = qemu_new_timer_ms(rt_clock, xen_domain_poll, NULL);
+ qemu_mod_timer(xen_poll, qemu_get_clock_ms(rt_clock) + 1000);
return 0;
err:
diff --git a/qemu-char.c b/qemu-char.c
index bd4e944..b78fc61 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -267,7 +267,7 @@ static int mux_chr_write(CharDriverState *chr, const uint8_t *buf, int len)
int64_t ti;
int secs;
- ti = qemu_get_clock(rt_clock);
+ ti = qemu_get_clock_ms(rt_clock);
if (d->timestamps_start == -1)
d->timestamps_start = ti;
ti -= d->timestamps_start;
@@ -911,7 +911,7 @@ static void pty_chr_update_read_handler(CharDriverState *chr)
* timeout to the normal (much longer) poll interval before the
* timer triggers.
*/
- qemu_mod_timer(s->timer, qemu_get_clock(rt_clock) + 10);
+ qemu_mod_timer(s->timer, qemu_get_clock_ms(rt_clock) + 10);
}
static void pty_chr_state(CharDriverState *chr, int connected)
@@ -925,7 +925,7 @@ static void pty_chr_state(CharDriverState *chr, int connected)
/* (re-)connect poll interval for idle guests: once per second.
* We check more frequently in case the guests sends data to
* the virtual device linked to our pty. */
- qemu_mod_timer(s->timer, qemu_get_clock(rt_clock) + 1000);
+ qemu_mod_timer(s->timer, qemu_get_clock_ms(rt_clock) + 1000);
} else {
if (!s->connected)
qemu_chr_generic_open(chr);
@@ -1001,7 +1001,7 @@ static CharDriverState *qemu_chr_open_pty(QemuOpts *opts)
chr->chr_update_read_handler = pty_chr_update_read_handler;
chr->chr_close = pty_chr_close;
- s->timer = qemu_new_timer(rt_clock, pty_chr_timer, chr);
+ s->timer = qemu_new_timer_ms(rt_clock, pty_chr_timer, chr);
return chr;
}
diff --git a/qemu-timer.c b/qemu-timer.c
index 88c7b28..79b7678 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -269,7 +269,7 @@ static void icount_adjust(void)
static void icount_adjust_rt(void * opaque)
{
qemu_mod_timer(icount_rt_timer,
- qemu_get_clock(rt_clock) + 1000);
+ qemu_get_clock_ms(rt_clock) + 1000);
icount_adjust();
}
@@ -606,9 +606,9 @@ void configure_icount(const char *option)
the virtual time trigger catches emulated time passing too fast.
Realtime triggers occur even when idle, so use them less frequently
than VM triggers. */
- icount_rt_timer = qemu_new_timer(rt_clock, icount_adjust_rt, NULL);
+ icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL);
qemu_mod_timer(icount_rt_timer,
- qemu_get_clock(rt_clock) + 1000);
+ qemu_get_clock_ms(rt_clock) + 1000);
icount_vm_timer = qemu_new_timer(vm_clock, icount_adjust_vm, NULL);
qemu_mod_timer(icount_vm_timer,
qemu_get_clock(vm_clock) + get_ticks_per_sec() / 10);
diff --git a/savevm.c b/savevm.c
index 60d2f2a..66f88c6 100644
--- a/savevm.c
+++ b/savevm.c
@@ -137,7 +137,7 @@ static void qemu_announce_self_once(void *opaque)
if (--count) {
/* delay 50ms, 150ms, 250ms, ... */
- qemu_mod_timer(timer, qemu_get_clock(rt_clock) +
+ qemu_mod_timer(timer, qemu_get_clock_ms(rt_clock) +
50 + (SELF_ANNOUNCE_ROUNDS - count - 1) * 100);
} else {
qemu_del_timer(timer);
@@ -148,7 +148,7 @@ static void qemu_announce_self_once(void *opaque)
void qemu_announce_self(void)
{
static QEMUTimer *timer;
- timer = qemu_new_timer(rt_clock, qemu_announce_self_once, &timer);
+ timer = qemu_new_timer_ms(rt_clock, qemu_announce_self_once, &timer);
qemu_announce_self_once(&timer);
}
diff --git a/slirp/slirp.c b/slirp/slirp.c
index 332d83b..1593be1 100644
--- a/slirp/slirp.c
+++ b/slirp/slirp.c
@@ -393,7 +393,7 @@ void slirp_select_poll(fd_set *readfds, fd_set *writefds, fd_set *xfds,
global_writefds = writefds;
global_xfds = xfds;
- curtime = qemu_get_clock(rt_clock);
+ curtime = qemu_get_clock_ms(rt_clock);
QTAILQ_FOREACH(slirp, &slirp_instances, entry) {
/*
diff --git a/ui/spice-core.c b/ui/spice-core.c
index 1aa1a5e..ef56ed6 100644
--- a/ui/spice-core.c
+++ b/ui/spice-core.c
@@ -55,14 +55,14 @@ static SpiceTimer *timer_add(SpiceTimerFunc func, void *opaque)
SpiceTimer *timer;
timer = qemu_mallocz(sizeof(*timer));
- timer->timer = qemu_new_timer(rt_clock, func, opaque);
+ timer->timer = qemu_new_timer_ms(rt_clock, func, opaque);
QTAILQ_INSERT_TAIL(&timers, timer, next);
return timer;
}
static void timer_start(SpiceTimer *timer, uint32_t ms)
{
- qemu_mod_timer(timer->timer, qemu_get_clock(rt_clock) + ms);
+ qemu_mod_timer(timer->timer, qemu_get_clock_ms(rt_clock) + ms);
}
static void timer_cancel(SpiceTimer *timer)
diff --git a/ui/vnc.c b/ui/vnc.c
index 34dc0cd..2ef501f 100644
--- a/ui/vnc.c
+++ b/ui/vnc.c
@@ -1875,8 +1875,8 @@ static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len)
if (data[0] > 3) {
vd->timer_interval = VNC_REFRESH_INTERVAL_BASE;
- if (!qemu_timer_expired(vd->timer, qemu_get_clock(rt_clock) + vd->timer_interval))
- qemu_mod_timer(vd->timer, qemu_get_clock(rt_clock) + vd->timer_interval);
+ if (!qemu_timer_expired(vd->timer, qemu_get_clock_ms(rt_clock) + vd->timer_interval))
+ qemu_mod_timer(vd->timer, qemu_get_clock_ms(rt_clock) + vd->timer_interval);
}
switch (data[0]) {
@@ -2441,7 +2441,7 @@ static void vnc_refresh(void *opaque)
if (vnc_trylock_display(vd)) {
vd->timer_interval = VNC_REFRESH_INTERVAL_BASE;
- qemu_mod_timer(vd->timer, qemu_get_clock(rt_clock) +
+ qemu_mod_timer(vd->timer, qemu_get_clock_ms(rt_clock) +
vd->timer_interval);
return;
}
@@ -2468,14 +2468,14 @@ static void vnc_refresh(void *opaque)
if (vd->timer_interval > VNC_REFRESH_INTERVAL_MAX)
vd->timer_interval = VNC_REFRESH_INTERVAL_MAX;
}
- qemu_mod_timer(vd->timer, qemu_get_clock(rt_clock) + vd->timer_interval);
+ qemu_mod_timer(vd->timer, qemu_get_clock_ms(rt_clock) + vd->timer_interval);
}
static void vnc_init_timer(VncDisplay *vd)
{
vd->timer_interval = VNC_REFRESH_INTERVAL_BASE;
if (vd->timer == NULL && !QTAILQ_EMPTY(&vd->clients)) {
- vd->timer = qemu_new_timer(rt_clock, vnc_refresh, vd);
+ vd->timer = qemu_new_timer_ms(rt_clock, vnc_refresh, vd);
vnc_dpy_resize(vd->ds);
vnc_refresh(vd);
}
diff --git a/usb-linux.c b/usb-linux.c
index ccf7073..255009f 100644
--- a/usb-linux.c
+++ b/usb-linux.c
@@ -1535,12 +1535,12 @@ static void usb_host_auto_check(void *unused)
}
if (!usb_auto_timer) {
- usb_auto_timer = qemu_new_timer(rt_clock, usb_host_auto_check, NULL);
+ usb_auto_timer = qemu_new_timer_ms(rt_clock, usb_host_auto_check, NULL);
if (!usb_auto_timer) {
return;
}
}
- qemu_mod_timer(usb_auto_timer, qemu_get_clock(rt_clock) + 2000);
+ qemu_mod_timer(usb_auto_timer, qemu_get_clock_ms(rt_clock) + 2000);
}
/*
diff --git a/vl.c b/vl.c
index 5e007a7..c7c514c 100644
--- a/vl.c
+++ b/vl.c
@@ -1142,7 +1142,7 @@ static void gui_update(void *opaque)
interval = dcl->gui_timer_interval;
dcl = dcl->next;
}
- qemu_mod_timer(ds->gui_timer, interval + qemu_get_clock(rt_clock));
+ qemu_mod_timer(ds->gui_timer, interval + qemu_get_clock_ms(rt_clock));
}
static void nographic_update(void *opaque)
@@ -1150,7 +1150,7 @@ static void nographic_update(void *opaque)
uint64_t interval = GUI_REFRESH_INTERVAL;
qemu_flush_coalesced_mmio_buffer();
- qemu_mod_timer(nographic_timer, interval + qemu_get_clock(rt_clock));
+ qemu_mod_timer(nographic_timer, interval + qemu_get_clock_ms(rt_clock));
}
struct vm_change_state_entry {
@@ -3087,15 +3087,15 @@ int main(int argc, char **argv, char **envp)
dcl = ds->listeners;
while (dcl != NULL) {
if (dcl->dpy_refresh != NULL) {
- ds->gui_timer = qemu_new_timer(rt_clock, gui_update, ds);
- qemu_mod_timer(ds->gui_timer, qemu_get_clock(rt_clock));
+ ds->gui_timer = qemu_new_timer_ms(rt_clock, gui_update, ds);
+ qemu_mod_timer(ds->gui_timer, qemu_get_clock_ms(rt_clock));
break;
}
dcl = dcl->next;
}
if (ds->gui_timer == NULL) {
- nographic_timer = qemu_new_timer(rt_clock, nographic_update, NULL);
- qemu_mod_timer(nographic_timer, qemu_get_clock(rt_clock));
+ nographic_timer = qemu_new_timer_ms(rt_clock, nographic_update, NULL);
+ qemu_mod_timer(nographic_timer, qemu_get_clock_ms(rt_clock));
}
text_consoles_set_display(ds);
--
1.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [RFC PATCH 3/5] change all other clock references to use nanosecond resolution accessors
2011-03-12 17:04 [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 1/5] add more helper functions with explicit milli/nanosecond resolution Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 2/5] change all rt_clock references to use millisecond resolution accessors Paolo Bonzini
@ 2011-03-12 17:04 ` Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 4/5] add a generic scaling mechanism for timers Paolo Bonzini
` (2 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Paolo Bonzini @ 2011-03-12 17:04 UTC (permalink / raw)
To: qemu-devel
This was done with:
sed -i 's/qemu_get_clock\>/qemu_get_clock_ns/' \
$(git grep -l 'qemu_get_clock\>' )
sed -i 's/qemu_new_timer\>/qemu_new_timer_ns/' \
$(git grep -l 'qemu_new_timer\>' )
after checking that get_clock and new_timer never occur twice
on the same line. There were no missed occurrences; however, even
if there had been, they would have been caught by the compiler.
There was exactly one false positive in qemu_run_timers:
- current_time = qemu_get_clock (clock);
+ current_time = qemu_get_clock_ns (clock);
which is of course not in this patch.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
audio/audio.c | 4 +-
audio/noaudio.c | 4 +-
audio/spiceaudio.c | 4 +-
audio/wavaudio.c | 2 +-
hw/acpi_piix4.c | 8 +++---
hw/adlib.c | 2 +-
hw/apic.c | 8 +++---
hw/arm_sysctl.c | 2 +-
hw/armv7m_nvic.c | 8 +++---
hw/baum.c | 4 +-
hw/bt-hci-csr.c | 4 +-
hw/bt-hci.c | 12 +++++-----
hw/cuda.c | 24 +++++++++++-----------
hw/dp8393x.c | 6 ++--
hw/etraxfs_timer.c | 2 +-
hw/fdc.c | 4 +-
hw/hpet.c | 14 ++++++------
hw/i8254.c | 12 +++++-----
hw/i8259.c | 4 +-
hw/ide/core.c | 4 +-
hw/intel-hda.c | 2 +-
hw/lan9118.c | 4 +-
hw/lm832x.c | 6 ++--
hw/m48t59.c | 6 ++--
hw/mc146818rtc.c | 16 +++++++-------
hw/mips_timer.c | 10 ++++----
hw/mpcore.c | 6 ++--
hw/omap1.c | 20 +++++++++---------
hw/omap_gptimer.c | 14 ++++++------
hw/omap_synctimer.c | 2 +-
hw/pcnet.c | 6 ++--
hw/pcspk.c | 2 +-
hw/pflash_cfi01.c | 2 +-
hw/pflash_cfi02.c | 6 ++--
hw/pl031.c | 8 +++---
hw/ppc.c | 52 +++++++++++++++++++++++++-------------------------
hw/ppc405_uc.c | 6 ++--
hw/ppc_prep.c | 2 +-
hw/ptimer.c | 14 ++++++------
hw/pxa2xx.c | 2 +-
hw/pxa2xx_timer.c | 28 +++++++++++++-------------
hw/rc4030.c | 4 +-
hw/rtl8139.c | 22 ++++++++++----------
hw/sb16.c | 4 +-
hw/serial.c | 20 +++++++++---------
hw/soc_dma.c | 4 +-
hw/spitz.c | 6 ++--
hw/stellaris.c | 6 ++--
hw/sun4u.c | 12 +++++-----
hw/syborg_rtc.c | 2 +-
hw/tsc2005.c | 4 +-
hw/tsc210x.c | 20 +++++++++---------
hw/tusb6010.c | 8 +++---
hw/usb-hid.c | 6 ++--
hw/usb-musb.c | 4 +-
hw/usb-ohci.c | 8 +++---
hw/usb-uhci.c | 6 ++--
hw/vga.c | 2 +-
hw/virtio-net.c | 6 ++--
hw/vt82c686.c | 8 +++---
hw/wdt_i6300esb.c | 4 +-
hw/wdt_ib700.c | 4 +-
monitor.c | 4 +-
net/dump.c | 2 +-
qemu-timer.c | 12 +++++-----
savevm.c | 2 +-
target-ppc/kvm.c | 4 +-
target-ppc/kvm_ppc.c | 6 ++--
68 files changed, 268 insertions(+), 268 deletions(-)
diff --git a/audio/audio.c b/audio/audio.c
index 1729c0b..50d2b64 100644
--- a/audio/audio.c
+++ b/audio/audio.c
@@ -1114,7 +1114,7 @@ static int audio_is_timer_needed (void)
static void audio_reset_timer (AudioState *s)
{
if (audio_is_timer_needed ()) {
- qemu_mod_timer (s->ts, qemu_get_clock (vm_clock) + 1);
+ qemu_mod_timer (s->ts, qemu_get_clock_ns (vm_clock) + 1);
}
else {
qemu_del_timer (s->ts);
@@ -1820,7 +1820,7 @@ static void audio_init (void)
QLIST_INIT (&s->cap_head);
atexit (audio_atexit);
- s->ts = qemu_new_timer (vm_clock, audio_timer, s);
+ s->ts = qemu_new_timer_ns (vm_clock, audio_timer, s);
if (!s->ts) {
hw_error("Could not create audio timer\n");
}
diff --git a/audio/noaudio.c b/audio/noaudio.c
index 0304094..54958f8 100644
--- a/audio/noaudio.c
+++ b/audio/noaudio.c
@@ -46,7 +46,7 @@ static int no_run_out (HWVoiceOut *hw, int live)
int64_t ticks;
int64_t bytes;
- now = qemu_get_clock (vm_clock);
+ now = qemu_get_clock_ns (vm_clock);
ticks = now - no->old_ticks;
bytes = muldiv64 (ticks, hw->info.bytes_per_second, get_ticks_per_sec ());
bytes = audio_MIN (bytes, INT_MAX);
@@ -102,7 +102,7 @@ static int no_run_in (HWVoiceIn *hw)
int samples = 0;
if (dead) {
- int64_t now = qemu_get_clock (vm_clock);
+ int64_t now = qemu_get_clock_ns (vm_clock);
int64_t ticks = now - no->old_ticks;
int64_t bytes =
muldiv64 (ticks, hw->info.bytes_per_second, get_ticks_per_sec ());
diff --git a/audio/spiceaudio.c b/audio/spiceaudio.c
index a5c0d6b..f972110 100644
--- a/audio/spiceaudio.c
+++ b/audio/spiceaudio.c
@@ -81,7 +81,7 @@ static void spice_audio_fini (void *opaque)
static void rate_start (SpiceRateCtl *rate)
{
memset (rate, 0, sizeof (*rate));
- rate->start_ticks = qemu_get_clock (vm_clock);
+ rate->start_ticks = qemu_get_clock_ns (vm_clock);
}
static int rate_get_samples (struct audio_pcm_info *info, SpiceRateCtl *rate)
@@ -91,7 +91,7 @@ static int rate_get_samples (struct audio_pcm_info *info, SpiceRateCtl *rate)
int64_t bytes;
int64_t samples;
- now = qemu_get_clock (vm_clock);
+ now = qemu_get_clock_ns (vm_clock);
ticks = now - rate->start_ticks;
bytes = muldiv64 (ticks, info->bytes_per_second, get_ticks_per_sec ());
samples = (bytes - rate->bytes_sent) >> info->shift;
diff --git a/audio/wavaudio.c b/audio/wavaudio.c
index c522be4..294f357 100644
--- a/audio/wavaudio.c
+++ b/audio/wavaudio.c
@@ -52,7 +52,7 @@ static int wav_run_out (HWVoiceOut *hw, int live)
int rpos, decr, samples;
uint8_t *dst;
struct st_sample *src;
- int64_t now = qemu_get_clock (vm_clock);
+ int64_t now = qemu_get_clock_ns (vm_clock);
int64_t ticks = now - wav->old_ticks;
int64_t bytes =
muldiv64 (ticks, hw->info.bytes_per_second, get_ticks_per_sec ());
diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
index 5bbc2b5..0b2bc97 100644
--- a/hw/acpi_piix4.c
+++ b/hw/acpi_piix4.c
@@ -85,7 +85,7 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s);
static uint32_t get_pmtmr(PIIX4PMState *s)
{
uint32_t d;
- d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, get_ticks_per_sec());
+ d = muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY, get_ticks_per_sec());
return d & 0xffffff;
}
@@ -93,7 +93,7 @@ static int get_pmsts(PIIX4PMState *s)
{
int64_t d;
- d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY,
+ d = muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY,
get_ticks_per_sec());
if (d >= s->tmr_overflow_time)
s->pmsts |= ACPI_BITMASK_TIMER_STATUS;
@@ -149,7 +149,7 @@ static void pm_ioport_write(IORange *ioport, uint64_t addr, unsigned width,
pmsts = get_pmsts(s);
if (pmsts & val & ACPI_BITMASK_TIMER_STATUS) {
/* if TMRSTS is reset, then compute the new overflow time */
- d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY,
+ d = muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY,
get_ticks_per_sec());
s->tmr_overflow_time = (d + 0x800000LL) & ~0x7fffffLL;
}
@@ -413,7 +413,7 @@ static int piix4_pm_initfn(PCIDevice *dev)
register_ioport_write(s->smb_io_base, 64, 1, smb_ioport_writeb, &s->smb);
register_ioport_read(s->smb_io_base, 64, 1, smb_ioport_readb, &s->smb);
- s->tmr_timer = qemu_new_timer(vm_clock, pm_tmr_timer, s);
+ s->tmr_timer = qemu_new_timer_ns(vm_clock, pm_tmr_timer, s);
qemu_system_powerdown = *qemu_allocate_irqs(piix4_powerdown, s, 1);
diff --git a/hw/adlib.c b/hw/adlib.c
index 1d8092b..4d76d57 100644
--- a/hw/adlib.c
+++ b/hw/adlib.c
@@ -166,7 +166,7 @@ static void timer_handler (int c, double interval_Sec)
s->ticking[n] = 1;
#ifdef DEBUG
interval = get_ticks_per_sec() * interval_Sec;
- exp = qemu_get_clock (vm_clock) + interval;
+ exp = qemu_get_clock_ns (vm_clock) + interval;
s->exp[n] = exp;
#endif
diff --git a/hw/apic.c b/hw/apic.c
index 218d1bb..9febf40 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -641,7 +641,7 @@ static uint32_t apic_get_current_count(APICState *s)
{
int64_t d;
uint32_t val;
- d = (qemu_get_clock(vm_clock) - s->initial_count_load_time) >>
+ d = (qemu_get_clock_ns(vm_clock) - s->initial_count_load_time) >>
s->count_shift;
if (s->lvt[APIC_LVT_TIMER] & APIC_LVT_TIMER_PERIODIC) {
/* periodic */
@@ -865,12 +865,12 @@ static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
int n = index - 0x32;
s->lvt[n] = val;
if (n == APIC_LVT_TIMER)
- apic_timer_update(s, qemu_get_clock(vm_clock));
+ apic_timer_update(s, qemu_get_clock_ns(vm_clock));
}
break;
case 0x38:
s->initial_count = val;
- s->initial_count_load_time = qemu_get_clock(vm_clock);
+ s->initial_count_load_time = qemu_get_clock_ns(vm_clock);
apic_timer_update(s, s->initial_count_load_time);
break;
case 0x39:
@@ -1005,7 +1005,7 @@ static int apic_init1(SysBusDevice *dev)
DEVICE_NATIVE_ENDIAN);
sysbus_init_mmio(dev, MSI_ADDR_SIZE, apic_io_memory);
- s->timer = qemu_new_timer(vm_clock, apic_timer, s);
+ s->timer = qemu_new_timer_ns(vm_clock, apic_timer, s);
s->idx = last_apic_idx++;
local_apics[s->idx] = s;
return 0;
diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c
index 799b007..a759430 100644
--- a/hw/arm_sysctl.c
+++ b/hw/arm_sysctl.c
@@ -118,7 +118,7 @@ static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset)
case 0x58: /* BOOTCS */
return 0;
case 0x5c: /* 24MHz */
- return muldiv64(qemu_get_clock(vm_clock), 24000000, get_ticks_per_sec());
+ return muldiv64(qemu_get_clock_ns(vm_clock), 24000000, get_ticks_per_sec());
case 0x60: /* MISC */
return 0;
case 0x84: /* PROCID0 */
diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c
index 6c7ce01..ffe16b8 100644
--- a/hw/armv7m_nvic.c
+++ b/hw/armv7m_nvic.c
@@ -64,7 +64,7 @@ static inline int64_t systick_scale(nvic_state *s)
static void systick_reload(nvic_state *s, int reset)
{
if (reset)
- s->systick.tick = qemu_get_clock(vm_clock);
+ s->systick.tick = qemu_get_clock_ns(vm_clock);
s->systick.tick += (s->systick.reload + 1) * systick_scale(s);
qemu_mod_timer(s->systick.timer, s->systick.tick);
}
@@ -136,7 +136,7 @@ static uint32_t nvic_readl(void *opaque, uint32_t offset)
int64_t t;
if ((s->systick.control & SYSTICK_ENABLE) == 0)
return 0;
- t = qemu_get_clock(vm_clock);
+ t = qemu_get_clock_ns(vm_clock);
if (t >= s->systick.tick)
return 0;
val = ((s->systick.tick - (t + 1)) / systick_scale(s)) + 1;
@@ -273,7 +273,7 @@ static void nvic_writel(void *opaque, uint32_t offset, uint32_t value)
s->systick.control &= 0xfffffff8;
s->systick.control |= value & 7;
if ((oldval ^ value) & SYSTICK_ENABLE) {
- int64_t now = qemu_get_clock(vm_clock);
+ int64_t now = qemu_get_clock_ns(vm_clock);
if (value & SYSTICK_ENABLE) {
if (s->systick.tick) {
s->systick.tick += now;
@@ -396,7 +396,7 @@ static int armv7m_nvic_init(SysBusDevice *dev)
gic_init(&s->gic);
cpu_register_physical_memory(0xe000e000, 0x1000, s->gic.iomemtype);
- s->systick.timer = qemu_new_timer(vm_clock, systick_timer_tick, s);
+ s->systick.timer = qemu_new_timer_ns(vm_clock, systick_timer_tick, s);
register_savevm(&dev->qdev, "armv7m_nvic", -1, 1, nvic_save, nvic_load, s);
return 0;
}
diff --git a/hw/baum.c b/hw/baum.c
index 21326ae..2aaf5ff 100644
--- a/hw/baum.c
+++ b/hw/baum.c
@@ -335,7 +335,7 @@ static int baum_eat_packet(BaumDriverState *baum, const uint8_t *buf, int len)
int i;
/* Allow 100ms to complete the DisplayData packet */
- qemu_mod_timer(baum->cellCount_timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(baum->cellCount_timer, qemu_get_clock_ns(vm_clock) +
get_ticks_per_sec() / 10);
for (i = 0; i < baum->x * baum->y ; i++) {
EAT(c);
@@ -604,7 +604,7 @@ CharDriverState *chr_baum_init(QemuOpts *opts)
goto fail_handle;
}
- baum->cellCount_timer = qemu_new_timer(vm_clock, baum_cellCount_timer_cb, baum);
+ baum->cellCount_timer = qemu_new_timer_ns(vm_clock, baum_cellCount_timer_cb, baum);
if (brlapi__getDisplaySize(handle, &baum->x, &baum->y) == -1) {
brlapi_perror("baum_init: brlapi_getDisplaySize");
diff --git a/hw/bt-hci-csr.c b/hw/bt-hci-csr.c
index 982577d..65ffa37 100644
--- a/hw/bt-hci-csr.c
+++ b/hw/bt-hci-csr.c
@@ -88,7 +88,7 @@ static inline void csrhci_fifo_wake(struct csrhci_s *s)
}
if (s->out_len)
- qemu_mod_timer(s->out_tm, qemu_get_clock(vm_clock) + s->baud_delay);
+ qemu_mod_timer(s->out_tm, qemu_get_clock_ns(vm_clock) + s->baud_delay);
}
#define csrhci_out_packetz(s, len) memset(csrhci_out_packet(s, len), 0, len)
@@ -446,7 +446,7 @@ CharDriverState *uart_hci_init(qemu_irq wakeup)
s->hci->evt_recv = csrhci_out_hci_packet_event;
s->hci->acl_recv = csrhci_out_hci_packet_acl;
- s->out_tm = qemu_new_timer(vm_clock, csrhci_out_tick, s);
+ s->out_tm = qemu_new_timer_ns(vm_clock, csrhci_out_tick, s);
s->pins = qemu_allocate_irqs(csrhci_pins, s, __csrhci_pins);
csrhci_reset(s);
diff --git a/hw/bt-hci.c b/hw/bt-hci.c
index f1ee92c..41df24c 100644
--- a/hw/bt-hci.c
+++ b/hw/bt-hci.c
@@ -576,7 +576,7 @@ static void bt_hci_inquiry_result(struct bt_hci_s *hci,
static void bt_hci_mod_timer_1280ms(QEMUTimer *timer, int period)
{
- qemu_mod_timer(timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(timer, qemu_get_clock_ns(vm_clock) +
muldiv64(period << 7, get_ticks_per_sec(), 100));
}
@@ -657,7 +657,7 @@ static void bt_hci_lmp_link_establish(struct bt_hci_s *hci,
if (master) {
link->acl_mode = acl_active;
hci->lm.handle[hci->lm.last_handle].acl_mode_timer =
- qemu_new_timer(vm_clock, bt_hci_mode_tick, link);
+ qemu_new_timer_ns(vm_clock, bt_hci_mode_tick, link);
}
}
@@ -1084,7 +1084,7 @@ static int bt_hci_mode_change(struct bt_hci_s *hci, uint16_t handle,
bt_hci_event_status(hci, HCI_SUCCESS);
- qemu_mod_timer(link->acl_mode_timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(link->acl_mode_timer, qemu_get_clock_ns(vm_clock) +
muldiv64(interval * 625, get_ticks_per_sec(), 1000000));
bt_hci_lmp_mode_change_master(hci, link->link, mode, interval);
@@ -2145,10 +2145,10 @@ struct HCIInfo *bt_new_hci(struct bt_scatternet_s *net)
{
struct bt_hci_s *s = qemu_mallocz(sizeof(struct bt_hci_s));
- s->lm.inquiry_done = qemu_new_timer(vm_clock, bt_hci_inquiry_done, s);
- s->lm.inquiry_next = qemu_new_timer(vm_clock, bt_hci_inquiry_next, s);
+ s->lm.inquiry_done = qemu_new_timer_ns(vm_clock, bt_hci_inquiry_done, s);
+ s->lm.inquiry_next = qemu_new_timer_ns(vm_clock, bt_hci_inquiry_next, s);
s->conn_accept_timer =
- qemu_new_timer(vm_clock, bt_hci_conn_accept_timeout, s);
+ qemu_new_timer_ns(vm_clock, bt_hci_conn_accept_timeout, s);
s->evt_packet = bt_hci_evt_packet;
s->evt_submit = bt_hci_evt_submit;
diff --git a/hw/cuda.c b/hw/cuda.c
index e4c178d..37aa3f4 100644
--- a/hw/cuda.c
+++ b/hw/cuda.c
@@ -170,7 +170,7 @@ static unsigned int get_counter(CUDATimer *s)
int64_t d;
unsigned int counter;
- d = muldiv64(qemu_get_clock(vm_clock) - s->load_time,
+ d = muldiv64(qemu_get_clock_ns(vm_clock) - s->load_time,
CUDA_TIMER_FREQ, get_ticks_per_sec());
if (s->index == 0) {
/* the timer goes down from latch to -1 (period of latch + 2) */
@@ -189,7 +189,7 @@ static unsigned int get_counter(CUDATimer *s)
static void set_counter(CUDAState *s, CUDATimer *ti, unsigned int val)
{
CUDA_DPRINTF("T%d.counter=%d\n", 1 + (ti->timer == NULL), val);
- ti->load_time = qemu_get_clock(vm_clock);
+ ti->load_time = qemu_get_clock_ns(vm_clock);
ti->counter_value = val;
cuda_timer_update(s, ti, ti->load_time);
}
@@ -346,7 +346,7 @@ static void cuda_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
break;
case 4:
s->timers[0].latch = (s->timers[0].latch & 0xff00) | val;
- cuda_timer_update(s, &s->timers[0], qemu_get_clock(vm_clock));
+ cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock));
break;
case 5:
s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8);
@@ -355,12 +355,12 @@ static void cuda_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
break;
case 6:
s->timers[0].latch = (s->timers[0].latch & 0xff00) | val;
- cuda_timer_update(s, &s->timers[0], qemu_get_clock(vm_clock));
+ cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock));
break;
case 7:
s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8);
s->ifr &= ~T1_INT;
- cuda_timer_update(s, &s->timers[0], qemu_get_clock(vm_clock));
+ cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock));
break;
case 8:
s->timers[1].latch = val;
@@ -374,7 +374,7 @@ static void cuda_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
break;
case 11:
s->acr = val;
- cuda_timer_update(s, &s->timers[0], qemu_get_clock(vm_clock));
+ cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock));
cuda_update(s);
break;
case 12:
@@ -506,7 +506,7 @@ static void cuda_adb_poll(void *opaque)
cuda_send_packet_to_host(s, obuf, olen + 2);
}
qemu_mod_timer(s->adb_poll_timer,
- qemu_get_clock(vm_clock) +
+ qemu_get_clock_ns(vm_clock) +
(get_ticks_per_sec() / CUDA_ADB_POLL_FREQ));
}
@@ -524,7 +524,7 @@ static void cuda_receive_packet(CUDAState *s,
s->autopoll = autopoll;
if (autopoll) {
qemu_mod_timer(s->adb_poll_timer,
- qemu_get_clock(vm_clock) +
+ qemu_get_clock_ns(vm_clock) +
(get_ticks_per_sec() / CUDA_ADB_POLL_FREQ));
} else {
qemu_del_timer(s->adb_poll_timer);
@@ -536,14 +536,14 @@ static void cuda_receive_packet(CUDAState *s,
break;
case CUDA_SET_TIME:
ti = (((uint32_t)data[1]) << 24) + (((uint32_t)data[2]) << 16) + (((uint32_t)data[3]) << 8) + data[4];
- s->tick_offset = ti - (qemu_get_clock(vm_clock) / get_ticks_per_sec());
+ s->tick_offset = ti - (qemu_get_clock_ns(vm_clock) / get_ticks_per_sec());
obuf[0] = CUDA_PACKET;
obuf[1] = 0;
obuf[2] = 0;
cuda_send_packet_to_host(s, obuf, 3);
break;
case CUDA_GET_TIME:
- ti = s->tick_offset + (qemu_get_clock(vm_clock) / get_ticks_per_sec());
+ ti = s->tick_offset + (qemu_get_clock_ns(vm_clock) / get_ticks_per_sec());
obuf[0] = CUDA_PACKET;
obuf[1] = 0;
obuf[2] = 0;
@@ -754,14 +754,14 @@ void cuda_init (int *cuda_mem_index, qemu_irq irq)
s->irq = irq;
s->timers[0].index = 0;
- s->timers[0].timer = qemu_new_timer(vm_clock, cuda_timer1, s);
+ s->timers[0].timer = qemu_new_timer_ns(vm_clock, cuda_timer1, s);
s->timers[1].index = 1;
qemu_get_timedate(&tm, 0);
s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
- s->adb_poll_timer = qemu_new_timer(vm_clock, cuda_adb_poll, s);
+ s->adb_poll_timer = qemu_new_timer_ns(vm_clock, cuda_adb_poll, s);
*cuda_mem_index = cpu_register_io_memory(cuda_read, cuda_write, s,
DEVICE_NATIVE_ENDIAN);
register_savevm(NULL, "cuda", -1, 1, cuda_save, cuda_load, s);
diff --git a/hw/dp8393x.c b/hw/dp8393x.c
index 0ef8abe..c332dd5 100644
--- a/hw/dp8393x.c
+++ b/hw/dp8393x.c
@@ -290,7 +290,7 @@ static void set_next_tick(dp8393xState *s)
}
ticks = s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0];
- s->wt_last_update = qemu_get_clock(vm_clock);
+ s->wt_last_update = qemu_get_clock_ns(vm_clock);
delay = get_ticks_per_sec() * ticks / 5000000;
qemu_mod_timer(s->watchdog, s->wt_last_update + delay);
}
@@ -305,7 +305,7 @@ static void update_wt_regs(dp8393xState *s)
return;
}
- elapsed = s->wt_last_update - qemu_get_clock(vm_clock);
+ elapsed = s->wt_last_update - qemu_get_clock_ns(vm_clock);
val = s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0];
val -= elapsed / 5000000;
s->regs[SONIC_WT1] = (val >> 16) & 0xffff;
@@ -895,7 +895,7 @@ void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
s->memory_rw = memory_rw;
s->it_shift = it_shift;
s->irq = irq;
- s->watchdog = qemu_new_timer(vm_clock, dp8393x_watchdog, s);
+ s->watchdog = qemu_new_timer_ns(vm_clock, dp8393x_watchdog, s);
s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */
memcpy(s->conf.macaddr.a, nd->macaddr, sizeof(s->conf.macaddr));
diff --git a/hw/etraxfs_timer.c b/hw/etraxfs_timer.c
index 133741b..b08e574 100644
--- a/hw/etraxfs_timer.c
+++ b/hw/etraxfs_timer.c
@@ -85,7 +85,7 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
r = ptimer_get_count(t->ptimer_t1);
break;
case R_TIME:
- r = qemu_get_clock(vm_clock) / 10;
+ r = qemu_get_clock_ns(vm_clock) / 10;
break;
case RW_INTR_MASK:
r = t->rw_intr_mask;
diff --git a/hw/fdc.c b/hw/fdc.c
index 9f4779c..9fdbc75 100644
--- a/hw/fdc.c
+++ b/hw/fdc.c
@@ -1423,7 +1423,7 @@ static void fdctrl_handle_readid(FDCtrl *fdctrl, int direction)
/* XXX: should set main status register to busy */
cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
qemu_mod_timer(fdctrl->result_timer,
- qemu_get_clock(vm_clock) + (get_ticks_per_sec() / 50));
+ qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 50));
}
static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction)
@@ -1830,7 +1830,7 @@ static int fdctrl_init_common(FDCtrl *fdctrl)
FLOPPY_DPRINTF("init controller\n");
fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
fdctrl->fifo_size = 512;
- fdctrl->result_timer = qemu_new_timer(vm_clock,
+ fdctrl->result_timer = qemu_new_timer_ns(vm_clock,
fdctrl_result_timer, fdctrl);
fdctrl->version = 0x90; /* Intel 82078 controller */
diff --git a/hw/hpet.c b/hw/hpet.c
index 91ebb75..ef9a2a0 100644
--- a/hw/hpet.c
+++ b/hw/hpet.c
@@ -143,7 +143,7 @@ static int deactivating_bit(uint64_t old, uint64_t new, uint64_t mask)
static uint64_t hpet_get_ticks(HPETState *s)
{
- return ns_to_ticks(qemu_get_clock(vm_clock) + s->hpet_offset);
+ return ns_to_ticks(qemu_get_clock_ns(vm_clock) + s->hpet_offset);
}
/*
@@ -224,7 +224,7 @@ static int hpet_post_load(void *opaque, int version_id)
HPETState *s = opaque;
/* Recalculate the offset between the main counter and guest time */
- s->hpet_offset = ticks_to_ns(s->hpet_counter) - qemu_get_clock(vm_clock);
+ s->hpet_offset = ticks_to_ns(s->hpet_counter) - qemu_get_clock_ns(vm_clock);
/* Push number of timers into capability returned via HPET_ID */
s->capability &= ~HPET_ID_NUM_TIM_MASK;
@@ -298,11 +298,11 @@ static void hpet_timer(void *opaque)
}
diff = hpet_calculate_diff(t, cur_tick);
qemu_mod_timer(t->qemu_timer,
- qemu_get_clock(vm_clock) + (int64_t)ticks_to_ns(diff));
+ qemu_get_clock_ns(vm_clock) + (int64_t)ticks_to_ns(diff));
} else if (t->config & HPET_TN_32BIT && !timer_is_periodic(t)) {
if (t->wrap_flag) {
diff = hpet_calculate_diff(t, cur_tick);
- qemu_mod_timer(t->qemu_timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(t->qemu_timer, qemu_get_clock_ns(vm_clock) +
(int64_t)ticks_to_ns(diff));
t->wrap_flag = 0;
}
@@ -331,7 +331,7 @@ static void hpet_set_timer(HPETTimer *t)
}
}
qemu_mod_timer(t->qemu_timer,
- qemu_get_clock(vm_clock) + (int64_t)ticks_to_ns(diff));
+ qemu_get_clock_ns(vm_clock) + (int64_t)ticks_to_ns(diff));
}
static void hpet_del_timer(HPETTimer *t)
@@ -547,7 +547,7 @@ static void hpet_ram_writel(void *opaque, target_phys_addr_t addr,
if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) {
/* Enable main counter and interrupt generation. */
s->hpet_offset =
- ticks_to_ns(s->hpet_counter) - qemu_get_clock(vm_clock);
+ ticks_to_ns(s->hpet_counter) - qemu_get_clock_ns(vm_clock);
for (i = 0; i < s->num_timers; i++) {
if ((&s->timer[i])->cmp != ~0ULL) {
hpet_set_timer(&s->timer[i]);
@@ -703,7 +703,7 @@ static int hpet_init(SysBusDevice *dev)
}
for (i = 0; i < HPET_MAX_TIMERS; i++) {
timer = &s->timer[i];
- timer->qemu_timer = qemu_new_timer(vm_clock, hpet_timer, timer);
+ timer->qemu_timer = qemu_new_timer_ns(vm_clock, hpet_timer, timer);
timer->tn = i;
timer->state = s;
}
diff --git a/hw/i8254.c b/hw/i8254.c
index eaf5d3e..1746865 100644
--- a/hw/i8254.c
+++ b/hw/i8254.c
@@ -69,7 +69,7 @@ static int pit_get_count(PITChannelState *s)
uint64_t d;
int counter;
- d = muldiv64(qemu_get_clock(vm_clock) - s->count_load_time, PIT_FREQ,
+ d = muldiv64(qemu_get_clock_ns(vm_clock) - s->count_load_time, PIT_FREQ,
get_ticks_per_sec());
switch(s->mode) {
case 0:
@@ -198,7 +198,7 @@ void pit_set_gate(ISADevice *dev, int channel, int val)
case 5:
if (s->gate < val) {
/* restart counting on rising edge */
- s->count_load_time = qemu_get_clock(vm_clock);
+ s->count_load_time = qemu_get_clock_ns(vm_clock);
pit_irq_timer_update(s, s->count_load_time);
}
break;
@@ -206,7 +206,7 @@ void pit_set_gate(ISADevice *dev, int channel, int val)
case 3:
if (s->gate < val) {
/* restart counting on rising edge */
- s->count_load_time = qemu_get_clock(vm_clock);
+ s->count_load_time = qemu_get_clock_ns(vm_clock);
pit_irq_timer_update(s, s->count_load_time);
}
/* XXX: disable/enable counting */
@@ -240,7 +240,7 @@ static inline void pit_load_count(PITChannelState *s, int val)
{
if (val == 0)
val = 0x10000;
- s->count_load_time = qemu_get_clock(vm_clock);
+ s->count_load_time = qemu_get_clock_ns(vm_clock);
s->count = val;
pit_irq_timer_update(s, s->count_load_time);
}
@@ -274,7 +274,7 @@ static void pit_ioport_write(void *opaque, uint32_t addr, uint32_t val)
if (!(val & 0x10) && !s->status_latched) {
/* status latch */
/* XXX: add BCD and null count */
- s->status = (pit_get_out1(s, qemu_get_clock(vm_clock)) << 7) |
+ s->status = (pit_get_out1(s, qemu_get_clock_ns(vm_clock)) << 7) |
(s->rw_mode << 4) |
(s->mode << 1) |
s->bcd;
@@ -513,7 +513,7 @@ static int pit_initfn(ISADevice *dev)
s = &pit->channels[0];
/* the timer 0 is connected to an IRQ */
- s->irq_timer = qemu_new_timer(vm_clock, pit_irq_timer, s);
+ s->irq_timer = qemu_new_timer_ns(vm_clock, pit_irq_timer, s);
s->irq = isa_get_irq(pit->irq);
register_ioport_write(pit->iobase, 4, 1, pit_ioport_write, pit);
diff --git a/hw/i8259.c b/hw/i8259.c
index a8dbee6..84d330d 100644
--- a/hw/i8259.c
+++ b/hw/i8259.c
@@ -202,7 +202,7 @@ static void i8259_set_irq(void *opaque, int irq, int level)
#endif
#ifdef DEBUG_IRQ_LATENCY
if (level) {
- irq_time[irq] = qemu_get_clock(vm_clock);
+ irq_time[irq] = qemu_get_clock_ns(vm_clock);
}
#endif
pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
@@ -255,7 +255,7 @@ int pic_read_irq(PicState2 *s)
#ifdef DEBUG_IRQ_LATENCY
printf("IRQ%d latency=%0.3fus\n",
irq,
- (double)(qemu_get_clock(vm_clock) -
+ (double)(qemu_get_clock_ns(vm_clock) -
irq_time[irq]) * 1000000.0 / get_ticks_per_sec());
#endif
DPRINTF("pic_interrupt: irq=%d\n", irq);
diff --git a/hw/ide/core.c b/hw/ide/core.c
index 9c91a49..294d237 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -598,7 +598,7 @@ void ide_sector_write(IDEState *s)
option _only_ to install Windows 2000. You must disable it
for normal use. */
qemu_mod_timer(s->sector_write_timer,
- qemu_get_clock(vm_clock) + (get_ticks_per_sec() / 1000));
+ qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 1000));
} else {
ide_set_irq(s->bus);
}
@@ -2570,7 +2570,7 @@ static void ide_init1(IDEBus *bus, int unit)
s->io_buffer = qemu_memalign(2048, IDE_DMA_BUF_SECTORS*512 + 4);
s->io_buffer_total_len = IDE_DMA_BUF_SECTORS*512 + 4;
s->smart_selftest_data = qemu_blockalign(s->bs, 512);
- s->sector_write_timer = qemu_new_timer(vm_clock,
+ s->sector_write_timer = qemu_new_timer_ns(vm_clock,
ide_sector_write_timer_cb, s);
}
diff --git a/hw/intel-hda.c b/hw/intel-hda.c
index b2b6708..b0b1d12 100644
--- a/hw/intel-hda.c
+++ b/hw/intel-hda.c
@@ -1126,7 +1126,7 @@ static void intel_hda_reset(DeviceState *dev)
HDACodecDevice *cdev;
intel_hda_regs_reset(d);
- d->wall_base_ns = qemu_get_clock(vm_clock);
+ d->wall_base_ns = qemu_get_clock_ns(vm_clock);
/* reset codecs */
QLIST_FOREACH(qdev, &d->codecs.qbus.children, sibling) {
diff --git a/hw/lan9118.c b/hw/lan9118.c
index 9cc7952..af6949f 100644
--- a/hw/lan9118.c
+++ b/hw/lan9118.c
@@ -327,7 +327,7 @@ static void lan9118_reset(DeviceState *d)
s->afc_cfg = 0;
s->e2p_cmd = 0;
s->e2p_data = 0;
- s->free_timer_start = qemu_get_clock(vm_clock) / 40;
+ s->free_timer_start = qemu_get_clock_ns(vm_clock) / 40;
ptimer_stop(s->timer);
ptimer_set_count(s->timer, 0xffff);
@@ -1070,7 +1070,7 @@ static uint32_t lan9118_readl(void *opaque, target_phys_addr_t offset)
case CSR_WORD_SWAP:
return s->word_swap;
case CSR_FREE_RUN:
- return (qemu_get_clock(vm_clock) / 40) - s->free_timer_start;
+ return (qemu_get_clock_ns(vm_clock) / 40) - s->free_timer_start;
case CSR_RX_DROP:
/* TODO: Implement dropped frames counter. */
return 0;
diff --git a/hw/lm832x.c b/hw/lm832x.c
index ce7dcac..590a4cc 100644
--- a/hw/lm832x.c
+++ b/hw/lm832x.c
@@ -463,9 +463,9 @@ static int lm8323_init(i2c_slave *i2c)
LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
s->model = 0x8323;
- s->pwm.tm[0] = qemu_new_timer(vm_clock, lm_kbd_pwm0_tick, s);
- s->pwm.tm[1] = qemu_new_timer(vm_clock, lm_kbd_pwm1_tick, s);
- s->pwm.tm[2] = qemu_new_timer(vm_clock, lm_kbd_pwm2_tick, s);
+ s->pwm.tm[0] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm0_tick, s);
+ s->pwm.tm[1] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm1_tick, s);
+ s->pwm.tm[2] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm2_tick, s);
qdev_init_gpio_out(&i2c->qdev, &s->nirq, 1);
lm_kbd_reset(s);
diff --git a/hw/m48t59.c b/hw/m48t59.c
index 2020487..9f39d6b 100644
--- a/hw/m48t59.c
+++ b/hw/m48t59.c
@@ -123,7 +123,7 @@ static void alarm_cb (void *opaque)
/* Repeat once a second */
next_time = 1;
}
- qemu_mod_timer(NVRAM->alrm_timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(NVRAM->alrm_timer, qemu_get_clock_ns(vm_clock) +
next_time * 1000);
qemu_set_irq(NVRAM->IRQ, 0);
}
@@ -691,8 +691,8 @@ static void m48t59_init_common(M48t59State *s)
{
s->buffer = qemu_mallocz(s->size);
if (s->type == 59) {
- s->alrm_timer = qemu_new_timer(vm_clock, &alarm_cb, s);
- s->wd_timer = qemu_new_timer(vm_clock, &watchdog_cb, s);
+ s->alrm_timer = qemu_new_timer_ns(vm_clock, &alarm_cb, s);
+ s->wd_timer = qemu_new_timer_ns(vm_clock, &watchdog_cb, s);
}
qemu_get_timedate(&s->alarm, 0);
diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index a1b0e31..1c9a706 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -112,7 +112,7 @@ static void rtc_coalesced_timer_update(RTCState *s)
} else {
/* divide each RTC interval to 2 - 8 smaller intervals */
int c = MIN(s->irq_coalesced, 7) + 1;
- int64_t next_clock = qemu_get_clock(rtc_clock) +
+ int64_t next_clock = qemu_get_clock_ns(rtc_clock) +
muldiv64(s->period / c, get_ticks_per_sec(), 32768);
qemu_mod_timer(s->coalesced_timer, next_clock);
}
@@ -234,7 +234,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data)
/* UIP bit is read only */
s->cmos_data[RTC_REG_A] = (data & ~REG_A_UIP) |
(s->cmos_data[RTC_REG_A] & REG_A_UIP);
- rtc_timer_update(s, qemu_get_clock(rtc_clock));
+ rtc_timer_update(s, qemu_get_clock_ns(rtc_clock));
break;
case RTC_REG_B:
if (data & REG_B_SET) {
@@ -256,7 +256,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data)
} else {
s->cmos_data[RTC_REG_B] = data;
}
- rtc_timer_update(s, qemu_get_clock(rtc_clock));
+ rtc_timer_update(s, qemu_get_clock_ns(rtc_clock));
break;
case RTC_REG_C:
case RTC_REG_D:
@@ -599,17 +599,17 @@ static int rtc_initfn(ISADevice *dev)
rtc_set_date_from_host(dev);
- s->periodic_timer = qemu_new_timer(rtc_clock, rtc_periodic_timer, s);
+ s->periodic_timer = qemu_new_timer_ns(rtc_clock, rtc_periodic_timer, s);
#ifdef TARGET_I386
if (rtc_td_hack)
s->coalesced_timer =
- qemu_new_timer(rtc_clock, rtc_coalesced_timer, s);
+ qemu_new_timer_ns(rtc_clock, rtc_coalesced_timer, s);
#endif
- s->second_timer = qemu_new_timer(rtc_clock, rtc_update_second, s);
- s->second_timer2 = qemu_new_timer(rtc_clock, rtc_update_second2, s);
+ s->second_timer = qemu_new_timer_ns(rtc_clock, rtc_update_second, s);
+ s->second_timer2 = qemu_new_timer_ns(rtc_clock, rtc_update_second2, s);
s->next_second_time =
- qemu_get_clock(rtc_clock) + (get_ticks_per_sec() * 99) / 100;
+ qemu_get_clock_ns(rtc_clock) + (get_ticks_per_sec() * 99) / 100;
qemu_mod_timer(s->second_timer2, s->next_second_time);
register_ioport_write(base, 2, 1, cmos_ioport_write, s);
diff --git a/hw/mips_timer.c b/hw/mips_timer.c
index 9c95f28..cf6ac69 100644
--- a/hw/mips_timer.c
+++ b/hw/mips_timer.c
@@ -47,7 +47,7 @@ static void cpu_mips_timer_update(CPUState *env)
uint64_t now, next;
uint32_t wait;
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
wait = env->CP0_Compare - env->CP0_Count -
(uint32_t)muldiv64(now, TIMER_FREQ, get_ticks_per_sec());
next = now + muldiv64(wait, get_ticks_per_sec(), TIMER_FREQ);
@@ -71,7 +71,7 @@ uint32_t cpu_mips_get_count (CPUState *env)
} else {
uint64_t now;
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
if (qemu_timer_pending(env->timer)
&& qemu_timer_expired(env->timer, now)) {
/* The timer has already expired. */
@@ -90,7 +90,7 @@ void cpu_mips_store_count (CPUState *env, uint32_t count)
else {
/* Store new count register */
env->CP0_Count =
- count - (uint32_t)muldiv64(qemu_get_clock(vm_clock),
+ count - (uint32_t)muldiv64(qemu_get_clock_ns(vm_clock),
TIMER_FREQ, get_ticks_per_sec());
/* Update timer timer */
cpu_mips_timer_update(env);
@@ -115,7 +115,7 @@ void cpu_mips_start_count(CPUState *env)
void cpu_mips_stop_count(CPUState *env)
{
/* Store the current value */
- env->CP0_Count += (uint32_t)muldiv64(qemu_get_clock(vm_clock),
+ env->CP0_Count += (uint32_t)muldiv64(qemu_get_clock_ns(vm_clock),
TIMER_FREQ, get_ticks_per_sec());
}
@@ -141,7 +141,7 @@ static void mips_timer_cb (void *opaque)
void cpu_mips_clock_init (CPUState *env)
{
- env->timer = qemu_new_timer(vm_clock, &mips_timer_cb, env);
+ env->timer = qemu_new_timer_ns(vm_clock, &mips_timer_cb, env);
env->CP0_Compare = 0;
cpu_mips_store_count(env, 1);
}
diff --git a/hw/mpcore.c b/hw/mpcore.c
index fc05215..379065a 100644
--- a/hw/mpcore.c
+++ b/hw/mpcore.c
@@ -63,7 +63,7 @@ static void mpcore_timer_reload(mpcore_timer_state *s, int restart)
if (s->count == 0)
return;
if (restart)
- s->tick = qemu_get_clock(vm_clock);
+ s->tick = qemu_get_clock_ns(vm_clock);
s->tick += (int64_t)s->count * mpcore_timer_scale(s);
qemu_mod_timer(s->timer, s->tick);
}
@@ -92,7 +92,7 @@ static uint32_t mpcore_timer_read(mpcore_timer_state *s, int offset)
if (((s->control & 1) == 0) || (s->count == 0))
return 0;
/* Slow and ugly, but hopefully won't happen too often. */
- val = s->tick - qemu_get_clock(vm_clock);
+ val = s->tick - qemu_get_clock_ns(vm_clock);
val /= mpcore_timer_scale(s);
if (val < 0)
val = 0;
@@ -145,7 +145,7 @@ static void mpcore_timer_init(mpcore_priv_state *mpcore,
{
s->id = id;
s->mpcore = mpcore;
- s->timer = qemu_new_timer(vm_clock, mpcore_timer_tick, s);
+ s->timer = qemu_new_timer_ns(vm_clock, mpcore_timer_tick, s);
}
diff --git a/hw/omap1.c b/hw/omap1.c
index f2be4de..364c26f 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -101,7 +101,7 @@ struct omap_mpu_timer_s {
static inline uint32_t omap_timer_read(struct omap_mpu_timer_s *timer)
{
- uint64_t distance = qemu_get_clock(vm_clock) - timer->time;
+ uint64_t distance = qemu_get_clock_ns(vm_clock) - timer->time;
if (timer->st && timer->enable && timer->rate)
return timer->val - muldiv64(distance >> (timer->ptv + 1),
@@ -113,7 +113,7 @@ static inline uint32_t omap_timer_read(struct omap_mpu_timer_s *timer)
static inline void omap_timer_sync(struct omap_mpu_timer_s *timer)
{
timer->val = omap_timer_read(timer);
- timer->time = qemu_get_clock(vm_clock);
+ timer->time = qemu_get_clock_ns(vm_clock);
}
static inline void omap_timer_update(struct omap_mpu_timer_s *timer)
@@ -258,7 +258,7 @@ static struct omap_mpu_timer_s *omap_mpu_timer_init(target_phys_addr_t base,
s->irq = irq;
s->clk = clk;
- s->timer = qemu_new_timer(vm_clock, omap_timer_tick, s);
+ s->timer = qemu_new_timer_ns(vm_clock, omap_timer_tick, s);
s->tick = qemu_bh_new(omap_timer_fire, s);
omap_mpu_timer_reset(s);
omap_timer_clk_setup(s);
@@ -382,7 +382,7 @@ static struct omap_watchdog_timer_s *omap_wd_timer_init(target_phys_addr_t base,
s->timer.irq = irq;
s->timer.clk = clk;
- s->timer.timer = qemu_new_timer(vm_clock, omap_timer_tick, &s->timer);
+ s->timer.timer = qemu_new_timer_ns(vm_clock, omap_timer_tick, &s->timer);
omap_wd_timer_reset(s);
omap_timer_clk_setup(&s->timer);
@@ -484,7 +484,7 @@ static struct omap_32khz_timer_s *omap_os_timer_init(target_phys_addr_t base,
s->timer.irq = irq;
s->timer.clk = clk;
- s->timer.timer = qemu_new_timer(vm_clock, omap_timer_tick, &s->timer);
+ s->timer.timer = qemu_new_timer_ns(vm_clock, omap_timer_tick, &s->timer);
omap_os_timer_reset(s);
omap_timer_clk_setup(&s->timer);
@@ -580,7 +580,7 @@ static void omap_ulpd_pm_write(void *opaque, target_phys_addr_t addr,
case 0x10: /* GAUGING_CTRL */
/* Bits 0 and 1 seem to be confused in the OMAP 310 TRM */
if ((s->ulpd_pm_regs[addr >> 2] ^ value) & 1) {
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
if (value & 1)
s->ulpd_gauge_start = now;
@@ -2915,7 +2915,7 @@ static void omap_mcbsp_source_tick(void *opaque)
s->rx_req = s->rx_rate << bps[(s->rcr[0] >> 5) & 7];
omap_mcbsp_rx_newdata(s);
- qemu_mod_timer(s->source_timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(s->source_timer, qemu_get_clock_ns(vm_clock) +
get_ticks_per_sec());
}
@@ -2961,7 +2961,7 @@ static void omap_mcbsp_sink_tick(void *opaque)
s->tx_req = s->tx_rate << bps[(s->xcr[0] >> 5) & 7];
omap_mcbsp_tx_newdata(s);
- qemu_mod_timer(s->sink_timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(s->sink_timer, qemu_get_clock_ns(vm_clock) +
get_ticks_per_sec());
}
@@ -3344,8 +3344,8 @@ struct omap_mcbsp_s *omap_mcbsp_init(target_phys_addr_t base,
s->rxirq = irq[1];
s->txdrq = dma[0];
s->rxdrq = dma[1];
- s->sink_timer = qemu_new_timer(vm_clock, omap_mcbsp_sink_tick, s);
- s->source_timer = qemu_new_timer(vm_clock, omap_mcbsp_source_tick, s);
+ s->sink_timer = qemu_new_timer_ns(vm_clock, omap_mcbsp_sink_tick, s);
+ s->source_timer = qemu_new_timer_ns(vm_clock, omap_mcbsp_source_tick, s);
omap_mcbsp_reset(s);
iomemtype = cpu_register_io_memory(omap_mcbsp_readfn,
diff --git a/hw/omap_gptimer.c b/hw/omap_gptimer.c
index 9c0f9f2..f2a424f 100644
--- a/hw/omap_gptimer.c
+++ b/hw/omap_gptimer.c
@@ -102,7 +102,7 @@ static inline uint32_t omap_gp_timer_read(struct omap_gp_timer_s *timer)
uint64_t distance;
if (timer->st && timer->rate) {
- distance = qemu_get_clock(vm_clock) - timer->time;
+ distance = qemu_get_clock_ns(vm_clock) - timer->time;
distance = muldiv64(distance, timer->rate, timer->ticks_per_sec);
if (distance >= 0xffffffff - timer->val)
@@ -117,7 +117,7 @@ static inline void omap_gp_timer_sync(struct omap_gp_timer_s *timer)
{
if (timer->st) {
timer->val = omap_gp_timer_read(timer);
- timer->time = qemu_get_clock(vm_clock);
+ timer->time = qemu_get_clock_ns(vm_clock);
}
}
@@ -163,7 +163,7 @@ static void omap_gp_timer_tick(void *opaque)
timer->val = 0;
} else {
timer->val = timer->load_val;
- timer->time = qemu_get_clock(vm_clock);
+ timer->time = qemu_get_clock_ns(vm_clock);
}
if (timer->trigger == gpt_trigger_overflow ||
@@ -411,7 +411,7 @@ static void omap_gp_timer_write(void *opaque, target_phys_addr_t addr,
break;
case 0x28: /* TCRR */
- s->time = qemu_get_clock(vm_clock);
+ s->time = qemu_get_clock_ns(vm_clock);
s->val = value;
omap_gp_timer_update(s);
break;
@@ -421,7 +421,7 @@ static void omap_gp_timer_write(void *opaque, target_phys_addr_t addr,
break;
case 0x30: /* TTGR */
- s->time = qemu_get_clock(vm_clock);
+ s->time = qemu_get_clock_ns(vm_clock);
s->val = s->load_val;
omap_gp_timer_update(s);
break;
@@ -470,8 +470,8 @@ struct omap_gp_timer_s *omap_gp_timer_init(struct omap_target_agent_s *ta,
s->ta = ta;
s->irq = irq;
s->clk = fclk;
- s->timer = qemu_new_timer(vm_clock, omap_gp_timer_tick, s);
- s->match = qemu_new_timer(vm_clock, omap_gp_timer_match, s);
+ s->timer = qemu_new_timer_ns(vm_clock, omap_gp_timer_tick, s);
+ s->match = qemu_new_timer_ns(vm_clock, omap_gp_timer_match, s);
s->in = qemu_allocate_irqs(omap_gp_timer_input, s, 1)[0];
omap_gp_timer_reset(s);
omap_gp_timer_clk_setup(s);
diff --git a/hw/omap_synctimer.c b/hw/omap_synctimer.c
index 118668a..67f65e6 100644
--- a/hw/omap_synctimer.c
+++ b/hw/omap_synctimer.c
@@ -27,7 +27,7 @@ struct omap_synctimer_s {
/* 32-kHz Sync Timer of the OMAP2 */
static uint32_t omap_synctimer_read(struct omap_synctimer_s *s) {
- return muldiv64(qemu_get_clock(vm_clock), 0x8000, get_ticks_per_sec());
+ return muldiv64(qemu_get_clock_ns(vm_clock), 0x8000, get_ticks_per_sec());
}
void omap_synctimer_reset(struct omap_synctimer_s *s)
diff --git a/hw/pcnet.c b/hw/pcnet.c
index 6dfdcc4..5248ea4 100644
--- a/hw/pcnet.c
+++ b/hw/pcnet.c
@@ -1336,7 +1336,7 @@ static void pcnet_poll_timer(void *opaque)
pcnet_update_irq(s);
if (!CSR_STOP(s) && !CSR_SPND(s) && !CSR_DPOLL(s)) {
- uint64_t now = qemu_get_clock(vm_clock) * 33;
+ uint64_t now = qemu_get_clock_ns(vm_clock) * 33;
if (!s->timer || !now)
s->timer = now;
else {
@@ -1348,7 +1348,7 @@ static void pcnet_poll_timer(void *opaque)
CSR_POLL(s) = t;
}
qemu_mod_timer(s->poll_timer,
- pcnet_get_next_poll_time(s,qemu_get_clock(vm_clock)));
+ pcnet_get_next_poll_time(s,qemu_get_clock_ns(vm_clock)));
}
}
@@ -1752,7 +1752,7 @@ void pcnet_common_cleanup(PCNetState *d)
int pcnet_common_init(DeviceState *dev, PCNetState *s, NetClientInfo *info)
{
- s->poll_timer = qemu_new_timer(vm_clock, pcnet_poll_timer, s);
+ s->poll_timer = qemu_new_timer_ns(vm_clock, pcnet_poll_timer, s);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(info, &s->conf, dev->info->name, dev->id, s);
diff --git a/hw/pcspk.c b/hw/pcspk.c
index 5f02908..7fa2d36 100644
--- a/hw/pcspk.c
+++ b/hw/pcspk.c
@@ -118,7 +118,7 @@ static uint32_t pcspk_ioport_read(void *opaque, uint32_t addr)
int out;
s->dummy_refresh_clock ^= (1 << 4);
- out = pit_get_out(s->pit, 2, qemu_get_clock(vm_clock)) << 5;
+ out = pit_get_out(s->pit, 2, qemu_get_clock_ns(vm_clock)) << 5;
return pit_get_gate(s->pit, 2) | (s->data_on << 1) | s->dummy_refresh_clock | out;
}
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index fb20dfb..90fdc84 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -628,7 +628,7 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
#else
pfl->ro = 0;
#endif
- pfl->timer = qemu_new_timer(vm_clock, pflash_timer, pfl);
+ pfl->timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl);
pfl->base = base;
pfl->sector_len = sector_len;
pfl->total_len = total_len;
diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c
index 3594a36..30c8aa4 100644
--- a/hw/pflash_cfi02.c
+++ b/hw/pflash_cfi02.c
@@ -390,7 +390,7 @@ static void pflash_write (pflash_t *pfl, target_phys_addr_t offset,
pflash_update(pfl, 0, pfl->chip_len);
/* Let's wait 5 seconds before chip erase is done */
qemu_mod_timer(pfl->timer,
- qemu_get_clock(vm_clock) + (get_ticks_per_sec() * 5));
+ qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() * 5));
break;
case 0x30:
/* Sector erase */
@@ -403,7 +403,7 @@ static void pflash_write (pflash_t *pfl, target_phys_addr_t offset,
pfl->status = 0x00;
/* Let's wait 1/2 second before sector erase is done */
qemu_mod_timer(pfl->timer,
- qemu_get_clock(vm_clock) + (get_ticks_per_sec() / 2));
+ qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 2));
break;
default:
DPRINTF("%s: invalid command %02x (wc 5)\n", __func__, cmd);
@@ -647,7 +647,7 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
#else
pfl->ro = 0;
#endif
- pfl->timer = qemu_new_timer(vm_clock, pflash_timer, pfl);
+ pfl->timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl);
pfl->sector_len = sector_len;
pfl->width = width;
pfl->wcycle = 0;
diff --git a/hw/pl031.c b/hw/pl031.c
index c488f69..8c2f9d0 100644
--- a/hw/pl031.c
+++ b/hw/pl031.c
@@ -80,9 +80,9 @@ static void pl031_interrupt(void * opaque)
static uint32_t pl031_get_count(pl031_state *s)
{
- /* This assumes qemu_get_clock returns the time since the machine was
+ /* This assumes qemu_get_clock_ns returns the time since the machine was
created. */
- return s->tick_offset + qemu_get_clock(vm_clock) / get_ticks_per_sec();
+ return s->tick_offset + qemu_get_clock_ns(vm_clock) / get_ticks_per_sec();
}
static void pl031_set_alarm(pl031_state *s)
@@ -90,7 +90,7 @@ static void pl031_set_alarm(pl031_state *s)
int64_t now;
uint32_t ticks;
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
ticks = s->tick_offset + now / get_ticks_per_sec();
/* The timer wraps around. This subtraction also wraps in the same way,
@@ -217,7 +217,7 @@ static int pl031_init(SysBusDevice *dev)
qemu_get_timedate(&tm, 0);
s->tick_offset = mktimegm(&tm);
- s->timer = qemu_new_timer(vm_clock, pl031_interrupt, s);
+ s->timer = qemu_new_timer_ns(vm_clock, pl031_interrupt, s);
return 0;
}
diff --git a/hw/ppc.c b/hw/ppc.c
index 968aec1..1443dd2 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -417,7 +417,7 @@ uint64_t cpu_ppc_load_tbl (CPUState *env)
ppc_tb_t *tb_env = env->tb_env;
uint64_t tb;
- tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
+ tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset);
LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb);
return tb;
@@ -428,7 +428,7 @@ static inline uint32_t _cpu_ppc_load_tbu(CPUState *env)
ppc_tb_t *tb_env = env->tb_env;
uint64_t tb;
- tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
+ tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset);
LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb);
return tb >> 32;
@@ -452,9 +452,9 @@ void cpu_ppc_store_tbl (CPUState *env, uint32_t value)
ppc_tb_t *tb_env = env->tb_env;
uint64_t tb;
- tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
+ tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset);
tb &= 0xFFFFFFFF00000000ULL;
- cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock),
+ cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock),
&tb_env->tb_offset, tb | (uint64_t)value);
}
@@ -463,9 +463,9 @@ static inline void _cpu_ppc_store_tbu(CPUState *env, uint32_t value)
ppc_tb_t *tb_env = env->tb_env;
uint64_t tb;
- tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
+ tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset);
tb &= 0x00000000FFFFFFFFULL;
- cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock),
+ cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock),
&tb_env->tb_offset, ((uint64_t)value << 32) | tb);
}
@@ -479,7 +479,7 @@ uint64_t cpu_ppc_load_atbl (CPUState *env)
ppc_tb_t *tb_env = env->tb_env;
uint64_t tb;
- tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
+ tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset);
LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb);
return tb;
@@ -490,7 +490,7 @@ uint32_t cpu_ppc_load_atbu (CPUState *env)
ppc_tb_t *tb_env = env->tb_env;
uint64_t tb;
- tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
+ tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset);
LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb);
return tb >> 32;
@@ -501,9 +501,9 @@ void cpu_ppc_store_atbl (CPUState *env, uint32_t value)
ppc_tb_t *tb_env = env->tb_env;
uint64_t tb;
- tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
+ tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset);
tb &= 0xFFFFFFFF00000000ULL;
- cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock),
+ cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock),
&tb_env->atb_offset, tb | (uint64_t)value);
}
@@ -512,9 +512,9 @@ void cpu_ppc_store_atbu (CPUState *env, uint32_t value)
ppc_tb_t *tb_env = env->tb_env;
uint64_t tb;
- tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
+ tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset);
tb &= 0x00000000FFFFFFFFULL;
- cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock),
+ cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock),
&tb_env->atb_offset, ((uint64_t)value << 32) | tb);
}
@@ -525,7 +525,7 @@ static void cpu_ppc_tb_stop (CPUState *env)
/* If the time base is already frozen, do nothing */
if (tb_env->tb_freq != 0) {
- vmclk = qemu_get_clock(vm_clock);
+ vmclk = qemu_get_clock_ns(vm_clock);
/* Get the time base */
tb = cpu_ppc_get_tb(tb_env, vmclk, tb_env->tb_offset);
/* Get the alternate time base */
@@ -547,7 +547,7 @@ static void cpu_ppc_tb_start (CPUState *env)
/* If the time base is not frozen, do nothing */
if (tb_env->tb_freq == 0) {
- vmclk = qemu_get_clock(vm_clock);
+ vmclk = qemu_get_clock_ns(vm_clock);
/* Get the time base from tb_offset */
tb = tb_env->tb_offset;
/* Get the alternate time base from atb_offset */
@@ -567,7 +567,7 @@ static inline uint32_t _cpu_ppc_load_decr(CPUState *env, uint64_t next)
uint32_t decr;
int64_t diff;
- diff = next - qemu_get_clock(vm_clock);
+ diff = next - qemu_get_clock_ns(vm_clock);
if (diff >= 0)
decr = muldiv64(diff, tb_env->decr_freq, get_ticks_per_sec());
else
@@ -596,7 +596,7 @@ uint64_t cpu_ppc_load_purr (CPUState *env)
ppc_tb_t *tb_env = env->tb_env;
uint64_t diff;
- diff = qemu_get_clock(vm_clock) - tb_env->purr_start;
+ diff = qemu_get_clock_ns(vm_clock) - tb_env->purr_start;
return tb_env->purr_load + muldiv64(diff, tb_env->tb_freq, get_ticks_per_sec());
}
@@ -629,7 +629,7 @@ static void __cpu_ppc_store_decr (CPUState *env, uint64_t *nextp,
LOG_TB("%s: %08" PRIx32 " => %08" PRIx32 "\n", __func__,
decr, value);
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
next = now + muldiv64(value, get_ticks_per_sec(), tb_env->decr_freq);
if (is_excp)
next += *nextp - now;
@@ -690,7 +690,7 @@ void cpu_ppc_store_purr (CPUState *env, uint64_t value)
ppc_tb_t *tb_env = env->tb_env;
tb_env->purr_load = value;
- tb_env->purr_start = qemu_get_clock(vm_clock);
+ tb_env->purr_start = qemu_get_clock_ns(vm_clock);
}
static void cpu_ppc_set_tb_clk (void *opaque, uint32_t freq)
@@ -717,11 +717,11 @@ clk_setup_cb cpu_ppc_tb_init (CPUState *env, uint32_t freq)
tb_env = qemu_mallocz(sizeof(ppc_tb_t));
env->tb_env = tb_env;
/* Create new timer */
- tb_env->decr_timer = qemu_new_timer(vm_clock, &cpu_ppc_decr_cb, env);
+ tb_env->decr_timer = qemu_new_timer_ns(vm_clock, &cpu_ppc_decr_cb, env);
if (0) {
/* XXX: find a suitable condition to enable the hypervisor decrementer
*/
- tb_env->hdecr_timer = qemu_new_timer(vm_clock, &cpu_ppc_hdecr_cb, env);
+ tb_env->hdecr_timer = qemu_new_timer_ns(vm_clock, &cpu_ppc_hdecr_cb, env);
} else {
tb_env->hdecr_timer = NULL;
}
@@ -785,7 +785,7 @@ static void cpu_4xx_fit_cb (void *opaque)
env = opaque;
tb_env = env->tb_env;
ppcemb_timer = tb_env->opaque;
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
switch ((env->spr[SPR_40x_TCR] >> 24) & 0x3) {
case 0:
next = 1 << 9;
@@ -831,7 +831,7 @@ static void start_stop_pit (CPUState *env, ppc_tb_t *tb_env, int is_excp)
} else {
LOG_TB("%s: start PIT %016" PRIx64 "\n",
__func__, ppcemb_timer->pit_reload);
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
next = now + muldiv64(ppcemb_timer->pit_reload,
get_ticks_per_sec(), tb_env->decr_freq);
if (is_excp)
@@ -875,7 +875,7 @@ static void cpu_4xx_wdt_cb (void *opaque)
env = opaque;
tb_env = env->tb_env;
ppcemb_timer = tb_env->opaque;
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
switch ((env->spr[SPR_40x_TCR] >> 30) & 0x3) {
case 0:
next = 1 << 17;
@@ -1000,11 +1000,11 @@ clk_setup_cb ppc_emb_timers_init (CPUState *env, uint32_t freq,
LOG_TB("%s freq %" PRIu32 "\n", __func__, freq);
if (ppcemb_timer != NULL) {
/* We use decr timer for PIT */
- tb_env->decr_timer = qemu_new_timer(vm_clock, &cpu_4xx_pit_cb, env);
+ tb_env->decr_timer = qemu_new_timer_ns(vm_clock, &cpu_4xx_pit_cb, env);
ppcemb_timer->fit_timer =
- qemu_new_timer(vm_clock, &cpu_4xx_fit_cb, env);
+ qemu_new_timer_ns(vm_clock, &cpu_4xx_fit_cb, env);
ppcemb_timer->wdt_timer =
- qemu_new_timer(vm_clock, &cpu_4xx_wdt_cb, env);
+ qemu_new_timer_ns(vm_clock, &cpu_4xx_wdt_cb, env);
ppcemb_timer->decr_excp = decr_excp;
}
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index 334187e..2ce79ee 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -1347,7 +1347,7 @@ static uint32_t ppc4xx_gpt_readl (void *opaque, target_phys_addr_t addr)
switch (addr) {
case 0x00:
/* Time base counter */
- ret = muldiv64(qemu_get_clock(vm_clock) + gpt->tb_offset,
+ ret = muldiv64(qemu_get_clock_ns(vm_clock) + gpt->tb_offset,
gpt->tb_freq, get_ticks_per_sec());
break;
case 0x10:
@@ -1404,7 +1404,7 @@ static void ppc4xx_gpt_writel (void *opaque,
case 0x00:
/* Time base counter */
gpt->tb_offset = muldiv64(value, get_ticks_per_sec(), gpt->tb_freq)
- - qemu_get_clock(vm_clock);
+ - qemu_get_clock_ns(vm_clock);
ppc4xx_gpt_compute_timer(gpt);
break;
case 0x10:
@@ -1501,7 +1501,7 @@ static void ppc4xx_gpt_init(target_phys_addr_t base, qemu_irq irqs[5])
for (i = 0; i < 5; i++) {
gpt->irqs[i] = irqs[i];
}
- gpt->timer = qemu_new_timer(vm_clock, &ppc4xx_gpt_cb, gpt);
+ gpt->timer = qemu_new_timer_ns(vm_clock, &ppc4xx_gpt_cb, gpt);
#ifdef DEBUG_GPT
printf("%s: offset " TARGET_FMT_plx "\n", __func__, base);
#endif
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index d86a283..5615ef9 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -105,7 +105,7 @@ static uint32_t speaker_ioport_read (void *opaque, uint32_t addr)
{
#if 0
int out;
- out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
+ out = pit_get_out(pit, 2, qemu_get_clock_ns(vm_clock));
dummy_refresh_clock ^= 1;
return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
(dummy_refresh_clock << 4);
diff --git a/hw/ptimer.c b/hw/ptimer.c
index 4ddbc59..e68c1d1 100644
--- a/hw/ptimer.c
+++ b/hw/ptimer.c
@@ -68,7 +68,7 @@ uint64_t ptimer_get_count(ptimer_state *s)
uint64_t counter;
if (s->enabled) {
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
/* Figure out the current counter value. */
if (now - s->next_event > 0
|| s->period == 0) {
@@ -122,7 +122,7 @@ void ptimer_set_count(ptimer_state *s, uint64_t count)
{
s->delta = count;
if (s->enabled) {
- s->next_event = qemu_get_clock(vm_clock);
+ s->next_event = qemu_get_clock_ns(vm_clock);
ptimer_reload(s);
}
}
@@ -137,7 +137,7 @@ void ptimer_run(ptimer_state *s, int oneshot)
return;
}
s->enabled = oneshot ? 2 : 1;
- s->next_event = qemu_get_clock(vm_clock);
+ s->next_event = qemu_get_clock_ns(vm_clock);
ptimer_reload(s);
}
@@ -159,7 +159,7 @@ void ptimer_set_period(ptimer_state *s, int64_t period)
s->period = period;
s->period_frac = 0;
if (s->enabled) {
- s->next_event = qemu_get_clock(vm_clock);
+ s->next_event = qemu_get_clock_ns(vm_clock);
ptimer_reload(s);
}
}
@@ -170,7 +170,7 @@ void ptimer_set_freq(ptimer_state *s, uint32_t freq)
s->period = 1000000000ll / freq;
s->period_frac = (1000000000ll << 32) / freq;
if (s->enabled) {
- s->next_event = qemu_get_clock(vm_clock);
+ s->next_event = qemu_get_clock_ns(vm_clock);
ptimer_reload(s);
}
}
@@ -183,7 +183,7 @@ void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload)
if (reload)
s->delta = limit;
if (s->enabled && reload) {
- s->next_event = qemu_get_clock(vm_clock);
+ s->next_event = qemu_get_clock_ns(vm_clock);
ptimer_reload(s);
}
}
@@ -239,6 +239,6 @@ ptimer_state *ptimer_init(QEMUBH *bh)
s = (ptimer_state *)qemu_mallocz(sizeof(ptimer_state));
s->bh = bh;
- s->timer = qemu_new_timer(vm_clock, ptimer_tick, s);
+ s->timer = qemu_new_timer_ns(vm_clock, ptimer_tick, s);
return s;
}
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index d75a817..9b95e2c 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -372,7 +372,7 @@ static uint32_t pxa2xx_perf_read(void *opaque, int op2, int reg, int crm)
return s->pmnc;
case CPCCNT:
if (s->pmnc & 1)
- return qemu_get_clock(vm_clock);
+ return qemu_get_clock_ns(vm_clock);
else
return 0;
case CPINTEN:
diff --git a/hw/pxa2xx_timer.c b/hw/pxa2xx_timer.c
index 1242f82..f777a21 100644
--- a/hw/pxa2xx_timer.c
+++ b/hw/pxa2xx_timer.c
@@ -171,7 +171,7 @@ static uint32_t pxa2xx_timer_read(void *opaque, target_phys_addr_t offset)
goto badreg;
return s->tm4[tm].tm.value;
case OSCR:
- return s->clock + muldiv64(qemu_get_clock(vm_clock) -
+ return s->clock + muldiv64(qemu_get_clock_ns(vm_clock) -
s->lastload, s->freq, get_ticks_per_sec());
case OSCR11: tm ++;
case OSCR10: tm ++;
@@ -187,7 +187,7 @@ static uint32_t pxa2xx_timer_read(void *opaque, target_phys_addr_t offset)
if ((tm == 9 - 4 || tm == 11 - 4) && (s->tm4[tm].control & (1 << 9))) {
if (s->tm4[tm - 1].freq)
s->snapshot = s->tm4[tm - 1].clock + muldiv64(
- qemu_get_clock(vm_clock) -
+ qemu_get_clock_ns(vm_clock) -
s->tm4[tm - 1].lastload,
s->tm4[tm - 1].freq, get_ticks_per_sec());
else
@@ -196,7 +196,7 @@ static uint32_t pxa2xx_timer_read(void *opaque, target_phys_addr_t offset)
if (!s->tm4[tm].freq)
return s->tm4[tm].clock;
- return s->tm4[tm].clock + muldiv64(qemu_get_clock(vm_clock) -
+ return s->tm4[tm].clock + muldiv64(qemu_get_clock_ns(vm_clock) -
s->tm4[tm].lastload, s->tm4[tm].freq, get_ticks_per_sec());
case OIER:
return s->irq_enabled;
@@ -237,7 +237,7 @@ static void pxa2xx_timer_write(void *opaque, target_phys_addr_t offset,
case OSMR1: tm ++;
case OSMR0:
s->timer[tm].value = value;
- pxa2xx_timer_update(s, qemu_get_clock(vm_clock));
+ pxa2xx_timer_update(s, qemu_get_clock_ns(vm_clock));
break;
case OSMR11: tm ++;
case OSMR10: tm ++;
@@ -250,11 +250,11 @@ static void pxa2xx_timer_write(void *opaque, target_phys_addr_t offset,
if (!pxa2xx_timer_has_tm4(s))
goto badreg;
s->tm4[tm].tm.value = value;
- pxa2xx_timer_update4(s, qemu_get_clock(vm_clock), tm);
+ pxa2xx_timer_update4(s, qemu_get_clock_ns(vm_clock), tm);
break;
case OSCR:
s->oldclock = s->clock;
- s->lastload = qemu_get_clock(vm_clock);
+ s->lastload = qemu_get_clock_ns(vm_clock);
s->clock = value;
pxa2xx_timer_update(s, s->lastload);
break;
@@ -269,7 +269,7 @@ static void pxa2xx_timer_write(void *opaque, target_phys_addr_t offset,
if (!pxa2xx_timer_has_tm4(s))
goto badreg;
s->tm4[tm].oldclock = s->tm4[tm].clock;
- s->tm4[tm].lastload = qemu_get_clock(vm_clock);
+ s->tm4[tm].lastload = qemu_get_clock_ns(vm_clock);
s->tm4[tm].clock = value;
pxa2xx_timer_update4(s, s->tm4[tm].lastload, tm);
break;
@@ -300,7 +300,7 @@ static void pxa2xx_timer_write(void *opaque, target_phys_addr_t offset,
s->tm4[tm].freq = pxa2xx_timer4_freq[value & 7];
else {
s->tm4[tm].freq = 0;
- pxa2xx_timer_update4(s, qemu_get_clock(vm_clock), tm);
+ pxa2xx_timer_update4(s, qemu_get_clock_ns(vm_clock), tm);
}
break;
case OMCR11: tm ++;
@@ -316,7 +316,7 @@ static void pxa2xx_timer_write(void *opaque, target_phys_addr_t offset,
pxa2xx_timer4_freq[(value & (1 << 8)) ? 0 : (value & 7)];
else {
s->tm4[tm].freq = 0;
- pxa2xx_timer_update4(s, qemu_get_clock(vm_clock), tm);
+ pxa2xx_timer_update4(s, qemu_get_clock_ns(vm_clock), tm);
}
break;
default:
@@ -363,7 +363,7 @@ static void pxa2xx_timer_tick4(void *opaque)
if (t->control & (1 << 3))
t->clock = 0;
if (t->control & (1 << 6))
- pxa2xx_timer_update4(i, qemu_get_clock(vm_clock), t->tm.num - 4);
+ pxa2xx_timer_update4(i, qemu_get_clock_ns(vm_clock), t->tm.num - 4);
if (i->events & 0xff0)
qemu_irq_raise(i->irq4);
}
@@ -374,7 +374,7 @@ static int pxa25x_timer_post_load(void *opaque, int version_id)
int64_t now;
int i;
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
pxa2xx_timer_update(s, now);
if (pxa2xx_timer_has_tm4(s))
@@ -394,7 +394,7 @@ static int pxa2xx_timer_init(SysBusDevice *dev)
s->irq_enabled = 0;
s->oldclock = 0;
s->clock = 0;
- s->lastload = qemu_get_clock(vm_clock);
+ s->lastload = qemu_get_clock_ns(vm_clock);
s->reset3 = 0;
for (i = 0; i < 4; i ++) {
@@ -402,7 +402,7 @@ static int pxa2xx_timer_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->timer[i].irq);
s->timer[i].info = s;
s->timer[i].num = i;
- s->timer[i].qtimer = qemu_new_timer(vm_clock,
+ s->timer[i].qtimer = qemu_new_timer_ns(vm_clock,
pxa2xx_timer_tick, &s->timer[i]);
}
if (s->flags & (1 << PXA2XX_TIMER_HAVE_TM4)) {
@@ -414,7 +414,7 @@ static int pxa2xx_timer_init(SysBusDevice *dev)
s->tm4[i].tm.num = i + 4;
s->tm4[i].freq = 0;
s->tm4[i].control = 0x0;
- s->tm4[i].tm.qtimer = qemu_new_timer(vm_clock,
+ s->tm4[i].tm.qtimer = qemu_new_timer_ns(vm_clock,
pxa2xx_timer_tick4, &s->tm4[i]);
}
}
diff --git a/hw/rc4030.c b/hw/rc4030.c
index 0a9d98d..d30230a 100644
--- a/hw/rc4030.c
+++ b/hw/rc4030.c
@@ -104,7 +104,7 @@ static void set_next_tick(rc4030State *s)
tm_hz = 1000 / (s->itr + 1);
- qemu_mod_timer(s->periodic_timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(s->periodic_timer, qemu_get_clock_ns(vm_clock) +
get_ticks_per_sec() / tm_hz);
}
@@ -811,7 +811,7 @@ void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
*irqs = qemu_allocate_irqs(rc4030_irq_jazz_request, s, 16);
*dmas = rc4030_allocate_dmas(s, 4);
- s->periodic_timer = qemu_new_timer(vm_clock, rc4030_periodic_timer, s);
+ s->periodic_timer = qemu_new_timer_ns(vm_clock, rc4030_periodic_timer, s);
s->timer_irq = timer;
s->jazz_bus_irq = jazz_bus;
diff --git a/hw/rtl8139.c b/hw/rtl8139.c
index a22530c..4dc399f 100644
--- a/hw/rtl8139.c
+++ b/hw/rtl8139.c
@@ -2529,7 +2529,7 @@ static void rtl8139_IntrMask_write(RTL8139State *s, uint32_t val)
s->IntrMask = val;
- rtl8139_set_next_tctr_time(s, qemu_get_clock(vm_clock));
+ rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock));
rtl8139_update_irq(s);
}
@@ -2570,7 +2570,7 @@ static void rtl8139_IntrStatus_write(RTL8139State *s, uint32_t val)
* and probably emulated is slower is better to assume this resetting was
* done before testing on previous rtl8139_update_irq lead to IRQ loosing
*/
- rtl8139_set_next_tctr_time(s, qemu_get_clock(vm_clock));
+ rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock));
rtl8139_update_irq(s);
#endif
@@ -2578,7 +2578,7 @@ static void rtl8139_IntrStatus_write(RTL8139State *s, uint32_t val)
static uint32_t rtl8139_IntrStatus_read(RTL8139State *s)
{
- rtl8139_set_next_tctr_time(s, qemu_get_clock(vm_clock));
+ rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock));
uint32_t ret = s->IntrStatus;
@@ -2843,7 +2843,7 @@ static void rtl8139_io_writel(void *opaque, uint8_t addr, uint32_t val)
case Timer:
DEBUG_PRINT(("RTL8139: TCTR Timer reset on write\n"));
- s->TCTR_base = qemu_get_clock(vm_clock);
+ s->TCTR_base = qemu_get_clock_ns(vm_clock);
rtl8139_set_next_tctr_time(s, s->TCTR_base);
break;
@@ -2851,7 +2851,7 @@ static void rtl8139_io_writel(void *opaque, uint8_t addr, uint32_t val)
DEBUG_PRINT(("RTL8139: FlashReg TimerInt write val=0x%08x\n", val));
if (s->TimerInt != val) {
s->TimerInt = val;
- rtl8139_set_next_tctr_time(s, qemu_get_clock(vm_clock));
+ rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock));
}
break;
@@ -3062,7 +3062,7 @@ static uint32_t rtl8139_io_readl(void *opaque, uint8_t addr)
break;
case Timer:
- ret = muldiv64(qemu_get_clock(vm_clock) - s->TCTR_base,
+ ret = muldiv64(qemu_get_clock_ns(vm_clock) - s->TCTR_base,
PCI_FREQUENCY, get_ticks_per_sec());
DEBUG_PRINT(("RTL8139: TCTR Timer read val=0x%08x\n", ret));
break;
@@ -3156,7 +3156,7 @@ static uint32_t rtl8139_mmio_readl(void *opaque, target_phys_addr_t addr)
static int rtl8139_post_load(void *opaque, int version_id)
{
RTL8139State* s = opaque;
- rtl8139_set_next_tctr_time(s, qemu_get_clock(vm_clock));
+ rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock));
if (version_id < 4) {
s->cplus_enabled = s->CpCmd != 0;
}
@@ -3182,7 +3182,7 @@ static const VMStateDescription vmstate_rtl8139_hotplug_ready ={
static void rtl8139_pre_save(void *opaque)
{
RTL8139State* s = opaque;
- int64_t current_time = qemu_get_clock(vm_clock);
+ int64_t current_time = qemu_get_clock_ns(vm_clock);
/* set IntrStatus correctly */
rtl8139_set_next_tctr_time(s, current_time);
@@ -3331,7 +3331,7 @@ static void rtl8139_timer(void *opaque)
s->IntrStatus |= PCSTimeout;
rtl8139_update_irq(s);
- rtl8139_set_next_tctr_time(s, qemu_get_clock(vm_clock));
+ rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock));
}
static void rtl8139_cleanup(VLANClientState *nc)
@@ -3401,8 +3401,8 @@ static int pci_rtl8139_init(PCIDevice *dev)
s->cplus_txbuffer_offset = 0;
s->TimerExpire = 0;
- s->timer = qemu_new_timer(vm_clock, rtl8139_timer, s);
- rtl8139_set_next_tctr_time(s, qemu_get_clock(vm_clock));
+ s->timer = qemu_new_timer_ns(vm_clock, rtl8139_timer, s);
+ rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock));
add_boot_device_path(s->conf.bootindex, &dev->qdev, "/ethernet-phy@0");
diff --git a/hw/sb16.c b/hw/sb16.c
index c9d37ad..a76df1b 100644
--- a/hw/sb16.c
+++ b/hw/sb16.c
@@ -766,7 +766,7 @@ static void complete (SB16State *s)
if (s->aux_ts) {
qemu_mod_timer (
s->aux_ts,
- qemu_get_clock (vm_clock) + ticks
+ qemu_get_clock_ns (vm_clock) + ticks
);
}
}
@@ -1361,7 +1361,7 @@ static int sb16_initfn (ISADevice *dev)
s->csp_regs[9] = 0xf8;
reset_mixer (s);
- s->aux_ts = qemu_new_timer (vm_clock, aux_timer, s);
+ s->aux_ts = qemu_new_timer_ns (vm_clock, aux_timer, s);
if (!s->aux_ts) {
dolog ("warning: Could not create auxiliary timer\n");
}
diff --git a/hw/serial.c b/hw/serial.c
index 879237f..0ee61dd 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -312,13 +312,13 @@ static void serial_update_msl(SerialState *s)
We'll be lazy and poll only every 10ms, and only poll it at all if MSI interrupts are turned on */
if (s->poll_msl)
- qemu_mod_timer(s->modem_status_poll, qemu_get_clock(vm_clock) + get_ticks_per_sec() / 100);
+ qemu_mod_timer(s->modem_status_poll, qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 100);
}
static void serial_xmit(void *opaque)
{
SerialState *s = opaque;
- uint64_t new_xmit_ts = qemu_get_clock(vm_clock);
+ uint64_t new_xmit_ts = qemu_get_clock_ns(vm_clock);
if (s->tsr_retry <= 0) {
if (s->fcr & UART_FCR_FE) {
@@ -350,7 +350,7 @@ static void serial_xmit(void *opaque)
s->tsr_retry = 0;
}
- s->last_xmit_ts = qemu_get_clock(vm_clock);
+ s->last_xmit_ts = qemu_get_clock_ns(vm_clock);
if (!(s->lsr & UART_LSR_THRE))
qemu_mod_timer(s->transmit_timer, s->last_xmit_ts + s->char_transmit_time);
@@ -494,7 +494,7 @@ static void serial_ioport_write(void *opaque, uint32_t addr, uint32_t val)
qemu_chr_ioctl(s->chr,CHR_IOCTL_SERIAL_SET_TIOCM, &flags);
/* Update the modem status after a one-character-send wait-time, since there may be a response
from the device/computer at the other end of the serial line */
- qemu_mod_timer(s->modem_status_poll, qemu_get_clock(vm_clock) + s->char_transmit_time);
+ qemu_mod_timer(s->modem_status_poll, qemu_get_clock_ns(vm_clock) + s->char_transmit_time);
}
}
break;
@@ -525,7 +525,7 @@ static uint32_t serial_ioport_read(void *opaque, uint32_t addr)
if (s->recv_fifo.count == 0)
s->lsr &= ~(UART_LSR_DR | UART_LSR_BI);
else
- qemu_mod_timer(s->fifo_timeout_timer, qemu_get_clock (vm_clock) + s->char_transmit_time * 4);
+ qemu_mod_timer(s->fifo_timeout_timer, qemu_get_clock_ns (vm_clock) + s->char_transmit_time * 4);
s->timeout_ipending = 0;
} else {
ret = s->rbr;
@@ -641,7 +641,7 @@ static void serial_receive1(void *opaque, const uint8_t *buf, int size)
}
s->lsr |= UART_LSR_DR;
/* call the timeout receive callback in 4 char transmit time */
- qemu_mod_timer(s->fifo_timeout_timer, qemu_get_clock (vm_clock) + s->char_transmit_time * 4);
+ qemu_mod_timer(s->fifo_timeout_timer, qemu_get_clock_ns (vm_clock) + s->char_transmit_time * 4);
} else {
if (s->lsr & UART_LSR_DR)
s->lsr |= UART_LSR_OE;
@@ -720,7 +720,7 @@ static void serial_reset(void *opaque)
fifo_clear(s,RECV_FIFO);
fifo_clear(s,XMIT_FIFO);
- s->last_xmit_ts = qemu_get_clock(vm_clock);
+ s->last_xmit_ts = qemu_get_clock_ns(vm_clock);
s->thr_ipending = 0;
s->last_break_enable = 0;
@@ -734,10 +734,10 @@ static void serial_init_core(SerialState *s)
exit(1);
}
- s->modem_status_poll = qemu_new_timer(vm_clock, (QEMUTimerCB *) serial_update_msl, s);
+ s->modem_status_poll = qemu_new_timer_ns(vm_clock, (QEMUTimerCB *) serial_update_msl, s);
- s->fifo_timeout_timer = qemu_new_timer(vm_clock, (QEMUTimerCB *) fifo_timeout_int, s);
- s->transmit_timer = qemu_new_timer(vm_clock, (QEMUTimerCB *) serial_xmit, s);
+ s->fifo_timeout_timer = qemu_new_timer_ns(vm_clock, (QEMUTimerCB *) fifo_timeout_int, s);
+ s->transmit_timer = qemu_new_timer_ns(vm_clock, (QEMUTimerCB *) serial_xmit, s);
qemu_register_reset(serial_reset, s);
diff --git a/hw/soc_dma.c b/hw/soc_dma.c
index 23ec516..3f0f414 100644
--- a/hw/soc_dma.c
+++ b/hw/soc_dma.c
@@ -84,7 +84,7 @@ struct dma_s {
static void soc_dma_ch_schedule(struct soc_dma_ch_s *ch, int delay_bytes)
{
- int64_t now = qemu_get_clock(vm_clock);
+ int64_t now = qemu_get_clock_ns(vm_clock);
struct dma_s *dma = (struct dma_s *) ch->dma;
qemu_mod_timer(ch->timer, now + delay_bytes / dma->channel_freq);
@@ -246,7 +246,7 @@ struct soc_dma_s *soc_dma_init(int n)
for (i = 0; i < n; i ++) {
s->ch[i].dma = &s->soc;
s->ch[i].num = i;
- s->ch[i].timer = qemu_new_timer(vm_clock, soc_dma_ch_run, &s->ch[i]);
+ s->ch[i].timer = qemu_new_timer_ns(vm_clock, soc_dma_ch_run, &s->ch[i]);
}
soc_dma_reset(&s->soc);
diff --git a/hw/spitz.c b/hw/spitz.c
index 5b1e42d..006f7a9 100644
--- a/hw/spitz.c
+++ b/hw/spitz.c
@@ -393,7 +393,7 @@ static void spitz_keyboard_tick(void *opaque)
s->fifopos = 0;
}
- qemu_mod_timer(s->kbdtimer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock) +
get_ticks_per_sec() / 32);
}
@@ -485,7 +485,7 @@ static void spitz_keyboard_register(PXA2xxState *cpu)
qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
qdev_get_gpio_in(dev, i));
- qemu_mod_timer(s->kbdtimer, qemu_get_clock(vm_clock));
+ qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock));
qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
}
@@ -506,7 +506,7 @@ static int spitz_keyboard_init(SysBusDevice *dev)
spitz_keyboard_pre_map(s);
- s->kbdtimer = qemu_new_timer(vm_clock, spitz_keyboard_tick, s);
+ s->kbdtimer = qemu_new_timer_ns(vm_clock, spitz_keyboard_tick, s);
qdev_init_gpio_in(&dev->qdev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
qdev_init_gpio_out(&dev->qdev, s->sense, SPITZ_KEY_SENSE_NUM);
diff --git a/hw/stellaris.c b/hw/stellaris.c
index 5d8bd55..0d52926 100644
--- a/hw/stellaris.c
+++ b/hw/stellaris.c
@@ -79,7 +79,7 @@ static void gptm_reload(gptm_state *s, int n, int reset)
{
int64_t tick;
if (reset)
- tick = qemu_get_clock(vm_clock);
+ tick = qemu_get_clock_ns(vm_clock);
else
tick = s->tick[n];
@@ -353,8 +353,8 @@ static int stellaris_gptm_init(SysBusDevice *dev)
sysbus_init_mmio(dev, 0x1000, iomemtype);
s->opaque[0] = s->opaque[1] = s;
- s->timer[0] = qemu_new_timer(vm_clock, gptm_tick, &s->opaque[0]);
- s->timer[1] = qemu_new_timer(vm_clock, gptm_tick, &s->opaque[1]);
+ s->timer[0] = qemu_new_timer_ns(vm_clock, gptm_tick, &s->opaque[0]);
+ s->timer[1] = qemu_new_timer_ns(vm_clock, gptm_tick, &s->opaque[1]);
register_savevm(&dev->qdev, "stellaris_gptm", -1, 1,
gptm_save, gptm_load, s);
return 0;
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 90b1ce2..ee2a2a7 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -352,9 +352,9 @@ static CPUTimer* cpu_timer_create(const char* name, CPUState *env,
timer->disabled_mask = disabled_mask;
timer->disabled = 1;
- timer->clock_offset = qemu_get_clock(vm_clock);
+ timer->clock_offset = qemu_get_clock_ns(vm_clock);
- timer->qtimer = qemu_new_timer(vm_clock, cb, env);
+ timer->qtimer = qemu_new_timer_ns(vm_clock, cb, env);
return timer;
}
@@ -362,7 +362,7 @@ static CPUTimer* cpu_timer_create(const char* name, CPUState *env,
static void cpu_timer_reset(CPUTimer *timer)
{
timer->disabled = 1;
- timer->clock_offset = qemu_get_clock(vm_clock);
+ timer->clock_offset = qemu_get_clock_ns(vm_clock);
qemu_del_timer(timer->qtimer);
}
@@ -457,7 +457,7 @@ void cpu_tick_set_count(CPUTimer *timer, uint64_t count)
uint64_t real_count = count & ~timer->disabled_mask;
uint64_t disabled_bit = count & timer->disabled_mask;
- int64_t vm_clock_offset = qemu_get_clock(vm_clock) -
+ int64_t vm_clock_offset = qemu_get_clock_ns(vm_clock) -
cpu_to_timer_ticks(real_count, timer->frequency);
TIMER_DPRINTF("%s set_count count=0x%016lx (%s) p=%p\n",
@@ -471,7 +471,7 @@ void cpu_tick_set_count(CPUTimer *timer, uint64_t count)
uint64_t cpu_tick_get_count(CPUTimer *timer)
{
uint64_t real_count = timer_to_cpu_ticks(
- qemu_get_clock(vm_clock) - timer->clock_offset,
+ qemu_get_clock_ns(vm_clock) - timer->clock_offset,
timer->frequency);
TIMER_DPRINTF("%s get_count count=0x%016lx (%s) p=%p\n",
@@ -486,7 +486,7 @@ uint64_t cpu_tick_get_count(CPUTimer *timer)
void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit)
{
- int64_t now = qemu_get_clock(vm_clock);
+ int64_t now = qemu_get_clock_ns(vm_clock);
uint64_t real_limit = limit & ~timer->disabled_mask;
timer->disabled = (limit & timer->disabled_mask) ? 1 : 0;
diff --git a/hw/syborg_rtc.c b/hw/syborg_rtc.c
index 329aa42..16d8f9e 100644
--- a/hw/syborg_rtc.c
+++ b/hw/syborg_rtc.c
@@ -66,7 +66,7 @@ static void syborg_rtc_write(void *opaque, target_phys_addr_t offset, uint32_t v
offset &= 0xfff;
switch (offset >> 2) {
case RTC_LATCH:
- now = qemu_get_clock(vm_clock);
+ now = qemu_get_clock_ns(vm_clock);
if (value >= 4) {
s->offset = s->data - now;
} else {
diff --git a/hw/tsc2005.c b/hw/tsc2005.c
index a55853c..c95dcf0 100644
--- a/hw/tsc2005.c
+++ b/hw/tsc2005.c
@@ -290,7 +290,7 @@ static void tsc2005_pin_update(TSC2005State *s)
s->precision = s->nextprecision;
s->function = s->nextfunction;
s->pdst = !s->pnd0; /* Synchronised on internal clock */
- expires = qemu_get_clock(vm_clock) + (get_ticks_per_sec() >> 7);
+ expires = qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() >> 7);
qemu_mod_timer(s->timer, expires);
}
@@ -529,7 +529,7 @@ void *tsc2005_init(qemu_irq pintdav)
s->y = 240;
s->pressure = 0;
s->precision = s->nextprecision = 0;
- s->timer = qemu_new_timer(vm_clock, tsc2005_timer_tick, s);
+ s->timer = qemu_new_timer_ns(vm_clock, tsc2005_timer_tick, s);
s->pint = pintdav;
s->model = 0x2005;
diff --git a/hw/tsc210x.c b/hw/tsc210x.c
index fca73f1..96446dd 100644
--- a/hw/tsc210x.c
+++ b/hw/tsc210x.c
@@ -503,9 +503,9 @@ static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg)
l_ch = 1;
r_ch = 1;
if (s->softstep && !(s->dac_power & (1 << 10))) {
- l_ch = (qemu_get_clock(vm_clock) >
+ l_ch = (qemu_get_clock_ns(vm_clock) >
s->volume_change + TSC_SOFTSTEP_DELAY);
- r_ch = (qemu_get_clock(vm_clock) >
+ r_ch = (qemu_get_clock_ns(vm_clock) >
s->volume_change + TSC_SOFTSTEP_DELAY);
}
@@ -514,7 +514,7 @@ static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg)
case 0x05: /* Stereo DAC Power Control */
return 0x2aa0 | s->dac_power |
(((s->dac_power & (1 << 10)) &&
- (qemu_get_clock(vm_clock) >
+ (qemu_get_clock_ns(vm_clock) >
s->powerdown + TSC_POWEROFF_DELAY)) << 6);
case 0x06: /* Audio Control 3 */
@@ -695,7 +695,7 @@ static void tsc2102_audio_register_write(
case 0x02: /* DAC Volume Control */
s->volume = value;
- s->volume_change = qemu_get_clock(vm_clock);
+ s->volume_change = qemu_get_clock_ns(vm_clock);
return;
case 0x03:
@@ -717,7 +717,7 @@ static void tsc2102_audio_register_write(
case 0x05: /* Stereo DAC Power Control */
if ((value & ~s->dac_power) & (1 << 10))
- s->powerdown = qemu_get_clock(vm_clock);
+ s->powerdown = qemu_get_clock_ns(vm_clock);
s->dac_power = value & 0x9543;
#ifdef TSC_VERBOSE
@@ -864,7 +864,7 @@ static void tsc210x_pin_update(TSC210xState *s)
s->busy = 1;
s->precision = s->nextprecision;
s->function = s->nextfunction;
- expires = qemu_get_clock(vm_clock) + (get_ticks_per_sec() >> 10);
+ expires = qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() >> 10);
qemu_mod_timer(s->timer, expires);
}
@@ -1005,7 +1005,7 @@ static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out)
static void tsc210x_save(QEMUFile *f, void *opaque)
{
TSC210xState *s = (TSC210xState *) opaque;
- int64_t now = qemu_get_clock(vm_clock);
+ int64_t now = qemu_get_clock_ns(vm_clock);
int i;
qemu_put_be16(f, s->x);
@@ -1051,7 +1051,7 @@ static void tsc210x_save(QEMUFile *f, void *opaque)
static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
{
TSC210xState *s = (TSC210xState *) opaque;
- int64_t now = qemu_get_clock(vm_clock);
+ int64_t now = qemu_get_clock_ns(vm_clock);
int i;
s->x = qemu_get_be16(f);
@@ -1111,7 +1111,7 @@ uWireSlave *tsc2102_init(qemu_irq pint)
s->y = 160;
s->pressure = 0;
s->precision = s->nextprecision = 0;
- s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s);
+ s->timer = qemu_new_timer_ns(vm_clock, tsc210x_timer_tick, s);
s->pint = pint;
s->model = 0x2102;
s->name = "tsc2102";
@@ -1160,7 +1160,7 @@ uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav)
s->y = 240;
s->pressure = 0;
s->precision = s->nextprecision = 0;
- s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s);
+ s->timer = qemu_new_timer_ns(vm_clock, tsc210x_timer_tick, s);
s->pint = penirq;
s->kbint = kbirq;
s->davint = dav;
diff --git a/hw/tusb6010.c b/hw/tusb6010.c
index 0005e1c..ccd01ad 100644
--- a/hw/tusb6010.c
+++ b/hw/tusb6010.c
@@ -520,7 +520,7 @@ static void tusb_async_writew(void *opaque, target_phys_addr_t addr,
case TUSB_DEV_OTG_TIMER:
s->otg_timer_val = value;
if (value & TUSB_DEV_OTG_TIMER_ENABLE)
- qemu_mod_timer(s->otg_timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(s->otg_timer, qemu_get_clock_ns(vm_clock) +
muldiv64(TUSB_DEV_OTG_TIMER_VAL(value),
get_ticks_per_sec(), TUSB_DEVCLOCK));
else
@@ -742,8 +742,8 @@ TUSBState *tusb6010_init(qemu_irq intr)
s->iomemtype[1] = cpu_register_io_memory(tusb_async_readfn,
tusb_async_writefn, s, DEVICE_NATIVE_ENDIAN);
s->irq = intr;
- s->otg_timer = qemu_new_timer(vm_clock, tusb_otg_tick, s);
- s->pwr_timer = qemu_new_timer(vm_clock, tusb_power_tick, s);
+ s->otg_timer = qemu_new_timer_ns(vm_clock, tusb_otg_tick, s);
+ s->pwr_timer = qemu_new_timer_ns(vm_clock, tusb_power_tick, s);
s->musb = musb_init(qemu_allocate_irqs(tusb_musb_core_intr, s,
__musb_irq_max));
@@ -761,6 +761,6 @@ void tusb6010_power(TUSBState *s, int on)
s->intr_ok = 0;
tusb_intr_update(s);
qemu_mod_timer(s->pwr_timer,
- qemu_get_clock(vm_clock) + get_ticks_per_sec() / 2);
+ qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 2);
}
}
diff --git a/hw/usb-hid.c b/hw/usb-hid.c
index 79b20df..c25362c 100644
--- a/hw/usb-hid.c
+++ b/hw/usb-hid.c
@@ -796,7 +796,7 @@ static int usb_hid_handle_control(USBDevice *dev, int request, int value,
break;
case SET_IDLE:
s->idle = (uint8_t) (value >> 8);
- usb_hid_set_next_idle(s, qemu_get_clock(vm_clock));
+ usb_hid_set_next_idle(s, qemu_get_clock_ns(vm_clock));
ret = 0;
break;
default:
@@ -815,7 +815,7 @@ static int usb_hid_handle_data(USBDevice *dev, USBPacket *p)
switch(p->pid) {
case USB_TOKEN_IN:
if (p->devep == 1) {
- int64_t curtime = qemu_get_clock(vm_clock);
+ int64_t curtime = qemu_get_clock_ns(vm_clock);
if (!s->changed && (!s->idle || s->next_idle_clock - curtime > 0))
return USB_RET_NAK;
usb_hid_set_next_idle(s, curtime);
@@ -900,7 +900,7 @@ static int usb_hid_post_load(void *opaque, int version_id)
USBHIDState *s = opaque;
if (s->idle) {
- usb_hid_set_next_idle(s, qemu_get_clock(vm_clock));
+ usb_hid_set_next_idle(s, qemu_get_clock_ns(vm_clock));
}
return 0;
}
diff --git a/hw/usb-musb.c b/hw/usb-musb.c
index 782cfa2..15bc549 100644
--- a/hw/usb-musb.c
+++ b/hw/usb-musb.c
@@ -513,9 +513,9 @@ static inline void musb_schedule_cb(USBPacket *packey, void *opaque, int dir)
return musb_cb_tick(opaque);
if (!ep->intv_timer[dir])
- ep->intv_timer[dir] = qemu_new_timer(vm_clock, musb_cb_tick, opaque);
+ ep->intv_timer[dir] = qemu_new_timer_ns(vm_clock, musb_cb_tick, opaque);
- qemu_mod_timer(ep->intv_timer[dir], qemu_get_clock(vm_clock) +
+ qemu_mod_timer(ep->intv_timer[dir], qemu_get_clock_ns(vm_clock) +
muldiv64(timeout, get_ticks_per_sec(), 8000));
}
diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c
index 09ea0b6..d2b14f7 100644
--- a/hw/usb-ohci.c
+++ b/hw/usb-ohci.c
@@ -1101,7 +1101,7 @@ static int ohci_service_ed_list(OHCIState *ohci, uint32_t head, int completion)
/* Generate a SOF event, and set a timer for EOF */
static void ohci_sof(OHCIState *ohci)
{
- ohci->sof_time = qemu_get_clock(vm_clock);
+ ohci->sof_time = qemu_get_clock_ns(vm_clock);
qemu_mod_timer(ohci->eof_timer, ohci->sof_time + usb_frame_time);
ohci_set_interrupt(ohci, OHCI_INTR_SF);
}
@@ -1186,12 +1186,12 @@ static void ohci_frame_boundary(void *opaque)
*/
static int ohci_bus_start(OHCIState *ohci)
{
- ohci->eof_timer = qemu_new_timer(vm_clock,
+ ohci->eof_timer = qemu_new_timer_ns(vm_clock,
ohci_frame_boundary,
ohci);
if (ohci->eof_timer == NULL) {
- fprintf(stderr, "usb-ohci: %s: qemu_new_timer failed\n", ohci->name);
+ fprintf(stderr, "usb-ohci: %s: qemu_new_timer_ns failed\n", ohci->name);
/* TODO: Signal unrecoverable error */
return 0;
}
@@ -1311,7 +1311,7 @@ static uint32_t ohci_get_frame_remaining(OHCIState *ohci)
/* Being in USB operational state guarnatees sof_time was
* set already.
*/
- tks = qemu_get_clock(vm_clock) - ohci->sof_time;
+ tks = qemu_get_clock_ns(vm_clock) - ohci->sof_time;
/* avoid muldiv if possible */
if (tks >= usb_frame_time)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index b384e1d..346db3e 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -441,7 +441,7 @@ static void uhci_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
case 0x00:
if ((val & UHCI_CMD_RS) && !(s->cmd & UHCI_CMD_RS)) {
/* start frame processing */
- qemu_mod_timer(s->frame_timer, qemu_get_clock(vm_clock));
+ qemu_mod_timer(s->frame_timer, qemu_get_clock_ns(vm_clock));
s->status &= ~UHCI_STS_HCHALTED;
} else if (!(val & UHCI_CMD_RS)) {
s->status |= UHCI_STS_HCHALTED;
@@ -1133,8 +1133,8 @@ static int usb_uhci_common_initfn(UHCIState *s)
USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL);
usb_port_location(&s->ports[i].port, NULL, i+1);
}
- s->frame_timer = qemu_new_timer(vm_clock, uhci_frame_timer, s);
- s->expire_time = qemu_get_clock(vm_clock) +
+ s->frame_timer = qemu_new_timer_ns(vm_clock, uhci_frame_timer, s);
+ s->expire_time = qemu_get_clock_ns(vm_clock) +
(get_ticks_per_sec() / FRAME_TIMER_FREQ);
s->num_ports_vmstate = NB_PORTS;
diff --git a/hw/vga.c b/hw/vga.c
index 3ef85fb..124295a 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -260,7 +260,7 @@ static uint8_t vga_precise_retrace(VGACommonState *s)
int cur_line, cur_line_char, cur_char;
int64_t cur_tick;
- cur_tick = qemu_get_clock(vm_clock);
+ cur_tick = qemu_get_clock_ns(vm_clock);
cur_char = (cur_tick / r->ticks_per_char) % r->total_chars;
cur_line = cur_char / r->htotal;
diff --git a/hw/virtio-net.c b/hw/virtio-net.c
index 5962298..6997e02 100644
--- a/hw/virtio-net.c
+++ b/hw/virtio-net.c
@@ -150,7 +150,7 @@ static void virtio_net_set_status(struct VirtIODevice *vdev, uint8_t status)
if (virtio_net_started(n, status) && !n->vhost_started) {
if (n->tx_timer) {
qemu_mod_timer(n->tx_timer,
- qemu_get_clock(vm_clock) + n->tx_timeout);
+ qemu_get_clock_ns(vm_clock) + n->tx_timeout);
} else {
qemu_bh_schedule(n->tx_bh);
}
@@ -785,7 +785,7 @@ static void virtio_net_handle_tx_timer(VirtIODevice *vdev, VirtQueue *vq)
virtio_net_flush_tx(n, vq);
} else {
qemu_mod_timer(n->tx_timer,
- qemu_get_clock(vm_clock) + n->tx_timeout);
+ qemu_get_clock_ns(vm_clock) + n->tx_timeout);
n->tx_waiting = 1;
virtio_queue_set_notification(vq, 0);
}
@@ -1019,7 +1019,7 @@ VirtIODevice *virtio_net_init(DeviceState *dev, NICConf *conf,
if (net->tx && !strcmp(net->tx, "timer")) {
n->tx_vq = virtio_add_queue(&n->vdev, 256, virtio_net_handle_tx_timer);
- n->tx_timer = qemu_new_timer(vm_clock, virtio_net_tx_timer, n);
+ n->tx_timer = qemu_new_timer_ns(vm_clock, virtio_net_tx_timer, n);
n->tx_timeout = net->txtimer;
} else {
n->tx_vq = virtio_add_queue(&n->vdev, 256, virtio_net_handle_tx_bh);
diff --git a/hw/vt82c686.c b/hw/vt82c686.c
index cacc217..818460d 100644
--- a/hw/vt82c686.c
+++ b/hw/vt82c686.c
@@ -186,7 +186,7 @@ typedef struct VT686MC97State {
static uint32_t get_pmtmr(VT686PMState *s)
{
uint32_t d;
- d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, get_ticks_per_sec());
+ d = muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY, get_ticks_per_sec());
return d & 0xffffff;
}
@@ -195,7 +195,7 @@ static int get_pmsts(VT686PMState *s)
int64_t d;
int pmsts;
pmsts = s->pmsts;
- d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, get_ticks_per_sec());
+ d = muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY, get_ticks_per_sec());
if (d >= s->tmr_overflow_time)
s->pmsts |= TMROF_EN;
return pmsts;
@@ -238,7 +238,7 @@ static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
pmsts = get_pmsts(s);
if (pmsts & val & TMROF_EN) {
/* if TMRSTS is reset, then compute the new overflow time */
- d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, get_ticks_per_sec());
+ d = muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY, get_ticks_per_sec());
s->tmr_overflow_time = (d + 0x800000LL) & ~0x7fffffLL;
}
s->pmsts &= ~val;
@@ -486,7 +486,7 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
apm_init(&s->apm, NULL, s);
- s->tmr_timer = qemu_new_timer(vm_clock, pm_tmr_timer, s);
+ s->tmr_timer = qemu_new_timer_ns(vm_clock, pm_tmr_timer, s);
pm_smbus_init(&s->dev.qdev, &s->smb);
diff --git a/hw/wdt_i6300esb.c b/hw/wdt_i6300esb.c
index 90bf5f6..4a7fba7 100644
--- a/hw/wdt_i6300esb.c
+++ b/hw/wdt_i6300esb.c
@@ -129,7 +129,7 @@ static void i6300esb_restart_timer(I6300State *d, int stage)
i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout);
- qemu_mod_timer(d->timer, qemu_get_clock(vm_clock) + timeout);
+ qemu_mod_timer(d->timer, qemu_get_clock_ns(vm_clock) + timeout);
}
/* This is called when the guest disables the watchdog. */
@@ -410,7 +410,7 @@ static int i6300esb_init(PCIDevice *dev)
i6300esb_debug("I6300State = %p\n", d);
- d->timer = qemu_new_timer(vm_clock, i6300esb_timer_expired, d);
+ d->timer = qemu_new_timer_ns(vm_clock, i6300esb_timer_expired, d);
d->previous_reboot_flag = 0;
pci_conf = d->dev.config;
diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c
index 1248464..81f22d0 100644
--- a/hw/wdt_ib700.c
+++ b/hw/wdt_ib700.c
@@ -58,7 +58,7 @@ static void ib700_write_enable_reg(void *vp, uint32_t addr, uint32_t data)
ib700_debug("addr = %x, data = %x\n", addr, data);
timeout = (int64_t) time_map[data & 0xF] * get_ticks_per_sec();
- qemu_mod_timer(s->timer, qemu_get_clock (vm_clock) + timeout);
+ qemu_mod_timer(s->timer, qemu_get_clock_ns (vm_clock) + timeout);
}
/* A write (of any value) to this register disables the timer. */
@@ -99,7 +99,7 @@ static int wdt_ib700_init(ISADevice *dev)
ib700_debug("watchdog init\n");
- s->timer = qemu_new_timer(vm_clock, ib700_timer_expired, s);
+ s->timer = qemu_new_timer_ns(vm_clock, ib700_timer_expired, s);
register_ioport_write(0x441, 2, 1, ib700_write_disable_reg, s);
register_ioport_write(0x443, 2, 1, ib700_write_enable_reg, s);
diff --git a/monitor.c b/monitor.c
index 22ae3bb..413c963 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1873,7 +1873,7 @@ static void do_sendkey(Monitor *mon, const QDict *qdict)
kbd_put_keycode(keycode & 0x7f);
}
/* delayed key up events */
- qemu_mod_timer(key_timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(key_timer, qemu_get_clock_ns(vm_clock) +
muldiv64(get_ticks_per_sec(), hold_time, 1000));
}
@@ -5157,7 +5157,7 @@ void monitor_init(CharDriverState *chr, int flags)
Monitor *mon;
if (is_first_init) {
- key_timer = qemu_new_timer(vm_clock, release_keys, NULL);
+ key_timer = qemu_new_timer_ns(vm_clock, release_keys, NULL);
is_first_init = 0;
}
diff --git a/net/dump.c b/net/dump.c
index 6db7ecf..83eda0f 100644
--- a/net/dump.c
+++ b/net/dump.c
@@ -67,7 +67,7 @@ static ssize_t dump_receive(VLANClientState *nc, const uint8_t *buf, size_t size
return size;
}
- ts = muldiv64(qemu_get_clock(vm_clock), 1000000, get_ticks_per_sec());
+ ts = muldiv64(qemu_get_clock_ns(vm_clock), 1000000, get_ticks_per_sec());
caplen = size > s->pcap_caplen ? s->pcap_caplen : size;
hdr.ts.tv_sec = ts / 1000000;
diff --git a/qemu-timer.c b/qemu-timer.c
index 79b7678..f171e9c 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -247,7 +247,7 @@ static void icount_adjust(void)
return;
cur_time = cpu_get_clock();
- cur_icount = qemu_get_clock(vm_clock);
+ cur_icount = qemu_get_clock_ns(vm_clock);
delta = cur_icount - cur_time;
/* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */
if (delta > 0
@@ -276,7 +276,7 @@ static void icount_adjust_rt(void * opaque)
static void icount_adjust_vm(void * opaque)
{
qemu_mod_timer(icount_vm_timer,
- qemu_get_clock(vm_clock) + get_ticks_per_sec() / 10);
+ qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
icount_adjust();
}
@@ -609,9 +609,9 @@ void configure_icount(const char *option)
icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL);
qemu_mod_timer(icount_rt_timer,
qemu_get_clock_ms(rt_clock) + 1000);
- icount_vm_timer = qemu_new_timer(vm_clock, icount_adjust_vm, NULL);
+ icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL);
qemu_mod_timer(icount_vm_timer,
- qemu_get_clock(vm_clock) + get_ticks_per_sec() / 10);
+ qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
}
void qemu_run_all_timers(void)
@@ -653,7 +653,7 @@ static void host_alarm_handler(int host_signum)
static int64_t delta_min = INT64_MAX;
static int64_t delta_max, delta_cum, last_clock, delta, ti;
static int count;
- ti = qemu_get_clock(vm_clock);
+ ti = qemu_get_clock_ns(vm_clock);
if (last_clock != 0) {
delta = ti - last_clock;
if (delta < delta_min)
@@ -713,7 +713,7 @@ static int64_t qemu_next_alarm_deadline(void)
if (!use_icount && active_timers[QEMU_CLOCK_VIRTUAL]) {
delta = active_timers[QEMU_CLOCK_VIRTUAL]->expire_time -
- qemu_get_clock(vm_clock);
+ qemu_get_clock_ns(vm_clock);
} else {
delta = INT32_MAX;
}
diff --git a/savevm.c b/savevm.c
index 66f88c6..912b127 100644
--- a/savevm.c
+++ b/savevm.c
@@ -1943,7 +1943,7 @@ void do_savevm(Monitor *mon, const QDict *qdict)
sn->date_sec = tv.tv_sec;
sn->date_nsec = tv.tv_usec * 1000;
#endif
- sn->vm_clock_nsec = qemu_get_clock(vm_clock);
+ sn->vm_clock_nsec = qemu_get_clock_ns(vm_clock);
if (name) {
ret = bdrv_snapshot_find(bs, old_sn, name);
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index bd4012a..3134590 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -85,7 +85,7 @@ int kvm_arch_init_vcpu(CPUState *cenv)
sregs.pvr = cenv->spr[SPR_PVR];
ret = kvm_vcpu_ioctl(cenv, KVM_SET_SREGS, &sregs);
- idle_timer = qemu_new_timer(vm_clock, kvm_kick_env, cenv);
+ idle_timer = qemu_new_timer_ns(vm_clock, kvm_kick_env, cenv);
return ret;
}
@@ -246,7 +246,7 @@ int kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
printf("cpu %d fail inject %x\n", env->cpu_index, irq);
/* Always wake up soon in case the interrupt was level based */
- qemu_mod_timer(idle_timer, qemu_get_clock(vm_clock) +
+ qemu_mod_timer(idle_timer, qemu_get_clock_ns(vm_clock) +
(get_ticks_per_sec() / 50));
}
diff --git a/target-ppc/kvm_ppc.c b/target-ppc/kvm_ppc.c
index 6f0468c..536fcab 100644
--- a/target-ppc/kvm_ppc.c
+++ b/target-ppc/kvm_ppc.c
@@ -89,7 +89,7 @@ void kvmppc_fdt_update(void *fdt)
static void kvmppc_timer_hack(void *opaque)
{
qemu_service_io();
- qemu_mod_timer(kvmppc_timer, qemu_get_clock(vm_clock) + kvmppc_timer_rate);
+ qemu_mod_timer(kvmppc_timer, qemu_get_clock_ns(vm_clock) + kvmppc_timer_rate);
}
void kvmppc_init(void)
@@ -99,7 +99,7 @@ void kvmppc_init(void)
* run. So, until Qemu gains IO threads, we create this timer to ensure
* that the device model gets a chance to run. */
kvmppc_timer_rate = get_ticks_per_sec() / 10;
- kvmppc_timer = qemu_new_timer(vm_clock, &kvmppc_timer_hack, NULL);
- qemu_mod_timer(kvmppc_timer, qemu_get_clock(vm_clock) + kvmppc_timer_rate);
+ kvmppc_timer = qemu_new_timer_ns(vm_clock, &kvmppc_timer_hack, NULL);
+ qemu_mod_timer(kvmppc_timer, qemu_get_clock_ns(vm_clock) + kvmppc_timer_rate);
}
--
1.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [RFC PATCH 4/5] add a generic scaling mechanism for timers
2011-03-12 17:04 [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Paolo Bonzini
` (2 preceding siblings ...)
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 3/5] change all other clock references to use nanosecond " Paolo Bonzini
@ 2011-03-12 17:04 ` Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 5/5] remove qemu_get_clock Paolo Bonzini
2011-03-12 23:33 ` [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Anthony Liguori
5 siblings, 0 replies; 10+ messages in thread
From: Paolo Bonzini @ 2011-03-12 17:04 UTC (permalink / raw)
To: qemu-devel
This enables rt_clock timers to use nanosecond resolution, just by
using the _ns functions; there is really no reason to forbid that.
Migrated timers are all using vm_clock (of course; but I checked that
anyway) so the timers in the savevm files are already in nanosecond
resolution. So this patch makes no change to the migration format.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
qemu-timer.c | 25 +++++++++++++++++--------
qemu-timer.h | 9 ++++-----
2 files changed, 21 insertions(+), 13 deletions(-)
diff --git a/qemu-timer.c b/qemu-timer.c
index f171e9c..1aed535 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -153,12 +153,12 @@ void cpu_disable_ticks(void)
struct QEMUClock {
int type;
int enabled;
- /* XXX: add frequency */
};
struct QEMUTimer {
QEMUClock *clock;
- int64_t expire_time;
+ int64_t expire_time; /* in nanoseconds */
+ int scale;
QEMUTimerCB *cb;
void *opaque;
struct QEMUTimer *next;
@@ -391,7 +391,8 @@ void qemu_clock_enable(QEMUClock *clock, int enabled)
clock->enabled = enabled;
}
-QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque)
+QEMUTimer *qemu_new_timer(QEMUClock *clock, int scale,
+ QEMUTimerCB *cb, void *opaque)
{
QEMUTimer *ts;
@@ -399,6 +400,7 @@ QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque)
ts->clock = clock;
ts->cb = cb;
ts->opaque = opaque;
+ ts->scale = scale;
return ts;
}
@@ -429,7 +431,7 @@ void qemu_del_timer(QEMUTimer *ts)
/* modify the current timer so that it will be fired when current_time
>= expire_time. The corresponding callback will be called. */
-void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time)
+static void qemu_mod_timer_ns(QEMUTimer *ts, int64_t expire_time)
{
QEMUTimer **pt, *t;
@@ -462,6 +464,13 @@ void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time)
}
}
+/* modify the current timer so that it will be fired when current_time
+ >= expire_time. The corresponding callback will be called. */
+void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time)
+{
+ qemu_mod_timer_ns(ts, expire_time * ts->scale);
+}
+
int qemu_timer_pending(QEMUTimer *ts)
{
QEMUTimer *t;
@@ -476,7 +485,7 @@ int qemu_timer_expired(QEMUTimer *timer_head, int64_t current_time)
{
if (!timer_head)
return 0;
- return (timer_head->expire_time <= current_time);
+ return (timer_head->expire_time <= current_time * timer_head->scale);
}
static void qemu_run_timers(QEMUClock *clock)
@@ -487,7 +496,7 @@ static void qemu_run_timers(QEMUClock *clock)
if (!clock->enabled)
return;
- current_time = qemu_get_clock (clock);
+ current_time = qemu_get_clock_ns(clock);
ptimer_head = &active_timers[clock->type];
for(;;) {
ts = *ptimer_head;
@@ -564,7 +573,7 @@ void qemu_get_timer(QEMUFile *f, QEMUTimer *ts)
expire_time = qemu_get_be64(f);
if (expire_time != -1) {
- qemu_mod_timer(ts, expire_time);
+ qemu_mod_timer_ns(ts, expire_time);
} else {
qemu_del_timer(ts);
}
@@ -724,7 +733,7 @@ static int64_t qemu_next_alarm_deadline(void)
delta = hdelta;
}
if (active_timers[QEMU_CLOCK_REALTIME]) {
- rtdelta = (active_timers[QEMU_CLOCK_REALTIME]->expire_time * 1000000 -
+ rtdelta = (active_timers[QEMU_CLOCK_REALTIME]->expire_time -
qemu_get_clock_ns(rt_clock));
if (rtdelta < delta)
delta = rtdelta;
diff --git a/qemu-timer.h b/qemu-timer.h
index 345feea..0ea77fb 100644
--- a/qemu-timer.h
+++ b/qemu-timer.h
@@ -41,7 +41,8 @@ int64_t qemu_get_clock(QEMUClock *clock);
int64_t qemu_get_clock_ns(QEMUClock *clock);
void qemu_clock_enable(QEMUClock *clock, int enabled);
-QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
+QEMUTimer *qemu_new_timer(QEMUClock *clock, int scale,
+ QEMUTimerCB *cb, void *opaque);
void qemu_free_timer(QEMUTimer *ts);
void qemu_del_timer(QEMUTimer *ts);
void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
@@ -61,15 +62,13 @@ void quit_timers(void);
static inline QEMUTimer *qemu_new_timer_ns(QEMUClock *clock, QEMUTimerCB *cb,
void *opaque)
{
- assert(clock != rt_clock);
- return qemu_new_timer(clock, cb, opaque);
+ return qemu_new_timer(clock, SCALE_NS, cb, opaque);
}
static inline QEMUTimer *qemu_new_timer_ms(QEMUClock *clock, QEMUTimerCB *cb,
void *opaque)
{
- assert(clock == rt_clock);
- return qemu_new_timer(clock, cb, opaque);
+ return qemu_new_timer(clock, SCALE_MS, cb, opaque);
}
static inline int64_t qemu_get_clock_ms(QEMUClock *clock)
--
1.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [RFC PATCH 5/5] remove qemu_get_clock
2011-03-12 17:04 [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Paolo Bonzini
` (3 preceding siblings ...)
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 4/5] add a generic scaling mechanism for timers Paolo Bonzini
@ 2011-03-12 17:04 ` Paolo Bonzini
2011-03-12 23:33 ` [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Anthony Liguori
5 siblings, 0 replies; 10+ messages in thread
From: Paolo Bonzini @ 2011-03-12 17:04 UTC (permalink / raw)
To: qemu-devel
These patches are already not doing a great service to out-of-tree
modifications to QEMU. However, at least we can warn them by getting
rid of the old confusing functions, or otherwise causing compilation
errors. This patch removes qemu_get_clock; the previous one changed
qemu_new_timer's signature.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
qemu-timer.c | 17 -----------------
qemu-timer.h | 1 -
2 files changed, 0 insertions(+), 18 deletions(-)
diff --git a/qemu-timer.c b/qemu-timer.c
index 1aed535..f6e059f 100644
--- a/qemu-timer.c
+++ b/qemu-timer.c
@@ -511,23 +511,6 @@ static void qemu_run_timers(QEMUClock *clock)
}
}
-int64_t qemu_get_clock(QEMUClock *clock)
-{
- switch(clock->type) {
- case QEMU_CLOCK_REALTIME:
- return get_clock() / 1000000;
- default:
- case QEMU_CLOCK_VIRTUAL:
- if (use_icount) {
- return cpu_get_icount();
- } else {
- return cpu_get_clock();
- }
- case QEMU_CLOCK_HOST:
- return get_clock_realtime();
- }
-}
-
int64_t qemu_get_clock_ns(QEMUClock *clock)
{
switch(clock->type) {
diff --git a/qemu-timer.h b/qemu-timer.h
index 0ea77fb..75d5675 100644
--- a/qemu-timer.h
+++ b/qemu-timer.h
@@ -37,7 +37,6 @@ extern QEMUClock *vm_clock;
the virtual clock. */
extern QEMUClock *host_clock;
-int64_t qemu_get_clock(QEMUClock *clock);
int64_t qemu_get_clock_ns(QEMUClock *clock);
void qemu_clock_enable(QEMUClock *clock, int enabled);
--
1.7.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers
2011-03-12 17:04 [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Paolo Bonzini
` (4 preceding siblings ...)
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 5/5] remove qemu_get_clock Paolo Bonzini
@ 2011-03-12 23:33 ` Anthony Liguori
2011-03-14 7:14 ` Paolo Bonzini
5 siblings, 1 reply; 10+ messages in thread
From: Anthony Liguori @ 2011-03-12 23:33 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: qemu-devel
On 03/12/2011 11:04 AM, Paolo Bonzini wrote:
> Right now, rt_clock timers are limited to millisecond resolutions;
> other clocks are limited to nanoseconds. This patch series removes
> the limitation.
>
> In order to ease transition, new functions are provided with
> explicit resolution (milli/nanosecond). The old qemu_get_clock
> is removed. The old qemu_new_timer is grown a new argument to
> specify the resolution.
>
> Most of the patch series (patches 2/3) is mechanical (sed).
Really nice series.
The whole thing Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Did you really mean to RFC this? I don't think there's any sort of
problem applying this as it's mostly mechanical.
Regards,
Anthony Liguori
> Paolo Bonzini (5):
> add more helper functions with explicit milli/nanosecond resolution
> change all rt_clock references to use millisecond resolution
> accessors
> change all other clock references to use nanosecond resolution
> accessors
> add a generic scaling mechanism for timers
> remove qemu_get_clock
>
> audio/audio.c | 4 +-
> audio/noaudio.c | 4 +-
> audio/spiceaudio.c | 4 +-
> audio/wavaudio.c | 2 +-
> buffered_file.c | 6 ++--
> console.c | 4 +-
> hw/acpi_piix4.c | 8 +++---
> hw/adlib.c | 2 +-
> hw/apic.c | 8 +++---
> hw/arm_sysctl.c | 2 +-
> hw/armv7m_nvic.c | 8 +++---
> hw/baum.c | 4 +-
> hw/bt-hci-csr.c | 4 +-
> hw/bt-hci.c | 12 +++++-----
> hw/cuda.c | 24 ++++++++++----------
> hw/dp8393x.c | 6 ++--
> hw/etraxfs_timer.c | 2 +-
> hw/fdc.c | 4 +-
> hw/hpet.c | 14 +++++-----
> hw/i8254.c | 12 +++++-----
> hw/i8259.c | 4 +-
> hw/ide/core.c | 4 +-
> hw/intel-hda.c | 2 +-
> hw/lan9118.c | 4 +-
> hw/lm832x.c | 6 ++--
> hw/m48t59.c | 6 ++--
> hw/mc146818rtc.c | 16 ++++++------
> hw/mips_timer.c | 10 ++++----
> hw/mpcore.c | 6 ++--
> hw/omap1.c | 30 ++++++++++++------------
> hw/omap_gptimer.c | 14 +++++-----
> hw/omap_synctimer.c | 2 +-
> hw/pcnet.c | 6 ++--
> hw/pcspk.c | 2 +-
> hw/pflash_cfi01.c | 2 +-
> hw/pflash_cfi02.c | 6 ++--
> hw/pl031.c | 8 +++---
> hw/ppc.c | 52 +++++++++++++++++++++---------------------
> hw/ppc405_uc.c | 6 ++--
> hw/ppc_prep.c | 2 +-
> hw/ptimer.c | 14 +++++-----
> hw/pxa2xx.c | 30 ++++++++++++------------
> hw/pxa2xx_timer.c | 28 +++++++++++-----------
> hw/rc4030.c | 4 +-
> hw/rtl8139.c | 22 +++++++++---------
> hw/sb16.c | 4 +-
> hw/serial.c | 20 ++++++++--------
> hw/soc_dma.c | 4 +-
> hw/spitz.c | 6 ++--
> hw/stellaris.c | 6 ++--
> hw/sun4u.c | 12 +++++-----
> hw/syborg_rtc.c | 2 +-
> hw/tsc2005.c | 4 +-
> hw/tsc210x.c | 20 ++++++++--------
> hw/tusb6010.c | 8 +++---
> hw/twl92230.c | 8 +++---
> hw/usb-hid.c | 6 ++--
> hw/usb-musb.c | 4 +-
> hw/usb-ohci.c | 8 +++---
> hw/usb-uhci.c | 6 ++--
> hw/vga.c | 2 +-
> hw/virtio-net.c | 6 ++--
> hw/vt82c686.c | 8 +++---
> hw/wdt_i6300esb.c | 4 +-
> hw/wdt_ib700.c | 4 +-
> hw/xen_domainbuild.c | 6 ++--
> monitor.c | 4 +-
> net/dump.c | 2 +-
> qemu-char.c | 8 +++---
> qemu-timer.c | 60 +++++++++++++++++++++----------------------------
> qemu-timer.h | 25 +++++++++++++++++++-
> savevm.c | 6 ++--
> slirp/slirp.c | 2 +-
> target-ppc/kvm.c | 4 +-
> target-ppc/kvm_ppc.c | 6 ++--
> ui/spice-core.c | 4 +-
> ui/vnc.c | 10 ++++----
> usb-linux.c | 4 +-
> vl.c | 12 +++++-----
> 79 files changed, 364 insertions(+), 351 deletions(-)
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers
2011-03-12 23:33 ` [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Anthony Liguori
@ 2011-03-14 7:14 ` Paolo Bonzini
2011-03-21 13:35 ` [Qemu-devel] [PULL] " Paolo Bonzini
0 siblings, 1 reply; 10+ messages in thread
From: Paolo Bonzini @ 2011-03-14 7:14 UTC (permalink / raw)
To: Anthony Liguori; +Cc: qemu-devel
On 03/13/2011 12:33 AM, Anthony Liguori wrote:
>
> Really nice series.
>
> The whole thing Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
>
> Did you really mean to RFC this? I don't think there's any sort of
> problem applying this as it's mostly mechanical.
Yeah, it's just that the topic had been brought before and other people
may have other ideas regarding the API. It's something pretty central
so the API change warranted an RFC. If you want to apply it, now or in
a few days, I certainly won't complain.
Paolo
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Qemu-devel] [PULL] allow arbitrary scaling of timers
2011-03-14 7:14 ` Paolo Bonzini
@ 2011-03-21 13:35 ` Paolo Bonzini
2011-03-21 20:44 ` Aurelien Jarno
0 siblings, 1 reply; 10+ messages in thread
From: Paolo Bonzini @ 2011-03-21 13:35 UTC (permalink / raw)
To: Anthony Liguori; +Cc: qemu-devel
On 03/14/2011 08:14 AM, Paolo Bonzini wrote:
> On 03/13/2011 12:33 AM, Anthony Liguori wrote:
>> Really nice series.
>>
>> The whole thing Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
>>
>> Did you really mean to RFC this? I don't think there's any sort of
>> problem applying this as it's mostly mechanical.
>
> Yeah, it's just that the topic had been brought before and other people
> may have other ideas regarding the API. It's something pretty central so
> the API change warranted an RFC. If you want to apply it, now or in a
> few days, I certainly won't complain.
The following changes since commit e0efb993b817564ef84e462ac1fe35f89b57ad7b:
Fix conversions from pointer to int and vice versa (2011-03-20 21:39:23 +0000)
are available in the git repository at:
git://github.com/bonzini/qemu.git for-anthony
Paolo Bonzini (5):
add more helper functions with explicit milli/nanosecond resolution
change all rt_clock references to use millisecond resolution accessors
change all other clock references to use nanosecond resolution accessors
add a generic scaling mechanism for timers
remove qemu_get_clock
audio/audio.c | 4 +-
audio/noaudio.c | 4 +-
audio/spiceaudio.c | 4 +-
audio/wavaudio.c | 2 +-
buffered_file.c | 6 ++--
console.c | 4 +-
hw/acpi_piix4.c | 8 +++---
hw/adlib.c | 2 +-
hw/apic.c | 8 +++---
hw/arm_sysctl.c | 2 +-
hw/armv7m_nvic.c | 8 +++---
hw/baum.c | 4 +-
hw/bt-hci-csr.c | 4 +-
hw/bt-hci.c | 12 +++++-----
hw/cuda.c | 24 ++++++++++----------
hw/dp8393x.c | 6 ++--
hw/etraxfs_timer.c | 2 +-
hw/fdc.c | 4 +-
hw/hpet.c | 14 +++++-----
hw/i8254.c | 12 +++++-----
hw/i8259.c | 4 +-
hw/ide/core.c | 4 +-
hw/intel-hda.c | 2 +-
hw/lan9118.c | 4 +-
hw/lm832x.c | 6 ++--
hw/m48t59.c | 6 ++--
hw/mc146818rtc.c | 16 ++++++------
hw/mips_timer.c | 10 ++++----
hw/mpcore.c | 6 ++--
hw/omap1.c | 30 ++++++++++++------------
hw/omap_gptimer.c | 14 +++++-----
hw/omap_synctimer.c | 2 +-
hw/pcnet.c | 6 ++--
hw/pcspk.c | 2 +-
hw/pflash_cfi01.c | 2 +-
hw/pflash_cfi02.c | 6 ++--
hw/pl031.c | 8 +++---
hw/ppc.c | 52 +++++++++++++++++++++---------------------
hw/ppc405_uc.c | 6 ++--
hw/ppc_prep.c | 2 +-
hw/ptimer.c | 14 +++++-----
hw/pxa2xx.c | 30 ++++++++++++------------
hw/pxa2xx_timer.c | 28 +++++++++++-----------
hw/rc4030.c | 4 +-
hw/rtl8139.c | 22 +++++++++---------
hw/sb16.c | 4 +-
hw/serial.c | 20 ++++++++--------
hw/soc_dma.c | 4 +-
hw/spitz.c | 6 ++--
hw/stellaris.c | 6 ++--
hw/sun4u.c | 12 +++++-----
hw/syborg_rtc.c | 2 +-
hw/tsc2005.c | 4 +-
hw/tsc210x.c | 20 ++++++++--------
hw/tusb6010.c | 8 +++---
hw/twl92230.c | 8 +++---
hw/usb-hid.c | 6 ++--
hw/usb-musb.c | 4 +-
hw/usb-ohci.c | 8 +++---
hw/usb-uhci.c | 6 ++--
hw/vga.c | 2 +-
hw/virtio-net.c | 6 ++--
hw/vt82c686.c | 8 +++---
hw/wdt_i6300esb.c | 4 +-
hw/wdt_ib700.c | 4 +-
hw/xen_domainbuild.c | 6 ++--
monitor.c | 4 +-
net/dump.c | 2 +-
qemu-char.c | 8 +++---
qemu-timer.c | 60 +++++++++++++++++++++----------------------------
qemu-timer.h | 25 +++++++++++++++++++-
savevm.c | 6 ++--
slirp/slirp.c | 2 +-
target-ppc/kvm.c | 4 +-
target-ppc/kvm_ppc.c | 6 ++--
ui/spice-core.c | 4 +-
ui/vnc.c | 10 ++++----
usb-linux.c | 4 +-
vl.c | 12 +++++-----
79 files changed, 364 insertions(+), 351 deletions(-)
--
1.7.4
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [PULL] allow arbitrary scaling of timers
2011-03-21 13:35 ` [Qemu-devel] [PULL] " Paolo Bonzini
@ 2011-03-21 20:44 ` Aurelien Jarno
0 siblings, 0 replies; 10+ messages in thread
From: Aurelien Jarno @ 2011-03-21 20:44 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: qemu-devel
On Mon, Mar 21, 2011 at 02:35:32PM +0100, Paolo Bonzini wrote:
> On 03/14/2011 08:14 AM, Paolo Bonzini wrote:
> > On 03/13/2011 12:33 AM, Anthony Liguori wrote:
> >> Really nice series.
> >>
> >> The whole thing Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
> >>
> >> Did you really mean to RFC this? I don't think there's any sort of
> >> problem applying this as it's mostly mechanical.
> >
> > Yeah, it's just that the topic had been brought before and other people
> > may have other ideas regarding the API. It's something pretty central so
> > the API change warranted an RFC. If you want to apply it, now or in a
> > few days, I certainly won't complain.
>
> The following changes since commit e0efb993b817564ef84e462ac1fe35f89b57ad7b:
>
> Fix conversions from pointer to int and vice versa (2011-03-20 21:39:23 +0000)
>
> are available in the git repository at:
> git://github.com/bonzini/qemu.git for-anthony
>
> Paolo Bonzini (5):
> add more helper functions with explicit milli/nanosecond resolution
> change all rt_clock references to use millisecond resolution accessors
> change all other clock references to use nanosecond resolution accessors
> add a generic scaling mechanism for timers
> remove qemu_get_clock
>
> audio/audio.c | 4 +-
> audio/noaudio.c | 4 +-
> audio/spiceaudio.c | 4 +-
> audio/wavaudio.c | 2 +-
> buffered_file.c | 6 ++--
> console.c | 4 +-
> hw/acpi_piix4.c | 8 +++---
> hw/adlib.c | 2 +-
> hw/apic.c | 8 +++---
> hw/arm_sysctl.c | 2 +-
> hw/armv7m_nvic.c | 8 +++---
> hw/baum.c | 4 +-
> hw/bt-hci-csr.c | 4 +-
> hw/bt-hci.c | 12 +++++-----
> hw/cuda.c | 24 ++++++++++----------
> hw/dp8393x.c | 6 ++--
> hw/etraxfs_timer.c | 2 +-
> hw/fdc.c | 4 +-
> hw/hpet.c | 14 +++++-----
> hw/i8254.c | 12 +++++-----
> hw/i8259.c | 4 +-
> hw/ide/core.c | 4 +-
> hw/intel-hda.c | 2 +-
> hw/lan9118.c | 4 +-
> hw/lm832x.c | 6 ++--
> hw/m48t59.c | 6 ++--
> hw/mc146818rtc.c | 16 ++++++------
> hw/mips_timer.c | 10 ++++----
> hw/mpcore.c | 6 ++--
> hw/omap1.c | 30 ++++++++++++------------
> hw/omap_gptimer.c | 14 +++++-----
> hw/omap_synctimer.c | 2 +-
> hw/pcnet.c | 6 ++--
> hw/pcspk.c | 2 +-
> hw/pflash_cfi01.c | 2 +-
> hw/pflash_cfi02.c | 6 ++--
> hw/pl031.c | 8 +++---
> hw/ppc.c | 52 +++++++++++++++++++++---------------------
> hw/ppc405_uc.c | 6 ++--
> hw/ppc_prep.c | 2 +-
> hw/ptimer.c | 14 +++++-----
> hw/pxa2xx.c | 30 ++++++++++++------------
> hw/pxa2xx_timer.c | 28 +++++++++++-----------
> hw/rc4030.c | 4 +-
> hw/rtl8139.c | 22 +++++++++---------
> hw/sb16.c | 4 +-
> hw/serial.c | 20 ++++++++--------
> hw/soc_dma.c | 4 +-
> hw/spitz.c | 6 ++--
> hw/stellaris.c | 6 ++--
> hw/sun4u.c | 12 +++++-----
> hw/syborg_rtc.c | 2 +-
> hw/tsc2005.c | 4 +-
> hw/tsc210x.c | 20 ++++++++--------
> hw/tusb6010.c | 8 +++---
> hw/twl92230.c | 8 +++---
> hw/usb-hid.c | 6 ++--
> hw/usb-musb.c | 4 +-
> hw/usb-ohci.c | 8 +++---
> hw/usb-uhci.c | 6 ++--
> hw/vga.c | 2 +-
> hw/virtio-net.c | 6 ++--
> hw/vt82c686.c | 8 +++---
> hw/wdt_i6300esb.c | 4 +-
> hw/wdt_ib700.c | 4 +-
> hw/xen_domainbuild.c | 6 ++--
> monitor.c | 4 +-
> net/dump.c | 2 +-
> qemu-char.c | 8 +++---
> qemu-timer.c | 60 +++++++++++++++++++++----------------------------
> qemu-timer.h | 25 +++++++++++++++++++-
> savevm.c | 6 ++--
> slirp/slirp.c | 2 +-
> target-ppc/kvm.c | 4 +-
> target-ppc/kvm_ppc.c | 6 ++--
> ui/spice-core.c | 4 +-
> ui/vnc.c | 10 ++++----
> usb-linux.c | 4 +-
> vl.c | 12 +++++-----
> 79 files changed, 364 insertions(+), 351 deletions(-)
>
Thanks, pulled.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2011-03-21 20:44 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-03-12 17:04 [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 1/5] add more helper functions with explicit milli/nanosecond resolution Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 2/5] change all rt_clock references to use millisecond resolution accessors Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 3/5] change all other clock references to use nanosecond " Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 4/5] add a generic scaling mechanism for timers Paolo Bonzini
2011-03-12 17:04 ` [Qemu-devel] [RFC PATCH 5/5] remove qemu_get_clock Paolo Bonzini
2011-03-12 23:33 ` [Qemu-devel] [RFC PATCH 0/5] allow arbitrary scaling of timers Anthony Liguori
2011-03-14 7:14 ` Paolo Bonzini
2011-03-21 13:35 ` [Qemu-devel] [PULL] " Paolo Bonzini
2011-03-21 20:44 ` Aurelien Jarno
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).