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From: "Philippe Mathieu-Daudé via" <qemu-devel@nongnu.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, pbonzini@redhat.com
Subject: Re: [PATCH v3 5/6] accel/tcg: Introduce tlb_set_page_full
Date: Mon, 5 Sep 2022 23:20:33 +0200	[thread overview]
Message-ID: <12d8deb8-3c2e-8234-0e15-ecd52f2dd3e1@amsat.org> (raw)
In-Reply-To: <20220905202259.189852-6-richard.henderson@linaro.org>

On 5/9/22 22:22, Richard Henderson wrote:
> Now that we have collected all of the page data into
> CPUTLBEntryFull, provide an interface to record that
> all in one go, instead of using 4 arguments.  This interface
> allows CPUTLBEntryFull to be extended without having to
> change the number of arguments.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   include/exec/cpu-defs.h | 14 ++++++++++
>   include/exec/exec-all.h | 22 +++++++++++++++
>   accel/tcg/cputlb.c      | 62 ++++++++++++++++++++++++++++-------------
>   3 files changed, 78 insertions(+), 20 deletions(-)

> @@ -1117,35 +1117,36 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr,
>       CPUTLBEntry *te, tn;
>       hwaddr iotlb, xlat, sz, paddr_page;
>       target_ulong vaddr_page;
> -    int asidx = cpu_asidx_from_attrs(cpu, attrs);
> -    int wp_flags;
> +    int asidx, wp_flags, prot;
>       bool is_ram, is_romd;
>   
>       assert_cpu_is_self(cpu);
>   
> -    if (size <= TARGET_PAGE_SIZE) {
> +    if (full->lg_page_size <= TARGET_PAGE_BITS) {
>           sz = TARGET_PAGE_SIZE;
>       } else {
> -        tlb_add_large_page(env, mmu_idx, vaddr, size);
> -        sz = size;
> +        sz = (hwaddr)1 << full->lg_page_size;

Could use BIT_ULL() here.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  reply	other threads:[~2022-09-05 21:22 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-05 20:22 [PATCH v3 0/6] tcg: Introduce CPUTLBEntryFull Richard Henderson
2022-09-05 20:22 ` [PATCH v3 1/6] accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull Richard Henderson
2022-09-05 21:07   ` Philippe Mathieu-Daudé via
2022-09-20 10:42   ` Peter Maydell
2022-09-05 20:22 ` [PATCH v3 2/6] accel/tcg: Drop addr member from SavedIOTLB Richard Henderson
2022-09-05 21:07   ` Philippe Mathieu-Daudé via
2022-09-20 10:43   ` Peter Maydell
2022-09-05 20:22 ` [PATCH v3 3/6] accel/tcg: Suppress auto-invalidate in probe_access_internal Richard Henderson
2022-09-20 11:21   ` Peter Maydell
2022-09-05 20:22 ` [PATCH v3 4/6] accel/tcg: Introduce probe_access_full Richard Henderson
2022-09-05 21:10   ` Philippe Mathieu-Daudé via
2022-09-20 10:46   ` Peter Maydell
2022-09-05 20:22 ` [PATCH v3 5/6] accel/tcg: Introduce tlb_set_page_full Richard Henderson
2022-09-05 21:20   ` Philippe Mathieu-Daudé via [this message]
2022-09-20 10:59   ` Peter Maydell
2022-09-05 20:22 ` [PATCH v3 6/6] include/exec: Introduce TARGET_PAGE_ENTRY_EXTRA Richard Henderson
2022-09-05 21:28   ` Philippe Mathieu-Daudé via
2022-09-06  7:42     ` Richard Henderson
2022-09-20 10:59   ` Peter Maydell

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