From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=49771 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pz6ww-000191-Rm for qemu-devel@nongnu.org; Mon, 14 Mar 2011 08:32:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Pz6wv-0004tc-4D for qemu-devel@nongnu.org; Mon, 14 Mar 2011 08:32:38 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:51598) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Pz6wu-0004rs-R4 for qemu-devel@nongnu.org; Mon, 14 Mar 2011 08:32:37 -0400 From: Peter Maydell Date: Mon, 14 Mar 2011 12:32:27 +0000 Message-Id: <1300105948-26961-2-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1300105948-26961-1-git-send-email-peter.maydell@linaro.org> References: <1300105948-26961-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 1/2] target-arm: Fix VRECPS edge cases handling List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: patches@linaro.org Correct the handling of edge cases for the VRECPS instruction: * this is a Neon instruction so uses the "standard FPSCR value" * (zero, inf) is a special case which returns 2.0 Signed-off-by: Peter Maydell --- target-arm/helper.c | 11 ++++++++--- 1 files changed, 8 insertions(+), 3 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index d360121..c01a5a2 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2707,11 +2707,16 @@ uint32_t HELPER(vfp_fcvt_f32_to_f16)(float32 a, CPUState *env) return do_fcvt_f32_to_f16(a, env, &env->vfp.fp_status); } +#define float32_two make_float32(0x40000000) + float32 HELPER(recps_f32)(float32 a, float32 b, CPUState *env) { - float_status *s = &env->vfp.fp_status; - float32 two = int32_to_float32(2, s); - return float32_sub(two, float32_mul(a, b, s), s); + float_status *s = &env->vfp.standard_fp_status; + if ((float32_is_infinity(a) && float32_is_zero_or_denormal(b)) || + (float32_is_infinity(b) && float32_is_zero_or_denormal(a))) { + return float32_two; + } + return float32_sub(float32_two, float32_mul(a, b, s), s); } float32 HELPER(rsqrts_f32)(float32 a, float32 b, CPUState *env) -- 1.7.1