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[90.182.62.66]) by smtp.gmail.com with ESMTPSA id n7-20020adff087000000b0030ae5a0516csm16932122wro.17.2023.06.13.21.39.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 13 Jun 2023 21:39:54 -0700 (PDT) Message-ID: <13011115-c8f0-8bbe-be23-b892e95cd336@linaro.org> Date: Wed, 14 Jun 2023 06:39:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PULL 00/60] riscv-to-apply queue Content-Language: en-US To: Alistair Francis , qemu-devel@nongnu.org Cc: Alistair Francis References: <20230614012017.3100663-1-alistair.francis@wdc.com> From: Richard Henderson In-Reply-To: <20230614012017.3100663-1-alistair.francis@wdc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.098, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/14/23 03:19, Alistair Francis wrote: > The following changes since commit fdd0df5340a8ebc8de88078387ebc85c5af7b40f: > > Merge tag 'pull-ppc-20230610' ofhttps://gitlab.com/danielhb/qemu into staging (2023-06-10 07:25:00 -0700) > > are available in the Git repository at: > > https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20230614 > > for you to fetch changes up to 860029321d9ebdff47e89561de61e9441fead70a: > > hw/intc: If mmsiaddrcfgh.L == 1, smsiaddrcfg and smsiaddrcfgh are read-only. (2023-06-14 10:04:30 +1000) > > ---------------------------------------------------------------- > Second RISC-V PR for 8.1 > > * Skip Vector set tail when vta is zero > * Move zc* out of the experimental properties > * Mask the implicitly enabled extensions in isa_string based on priv version > * Rework CPU extension validation and validate MISA changes > * Fixup PMP TLB cacheing errors > * Writing to pmpaddr and MML/MMWP correctly triggers TLB flushes > * Fixup PMP bypass checks > * Deny access if access is partially inside a PMP entry > * Correct OpenTitanState parent type/size > * Fix QEMU crash when NUMA nodes exceed available CPUs > * Fix pointer mask transformation for vector address > * Updates and improvements for Smstateen > * Support disas for Zcm* extensions > * Support disas for Z*inx extensions > * Remove unused decomp_rv32/64 value for vector instructions > * Enable PC-relative translation > * Assume M-mode FW in pflash0 only when "-bios none" > * Support using pflash via -blockdev option > * Add vector registers to log > * Clean up reference of Vector MTYPE > * Remove the check for extra Vector tail elements > * Smepmp: Return error when access permission not allowed in PMP > * Fixes for smsiaddrcfg and smsiaddrcfgh in AIA Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate. r~