From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>, patches@linaro.org
Subject: [Qemu-devel] [PATCH v2 4/5] hw/sun4m: Use the QEMUMachine max_ram to implement memory limit
Date: Mon, 28 Mar 2011 14:44:21 +0100 [thread overview]
Message-ID: <1301319862-22998-5-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1301319862-22998-1-git-send-email-peter.maydell@linaro.org>
Use the max_ram field in QEMUMachine to indicate maximum memory,
rather than a field in the sun4*_hwdef structure. This allows us
to use the vl.c check on RAM specifications rather than having to
code our own.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/sun4m.c | 42 ++++++++++++++++--------------------------
1 files changed, 16 insertions(+), 26 deletions(-)
diff --git a/hw/sun4m.c b/hw/sun4m.c
index db90fbe..47692dd 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -103,7 +103,6 @@ struct sun4m_hwdef {
const uint8_t nvram_machine_id;
const uint16_t machine_id;
const uint32_t iommu_version;
- const uint64_t max_mem;
const char * const default_cpu_model;
};
@@ -121,7 +120,6 @@ struct sun4d_hwdef {
const uint8_t nvram_machine_id;
const uint16_t machine_id;
const uint32_t iounit_version;
- const uint64_t max_mem;
const char * const default_cpu_model;
};
@@ -135,7 +133,6 @@ struct sun4c_hwdef {
const uint8_t nvram_machine_id;
const uint16_t machine_id;
const uint32_t iommu_version;
- const uint64_t max_mem;
const char * const default_cpu_model;
};
@@ -747,13 +744,6 @@ static void ram_init(target_phys_addr_t addr, ram_addr_t RAM_size,
RamDevice *d;
/* allocate RAM */
- if ((uint64_t)RAM_size > max_mem) {
- fprintf(stderr,
- "qemu: Too much memory for this machine: %d, maximum %d\n",
- (unsigned int)(RAM_size / (1024 * 1024)),
- (unsigned int)(max_mem / (1024 * 1024)));
- exit(1);
- }
dev = qdev_create(NULL, "memory");
s = sysbus_from_qdev(dev);
@@ -834,10 +824,10 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
/* set up devices */
- ram_init(0, RAM_size, hwdef->max_mem);
+ ram_init(0, RAM_size, hwdef->machine.max_ram);
/* models without ECC don't trap when missing ram is accessed */
if (!hwdef->ecc_base) {
- empty_slot_init(RAM_size, hwdef->max_mem - RAM_size);
+ empty_slot_init(RAM_size, hwdef->machine.max_ram - RAM_size);
}
prom_init(hwdef->slavio_base, bios_name);
@@ -1111,6 +1101,7 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.desc = "Sun4m platform, SPARCstation 5",
.init = ss5_init,
.use_scsi = 1,
+ .max_ram = 0x10000000,
.is_default = 1,
},
.iommu_base = 0x10000000,
@@ -1136,7 +1127,6 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.nvram_machine_id = 0x80,
.machine_id = ss5_id,
.iommu_version = 0x05000000,
- .max_mem = 0x10000000,
.default_cpu_model = "Fujitsu MB86904",
},
/* SS-10 */
@@ -1147,6 +1137,7 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.init = ss10_init,
.use_scsi = 1,
.max_cpus = 4,
+ .max_ram = 0xf00000000ULL,
},
.iommu_base = 0xfe0000000ULL,
.tcx_base = 0xe20000000ULL,
@@ -1169,7 +1160,6 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.nvram_machine_id = 0x72,
.machine_id = ss10_id,
.iommu_version = 0x03000000,
- .max_mem = 0xf00000000ULL,
.default_cpu_model = "TI SuperSparc II",
},
/* SS-600MP */
@@ -1180,6 +1170,7 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.init = ss600mp_init,
.use_scsi = 1,
.max_cpus = 4,
+ .max_ram = 0xf00000000ULL,
},
.iommu_base = 0xfe0000000ULL,
.tcx_base = 0xe20000000ULL,
@@ -1200,7 +1191,6 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.nvram_machine_id = 0x71,
.machine_id = ss600mp_id,
.iommu_version = 0x01000000,
- .max_mem = 0xf00000000ULL,
.default_cpu_model = "TI SuperSparc II",
},
/* SS-20 */
@@ -1211,6 +1201,7 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.init = ss20_init,
.use_scsi = 1,
.max_cpus = 4,
+ .max_ram = 0xf00000000ULL,
},
.iommu_base = 0xfe0000000ULL,
.tcx_base = 0xe20000000ULL,
@@ -1249,7 +1240,6 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.nvram_machine_id = 0x72,
.machine_id = ss20_id,
.iommu_version = 0x13000000,
- .max_mem = 0xf00000000ULL,
.default_cpu_model = "TI SuperSparc II",
},
/* Voyager */
@@ -1259,6 +1249,7 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.desc = "Sun4m platform, SPARCstation Voyager",
.init = vger_init,
.use_scsi = 1,
+ .max_ram = 0x10000000,
},
.iommu_base = 0x10000000,
.tcx_base = 0x50000000,
@@ -1279,7 +1270,6 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.nvram_machine_id = 0x80,
.machine_id = vger_id,
.iommu_version = 0x05000000,
- .max_mem = 0x10000000,
.default_cpu_model = "Fujitsu MB86904",
},
/* LX */
@@ -1289,6 +1279,7 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.desc = "Sun4m platform, SPARCstation LX",
.init = ss_lx_init,
.use_scsi = 1,
+ .max_ram = 0x10000000,
},
.iommu_base = 0x10000000,
.iommu_pad_base = 0x10004000,
@@ -1310,7 +1301,6 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.nvram_machine_id = 0x80,
.machine_id = lx_id,
.iommu_version = 0x04000000,
- .max_mem = 0x10000000,
.default_cpu_model = "TI MicroSparc I",
},
/* SS-4 */
@@ -1320,6 +1310,7 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.desc = "Sun4m platform, SPARCstation 4",
.init = ss4_init,
.use_scsi = 1,
+ .max_ram = 0x10000000,
},
.iommu_base = 0x10000000,
.tcx_base = 0x50000000,
@@ -1341,7 +1332,6 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.nvram_machine_id = 0x80,
.machine_id = ss4_id,
.iommu_version = 0x05000000,
- .max_mem = 0x10000000,
.default_cpu_model = "Fujitsu MB86904",
},
/* SPARCClassic */
@@ -1351,6 +1341,7 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.desc = "Sun4m platform, SPARCClassic",
.init = scls_init,
.use_scsi = 1,
+ .max_ram = 0x10000000,
},
.iommu_base = 0x10000000,
.tcx_base = 0x50000000,
@@ -1371,7 +1362,6 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.nvram_machine_id = 0x80,
.machine_id = scls_id,
.iommu_version = 0x05000000,
- .max_mem = 0x10000000,
.default_cpu_model = "TI MicroSparc I",
},
/* SPARCbook */
@@ -1381,6 +1371,7 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.desc = "Sun4m platform, SPARCbook",
.init = sbook_init,
.use_scsi = 1,
+ .max_ram = 0x10000000,
},
.iommu_base = 0x10000000,
.tcx_base = 0x50000000, // XXX
@@ -1401,7 +1392,6 @@ static struct sun4m_hwdef sun4m_hwdefs[] = {
.nvram_machine_id = 0x80,
.machine_id = sbook_id,
.iommu_version = 0x05000000,
- .max_mem = 0x10000000,
.default_cpu_model = "TI MicroSparc I",
},
};
@@ -1453,7 +1443,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS);
/* set up devices */
- ram_init(0, RAM_size, hwdef->max_mem);
+ ram_init(0, RAM_size, hwdef->machine.max_ram);
prom_init(hwdef->slavio_base, bios_name);
@@ -1572,6 +1562,7 @@ static struct sun4d_hwdef sun4d_hwdefs[] = {
.init = ss1000_init,
.use_scsi = 1,
.max_cpus = 8,
+ .max_ram = 0xf00000000ULL,
},
.iounit_bases = {
0xfe0200000ULL,
@@ -1594,7 +1585,6 @@ static struct sun4d_hwdef sun4d_hwdefs[] = {
.nvram_machine_id = 0x80,
.machine_id = ss1000_id,
.iounit_version = 0x03000000,
- .max_mem = 0xf00000000ULL,
.default_cpu_model = "TI SuperSparc II",
},
/* SS-2000 */
@@ -1605,6 +1595,7 @@ static struct sun4d_hwdef sun4d_hwdefs[] = {
.init = ss2000_init,
.use_scsi = 1,
.max_cpus = 20,
+ .max_ram = 0xf00000000ULL,
},
.iounit_bases = {
0xfe0200000ULL,
@@ -1627,7 +1618,6 @@ static struct sun4d_hwdef sun4d_hwdefs[] = {
.nvram_machine_id = 0x80,
.machine_id = ss2000_id,
.iounit_version = 0x03000000,
- .max_mem = 0xf00000000ULL,
.default_cpu_model = "TI SuperSparc II",
},
};
@@ -1675,7 +1665,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
cpu_devinit(cpu_model, 0, hwdef->slavio_base, &cpu_irqs);
/* set up devices */
- ram_init(0, RAM_size, hwdef->max_mem);
+ ram_init(0, RAM_size, hwdef->machine.max_ram);
prom_init(hwdef->slavio_base, bios_name);
@@ -1785,6 +1775,7 @@ static struct sun4c_hwdef sun4c_hwdefs[] = {
.desc = "Sun4c platform, SPARCstation 2",
.init = ss2_init,
.use_scsi = 1,
+ .max_ram = 0x10000000,
},
.iommu_base = 0xf8000000,
.tcx_base = 0xfe000000,
@@ -1801,7 +1792,6 @@ static struct sun4c_hwdef sun4c_hwdefs[] = {
.aux1_base = 0xf7400003,
.nvram_machine_id = 0x55,
.machine_id = ss2_id,
- .max_mem = 0x10000000,
.default_cpu_model = "Cypress CY7C601",
},
};
--
1.7.1
next prev parent reply other threads:[~2011-03-28 13:44 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-28 13:44 [Qemu-devel] [PATCH v2 0/5] Let boards state maximum RAM limits in QEMUMachine struct Peter Maydell
2011-03-28 13:44 ` [Qemu-devel] [PATCH v2 1/5] Allow boards to specify maximum RAM size Peter Maydell
2011-03-28 13:44 ` [Qemu-devel] [PATCH v2 2/5] hw: Add maximum RAM specifications for ARM devboard models Peter Maydell
2011-03-28 13:44 ` [Qemu-devel] [PATCH v2 3/5] hw/sun4m: Move QEMUMachine structs into sun4*_hwdef structs Peter Maydell
2011-03-28 17:31 ` [Qemu-devel] " Blue Swirl
2011-03-28 17:36 ` Peter Maydell
2011-03-28 17:58 ` Blue Swirl
2011-03-28 18:05 ` Peter Maydell
2011-03-28 13:44 ` Peter Maydell [this message]
2011-03-28 13:44 ` [Qemu-devel] [PATCH v2 5/5] hw/sun4m: Use a macro to hide the repetitive board init functions Peter Maydell
2011-03-28 17:32 ` [Qemu-devel] Re: [PATCH v2 0/5] Let boards state maximum RAM limits in QEMUMachine struct Blue Swirl
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