From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:43533) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCDpR-0005wC-3o for qemu-devel@nongnu.org; Tue, 19 Apr 2011 12:31:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QCDpP-0007EL-PH for qemu-devel@nongnu.org; Tue, 19 Apr 2011 12:31:05 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:36822) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QCDpP-0007Dv-HD for qemu-devel@nongnu.org; Tue, 19 Apr 2011 12:31:03 -0400 From: Peter Maydell Date: Tue, 19 Apr 2011 17:30:55 +0100 Message-Id: <1303230655-31280-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH] target-arm: Set Invalid flag for NaN in float-to-int conversions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: patches@linaro.org When we catch the special case of an input NaN in ARM float to int helper functions, set the Invalid flag as well as returning the correct result. Signed-off-by: Peter Maydell --- target-arm/helper.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 12127de..d5f2ace 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2542,6 +2542,7 @@ float64 VFP_HELPER(sito, d)(uint32_t x, CPUState *env) uint32_t VFP_HELPER(toui, s)(float32 x, CPUState *env) { if (float32_is_any_nan(x)) { + float_raise(float_flag_invalid, &env->vfp.fp_status); return 0; } return float32_to_uint32(x, &env->vfp.fp_status); @@ -2550,6 +2551,7 @@ uint32_t VFP_HELPER(toui, s)(float32 x, CPUState *env) uint32_t VFP_HELPER(toui, d)(float64 x, CPUState *env) { if (float64_is_any_nan(x)) { + float_raise(float_flag_invalid, &env->vfp.fp_status); return 0; } return float64_to_uint32(x, &env->vfp.fp_status); @@ -2558,6 +2560,7 @@ uint32_t VFP_HELPER(toui, d)(float64 x, CPUState *env) uint32_t VFP_HELPER(tosi, s)(float32 x, CPUState *env) { if (float32_is_any_nan(x)) { + float_raise(float_flag_invalid, &env->vfp.fp_status); return 0; } return float32_to_int32(x, &env->vfp.fp_status); @@ -2566,6 +2569,7 @@ uint32_t VFP_HELPER(tosi, s)(float32 x, CPUState *env) uint32_t VFP_HELPER(tosi, d)(float64 x, CPUState *env) { if (float64_is_any_nan(x)) { + float_raise(float_flag_invalid, &env->vfp.fp_status); return 0; } return float64_to_int32(x, &env->vfp.fp_status); @@ -2574,6 +2578,7 @@ uint32_t VFP_HELPER(tosi, d)(float64 x, CPUState *env) uint32_t VFP_HELPER(touiz, s)(float32 x, CPUState *env) { if (float32_is_any_nan(x)) { + float_raise(float_flag_invalid, &env->vfp.fp_status); return 0; } return float32_to_uint32_round_to_zero(x, &env->vfp.fp_status); @@ -2582,6 +2587,7 @@ uint32_t VFP_HELPER(touiz, s)(float32 x, CPUState *env) uint32_t VFP_HELPER(touiz, d)(float64 x, CPUState *env) { if (float64_is_any_nan(x)) { + float_raise(float_flag_invalid, &env->vfp.fp_status); return 0; } return float64_to_uint32_round_to_zero(x, &env->vfp.fp_status); @@ -2590,6 +2596,7 @@ uint32_t VFP_HELPER(touiz, d)(float64 x, CPUState *env) uint32_t VFP_HELPER(tosiz, s)(float32 x, CPUState *env) { if (float32_is_any_nan(x)) { + float_raise(float_flag_invalid, &env->vfp.fp_status); return 0; } return float32_to_int32_round_to_zero(x, &env->vfp.fp_status); @@ -2598,6 +2605,7 @@ uint32_t VFP_HELPER(tosiz, s)(float32 x, CPUState *env) uint32_t VFP_HELPER(tosiz, d)(float64 x, CPUState *env) { if (float64_is_any_nan(x)) { + float_raise(float_flag_invalid, &env->vfp.fp_status); return 0; } return float64_to_int32_round_to_zero(x, &env->vfp.fp_status); @@ -2636,6 +2644,7 @@ uint##fsz##_t VFP_HELPER(to##name, p)(float##fsz x, uint32_t shift, \ { \ float##fsz tmp; \ if (float##fsz##_is_any_nan(x)) { \ + float_raise(float_flag_invalid, &env->vfp.fp_status); \ return 0; \ } \ tmp = float##fsz##_scalbn(x, shift, &env->vfp.fp_status); \ -- 1.7.1