From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:49103) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QGIae-0007jS-9e for qemu-devel@nongnu.org; Sat, 30 Apr 2011 18:24:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QGIad-0004h5-HJ for qemu-devel@nongnu.org; Sat, 30 Apr 2011 18:24:40 -0400 Received: from mail-pw0-f45.google.com ([209.85.160.45]:55698) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QGIad-0004gz-A5 for qemu-devel@nongnu.org; Sat, 30 Apr 2011 18:24:39 -0400 Received: by pwi6 with SMTP id 6so2851739pwi.4 for ; Sat, 30 Apr 2011 15:24:38 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sat, 30 Apr 2011 15:24:23 -0700 Message-Id: <1304202271-24730-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 0/8] cpu interrupt cleanup List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl , Aurelien Jarno Blue Swirl pointed out that CPU_INTERRUPT_TIMER was unused, and should therefore be remove. This is a logical extension of that, making all target specific cpu interrupts really be private to the target. This will allow new ports to define external cpu interrupts as needed without having to modify generic code. r~ Richard Henderson (8): irq: Introduce CPU_INTERRUPT_TGT_* defines. irq: Introduce and use CPU_INTERRUPT_SSTEP_MASK. target-mips: Do not check CPU_INTERRUPT_TIMER. target-sparc: Do not check CPU_INTERRUPT_TIMER. irq: Remove CPU_INTERRUPT_TIMER. target-arm: Privatize CPU_INTERRUPT_FIQ. target-i386: Privatize some i386-specific interrupt names. irq: Privatize CPU_INTERRUPT_NMI. cpu-all.h | 60 +++++++++++++++++++++++++++++++++++++--------- cpu-exec.c | 8 +----- poison.h | 13 ++++++---- target-arm/cpu.h | 4 +++ target-cris/cpu.h | 3 ++ target-i386/cpu.h | 9 +++++++ target-microblaze/cpu.h | 3 ++ target-mips/exec.h | 4 --- 8 files changed, 76 insertions(+), 28 deletions(-) -- 1.7.4.4