From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:49245) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QGIal-0007ts-2a for qemu-devel@nongnu.org; Sat, 30 Apr 2011 18:24:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QGIaj-0004jf-ND for qemu-devel@nongnu.org; Sat, 30 Apr 2011 18:24:47 -0400 Received: from mail-pw0-f45.google.com ([209.85.160.45]:55698) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QGIaj-0004gz-Dz for qemu-devel@nongnu.org; Sat, 30 Apr 2011 18:24:45 -0400 Received: by mail-pw0-f45.google.com with SMTP id 6so2851739pwi.4 for ; Sat, 30 Apr 2011 15:24:45 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sat, 30 Apr 2011 15:24:29 -0700 Message-Id: <1304202271-24730-7-git-send-email-rth@twiddle.net> In-Reply-To: <1304202271-24730-1-git-send-email-rth@twiddle.net> References: <1304202271-24730-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 6/8] target-arm: Privatize CPU_INTERRUPT_FIQ. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl , Aurelien Jarno This interrupt name was only used by the ARM port. Signed-off-by: Richard Henderson --- cpu-all.h | 1 - poison.h | 1 - target-arm/cpu.h | 4 ++++ 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/cpu-all.h b/cpu-all.h index 4dcd7bc..88c8361 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -828,7 +828,6 @@ extern CPUState *cpu_single_env; /* Temporary remapping from the generic names back to the previous cpu-specific names. These will be moved to target-foo/cpu.h next. */ -#define CPU_INTERRUPT_FIQ CPU_INTERRUPT_TGT_EXT_1 #define CPU_INTERRUPT_SMI CPU_INTERRUPT_TGT_EXT_2 #define CPU_INTERRUPT_VIRQ CPU_INTERRUPT_TGT_INT_0 #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 diff --git a/poison.h b/poison.h index 369d82d..787f8e9 100644 --- a/poison.h +++ b/poison.h @@ -39,7 +39,6 @@ #pragma GCC poison CPU_INTERRUPT_HARD #pragma GCC poison CPU_INTERRUPT_EXITTB -#pragma GCC poison CPU_INTERRUPT_FIQ #pragma GCC poison CPU_INTERRUPT_HALT #pragma GCC poison CPU_INTERRUPT_SMI #pragma GCC poison CPU_INTERRUPT_DEBUG diff --git a/target-arm/cpu.h b/target-arm/cpu.h index d5af644..060a42a 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -55,6 +55,10 @@ #define ARMV7M_EXCP_PENDSV 14 #define ARMV7M_EXCP_SYSTICK 15 +/* ARM-specific interrupt pending bits. */ +#define CPU_INTERRUPT_FIQ CPU_INTERRUPT_TGT_EXT_1 + + typedef void ARMWriteCPFunc(void *opaque, int cp_info, int srcreg, int operand, uint32_t value); typedef uint32_t ARMReadCPFunc(void *opaque, int cp_info, -- 1.7.4.4