From: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro>
To: mst@redhat.com
Cc: aliguori@us.ibm.com, david@gibson.dropbear.id.au,
kvm@vger.kernel.org, rth@twiddle.net, aik@ozlabs.ru,
joro@8bytes.org, seabios@seabios.org, qemu-devel@nongnu.org,
agraf@suse.de, blauwirbel@gmail.com, yamahata@valinux.co.jp,
kevin@koconnor.net, avi@redhat.com,
Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro>,
dwg@au1.ibm.com, paul@codesourcery.com
Subject: [Qemu-devel] [RFC PATCH 06/13] eepro100: use the DMA memory access interface
Date: Wed, 1 Jun 2011 04:38:28 +0300 [thread overview]
Message-ID: <1306892315-7306-7-git-send-email-eduard.munteanu@linux360.ro> (raw)
In-Reply-To: <1306892315-7306-1-git-send-email-eduard.munteanu@linux360.ro>
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro>
---
hw/eepro100.c | 95 ++++++++++++++++++++++++++++++--------------------------
1 files changed, 51 insertions(+), 44 deletions(-)
diff --git a/hw/eepro100.c b/hw/eepro100.c
index 05450e8..cd83da3 100644
--- a/hw/eepro100.c
+++ b/hw/eepro100.c
@@ -317,35 +317,39 @@ static const uint16_t eepro100_mdi_mask[] = {
};
/* Read a 16 bit little endian value from physical memory. */
-static uint16_t e100_ldw_le_phys(target_phys_addr_t addr)
+static uint16_t e100_ldw_le_phys(EEPRO100State *s, target_phys_addr_t addr)
{
/* Load 16 bit (little endian) word from emulated hardware. */
uint16_t val;
- cpu_physical_memory_read(addr, &val, sizeof(val));
+ pci_memory_read(&s->dev, addr, &val, sizeof(val));
return le16_to_cpu(val);
}
/* Read a 32 bit little endian value from physical memory. */
-static uint32_t e100_ldl_le_phys(target_phys_addr_t addr)
+static uint32_t e100_ldl_le_phys(EEPRO100State *s, target_phys_addr_t addr)
{
/* Load 32 bit (little endian) word from emulated hardware. */
uint32_t val;
- cpu_physical_memory_read(addr, &val, sizeof(val));
+ pci_memory_read(&s->dev, addr, &val, sizeof(val));
return le32_to_cpu(val);
}
/* Write a 16 bit little endian value to physical memory. */
-static void e100_stw_le_phys(target_phys_addr_t addr, uint16_t val)
+static void e100_stw_le_phys(EEPRO100State *s,
+ target_phys_addr_t addr,
+ uint16_t val)
{
val = cpu_to_le16(val);
- cpu_physical_memory_write(addr, &val, sizeof(val));
+ pci_memory_write(&s->dev, addr, &val, sizeof(val));
}
/* Write a 32 bit little endian value to physical memory. */
-static void e100_stl_le_phys(target_phys_addr_t addr, uint32_t val)
+static void e100_stl_le_phys(EEPRO100State *s,
+ target_phys_addr_t addr,
+ uint32_t val)
{
val = cpu_to_le32(val);
- cpu_physical_memory_write(addr, &val, sizeof(val));
+ pci_memory_write(&s->dev, addr, &val, sizeof(val));
}
#define POLYNOMIAL 0x04c11db6
@@ -757,11 +761,11 @@ static void dump_statistics(EEPRO100State * s)
* values which really matter.
* Number of data should check configuration!!!
*/
- cpu_physical_memory_write(s->statsaddr, &s->statistics, s->stats_size);
- e100_stl_le_phys(s->statsaddr + 0, s->statistics.tx_good_frames);
- e100_stl_le_phys(s->statsaddr + 36, s->statistics.rx_good_frames);
- e100_stl_le_phys(s->statsaddr + 48, s->statistics.rx_resource_errors);
- e100_stl_le_phys(s->statsaddr + 60, s->statistics.rx_short_frame_errors);
+ pci_memory_write(&s->dev, s->statsaddr, &s->statistics, s->stats_size);
+ e100_stl_le_phys(s, s->statsaddr + 0, s->statistics.tx_good_frames);
+ e100_stl_le_phys(s, s->statsaddr + 36, s->statistics.rx_good_frames);
+ e100_stl_le_phys(s, s->statsaddr + 48, s->statistics.rx_resource_errors);
+ e100_stl_le_phys(s, s->statsaddr + 60, s->statistics.rx_short_frame_errors);
#if 0
e100_stw_le_phys(s->statsaddr + 76, s->statistics.xmt_tco_frames);
e100_stw_le_phys(s->statsaddr + 78, s->statistics.rcv_tco_frames);
@@ -771,7 +775,7 @@ static void dump_statistics(EEPRO100State * s)
static void read_cb(EEPRO100State *s)
{
- cpu_physical_memory_read(s->cb_address, &s->tx, sizeof(s->tx));
+ pci_memory_read(&s->dev, s->cb_address, &s->tx, sizeof(s->tx));
s->tx.status = le16_to_cpu(s->tx.status);
s->tx.command = le16_to_cpu(s->tx.command);
s->tx.link = le32_to_cpu(s->tx.link);
@@ -801,18 +805,18 @@ static void tx_command(EEPRO100State *s)
}
assert(tcb_bytes <= sizeof(buf));
while (size < tcb_bytes) {
- uint32_t tx_buffer_address = e100_ldl_le_phys(tbd_address);
- uint16_t tx_buffer_size = e100_ldw_le_phys(tbd_address + 4);
+ uint32_t tx_buffer_address = e100_ldl_le_phys(s, tbd_address);
+ uint16_t tx_buffer_size = e100_ldw_le_phys(s, tbd_address + 4);
#if 0
- uint16_t tx_buffer_el = e100_ldw_le_phys(tbd_address + 6);
+ uint16_t tx_buffer_el = e100_ldw_le_phys(s, tbd_address + 6);
#endif
tbd_address += 8;
TRACE(RXTX, logout
("TBD (simplified mode): buffer address 0x%08x, size 0x%04x\n",
tx_buffer_address, tx_buffer_size));
tx_buffer_size = MIN(tx_buffer_size, sizeof(buf) - size);
- cpu_physical_memory_read(tx_buffer_address, &buf[size],
- tx_buffer_size);
+ pci_memory_read(&s->dev,
+ tx_buffer_address, &buf[size], tx_buffer_size);
size += tx_buffer_size;
}
if (tbd_array == 0xffffffff) {
@@ -823,16 +827,16 @@ static void tx_command(EEPRO100State *s)
if (s->has_extended_tcb_support && !(s->configuration[6] & BIT(4))) {
/* Extended Flexible TCB. */
for (; tbd_count < 2; tbd_count++) {
- uint32_t tx_buffer_address = e100_ldl_le_phys(tbd_address);
- uint16_t tx_buffer_size = e100_ldw_le_phys(tbd_address + 4);
- uint16_t tx_buffer_el = e100_ldw_le_phys(tbd_address + 6);
+ uint32_t tx_buffer_address = e100_ldl_le_phys(s, tbd_address);
+ uint16_t tx_buffer_size = e100_ldw_le_phys(s, tbd_address + 4);
+ uint16_t tx_buffer_el = e100_ldw_le_phys(s, tbd_address + 6);
tbd_address += 8;
TRACE(RXTX, logout
("TBD (extended flexible mode): buffer address 0x%08x, size 0x%04x\n",
tx_buffer_address, tx_buffer_size));
tx_buffer_size = MIN(tx_buffer_size, sizeof(buf) - size);
- cpu_physical_memory_read(tx_buffer_address, &buf[size],
- tx_buffer_size);
+ pci_memory_read(&s->dev,
+ tx_buffer_address, &buf[size], tx_buffer_size);
size += tx_buffer_size;
if (tx_buffer_el & 1) {
break;
@@ -841,16 +845,16 @@ static void tx_command(EEPRO100State *s)
}
tbd_address = tbd_array;
for (; tbd_count < s->tx.tbd_count; tbd_count++) {
- uint32_t tx_buffer_address = e100_ldl_le_phys(tbd_address);
- uint16_t tx_buffer_size = e100_ldw_le_phys(tbd_address + 4);
- uint16_t tx_buffer_el = e100_ldw_le_phys(tbd_address + 6);
+ uint32_t tx_buffer_address = e100_ldl_le_phys(s, tbd_address);
+ uint16_t tx_buffer_size = e100_ldw_le_phys(s, tbd_address + 4);
+ uint16_t tx_buffer_el = e100_ldw_le_phys(s, tbd_address + 6);
tbd_address += 8;
TRACE(RXTX, logout
("TBD (flexible mode): buffer address 0x%08x, size 0x%04x\n",
tx_buffer_address, tx_buffer_size));
tx_buffer_size = MIN(tx_buffer_size, sizeof(buf) - size);
- cpu_physical_memory_read(tx_buffer_address, &buf[size],
- tx_buffer_size);
+ pci_memory_read(&s->dev,
+ tx_buffer_address, &buf[size], tx_buffer_size);
size += tx_buffer_size;
if (tx_buffer_el & 1) {
break;
@@ -875,7 +879,7 @@ static void set_multicast_list(EEPRO100State *s)
TRACE(OTHER, logout("multicast list, multicast count = %u\n", multicast_count));
for (i = 0; i < multicast_count; i += 6) {
uint8_t multicast_addr[6];
- cpu_physical_memory_read(s->cb_address + 10 + i, multicast_addr, 6);
+ pci_memory_read(&s->dev, s->cb_address + 10 + i, multicast_addr, 6);
TRACE(OTHER, logout("multicast entry %s\n", nic_dump(multicast_addr, 6)));
unsigned mcast_idx = compute_mcast_idx(multicast_addr);
assert(mcast_idx < 64);
@@ -909,12 +913,14 @@ static void action_command(EEPRO100State *s)
/* Do nothing. */
break;
case CmdIASetup:
- cpu_physical_memory_read(s->cb_address + 8, &s->conf.macaddr.a[0], 6);
+ pci_memory_read(&s->dev,
+ s->cb_address + 8, &s->conf.macaddr.a[0], 6);
TRACE(OTHER, logout("macaddr: %s\n", nic_dump(&s->conf.macaddr.a[0], 6)));
break;
case CmdConfigure:
- cpu_physical_memory_read(s->cb_address + 8, &s->configuration[0],
- sizeof(s->configuration));
+ pci_memory_read(&s->dev,
+ s->cb_address + 8,
+ &s->configuration[0], sizeof(s->configuration));
TRACE(OTHER, logout("configuration: %s\n",
nic_dump(&s->configuration[0], 16)));
TRACE(OTHER, logout("configuration: %s\n",
@@ -951,7 +957,8 @@ static void action_command(EEPRO100State *s)
break;
}
/* Write new status. */
- e100_stw_le_phys(s->cb_address, s->tx.status | ok_status | STATUS_C);
+ e100_stw_le_phys(s, s->cb_address,
+ s->tx.status | ok_status | STATUS_C);
if (bit_i) {
/* CU completed action. */
eepro100_cx_interrupt(s);
@@ -1018,7 +1025,7 @@ static void eepro100_cu_command(EEPRO100State * s, uint8_t val)
/* Dump statistical counters. */
TRACE(OTHER, logout("val=0x%02x (dump stats)\n", val));
dump_statistics(s);
- e100_stl_le_phys(s->statsaddr + s->stats_size, 0xa005);
+ e100_stl_le_phys(s, s->statsaddr + s->stats_size, 0xa005);
break;
case CU_CMD_BASE:
/* Load CU base. */
@@ -1029,7 +1036,7 @@ static void eepro100_cu_command(EEPRO100State * s, uint8_t val)
/* Dump and reset statistical counters. */
TRACE(OTHER, logout("val=0x%02x (dump stats and reset)\n", val));
dump_statistics(s);
- e100_stl_le_phys(s->statsaddr + s->stats_size, 0xa007);
+ e100_stl_le_phys(s, s->statsaddr + s->stats_size, 0xa007);
memset(&s->statistics, 0, sizeof(s->statistics));
break;
case CU_SRESUME:
@@ -1323,10 +1330,10 @@ static void eepro100_write_port(EEPRO100State *s)
case PORT_SELFTEST:
TRACE(OTHER, logout("selftest address=0x%08x\n", address));
eepro100_selftest_t data;
- cpu_physical_memory_read(address, &data, sizeof(data));
+ pci_memory_read(&s->dev, address, &data, sizeof(data));
data.st_sign = 0xffffffff;
data.st_result = 0;
- cpu_physical_memory_write(address, &data, sizeof(data));
+ pci_memory_write(&s->dev, address, &data, sizeof(data));
break;
case PORT_SELECTIVE_RESET:
TRACE(OTHER, logout("selective reset, selftest address=0x%08x\n", address));
@@ -1853,8 +1860,8 @@ static ssize_t nic_receive(VLANClientState *nc, const uint8_t * buf, size_t size
}
/* !!! */
eepro100_rx_t rx;
- cpu_physical_memory_read(s->ru_base + s->ru_offset, &rx,
- sizeof(eepro100_rx_t));
+ pci_memory_read(&s->dev,
+ s->ru_base + s->ru_offset, &rx, sizeof(eepro100_rx_t));
uint16_t rfd_command = le16_to_cpu(rx.command);
uint16_t rfd_size = le16_to_cpu(rx.size);
@@ -1870,9 +1877,9 @@ static ssize_t nic_receive(VLANClientState *nc, const uint8_t * buf, size_t size
#endif
TRACE(OTHER, logout("command 0x%04x, link 0x%08x, addr 0x%08x, size %u\n",
rfd_command, rx.link, rx.rx_buf_addr, rfd_size));
- e100_stw_le_phys(s->ru_base + s->ru_offset +
+ e100_stw_le_phys(s, s->ru_base + s->ru_offset +
offsetof(eepro100_rx_t, status), rfd_status);
- e100_stw_le_phys(s->ru_base + s->ru_offset +
+ e100_stw_le_phys(s, s->ru_base + s->ru_offset +
offsetof(eepro100_rx_t, count), size);
/* Early receive interrupt not supported. */
#if 0
@@ -1887,8 +1894,8 @@ static ssize_t nic_receive(VLANClientState *nc, const uint8_t * buf, size_t size
#if 0
assert(!(s->configuration[17] & BIT(0)));
#endif
- cpu_physical_memory_write(s->ru_base + s->ru_offset +
- sizeof(eepro100_rx_t), buf, size);
+ pci_memory_write(&s->dev, s->ru_base + s->ru_offset +
+ sizeof(eepro100_rx_t), buf, size);
s->statistics.rx_good_frames++;
eepro100_fr_interrupt(s);
s->ru_offset = le32_to_cpu(rx.link);
--
1.7.3.4
next prev parent reply other threads:[~2011-06-01 1:39 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-01 1:38 [Qemu-devel] [RFC PATCH 00/13] AMD IOMMU emulation patches, another try Eduard - Gabriel Munteanu
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 01/13] Generic DMA memory access interface Eduard - Gabriel Munteanu
2011-06-01 14:01 ` Richard Henderson
2011-06-01 14:29 ` Avi Kivity
2011-06-01 15:16 ` Richard Henderson
2011-06-02 10:22 ` David Gibson
2011-06-01 14:52 ` Eduard - Gabriel Munteanu
2011-06-01 15:09 ` Richard Henderson
2011-06-01 15:35 ` Eduard - Gabriel Munteanu
2011-06-01 15:45 ` Richard Henderson
2011-06-02 9:38 ` David Gibson
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 02/13] pci: add IOMMU support via the generic DMA layer Eduard - Gabriel Munteanu
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 03/13] AMD IOMMU emulation Eduard - Gabriel Munteanu
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 04/13] ide: use the DMA memory access interface for PCI IDE controllers Eduard - Gabriel Munteanu
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 05/13] rtl8139: use the DMA memory access interface Eduard - Gabriel Munteanu
2011-06-01 1:38 ` Eduard - Gabriel Munteanu [this message]
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 07/13] ac97: " Eduard - Gabriel Munteanu
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 08/13] es1370: " Eduard - Gabriel Munteanu
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 09/13] e1000: " Eduard - Gabriel Munteanu
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 10/13] lsi53c895a: " Eduard - Gabriel Munteanu
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 11/13] pcnet: " Eduard - Gabriel Munteanu
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 12/13] usb-uhci: " Eduard - Gabriel Munteanu
2011-06-01 1:38 ` [Qemu-devel] [RFC PATCH 13/13] usb-ohci: " Eduard - Gabriel Munteanu
2011-06-01 18:49 ` [Qemu-devel] [RFC PATCH 00/13] AMD IOMMU emulation patches, another try Richard Henderson
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