From: David Gibson <david@gibson.dropbear.id.au>
To: qemu-devel@nongnu.org, eduard.munteanu@linux360.ro, rth@twiddle.net
Subject: [Qemu-devel] [PATCH 12/14] usb-uhci: use the DMA memory access interface
Date: Fri, 3 Jun 2011 01:12:40 +1000 [thread overview]
Message-ID: <1307027562-3460-13-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1307027562-3460-1-git-send-email-david@gibson.dropbear.id.au>
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro>
---
hw/usb-uhci.c | 26 ++++++++++++++------------
1 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index c0de05b..bf43a0f 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -683,7 +683,7 @@ static int uhci_complete_td(UHCIState *s, UHCI_TD *td, UHCIAsync *async, uint32_
if (len > 0) {
/* write the data back */
- cpu_physical_memory_write(td->buffer, async->buffer, len);
+ dma_memory_write(&s->dev.qdev, td->buffer, async->buffer, len);
}
if ((td->ctrl & TD_CTRL_SPD) && len < max_len) {
@@ -803,7 +803,7 @@ static int uhci_handle_td(UHCIState *s, uint32_t addr, UHCI_TD *td, uint32_t *in
switch(pid) {
case USB_TOKEN_OUT:
case USB_TOKEN_SETUP:
- cpu_physical_memory_read(td->buffer, async->buffer, max_len);
+ dma_memory_read(&s->dev.qdev, td->buffer, async->buffer, max_len);
len = uhci_broadcast_packet(s, &async->packet);
if (len >= 0)
len = max_len;
@@ -846,7 +846,7 @@ static void uhci_async_complete(USBDevice *dev, USBPacket *packet)
uint32_t link = async->td;
uint32_t int_mask = 0, val;
- cpu_physical_memory_read(link & ~0xf, (uint8_t *) &td, sizeof(td));
+ dma_memory_read(&s->dev.qdev, link & ~0xf, (uint8_t *) &td, sizeof(td));
le32_to_cpus(&td.link);
le32_to_cpus(&td.ctrl);
le32_to_cpus(&td.token);
@@ -858,8 +858,8 @@ static void uhci_async_complete(USBDevice *dev, USBPacket *packet)
/* update the status bits of the TD */
val = cpu_to_le32(td.ctrl);
- cpu_physical_memory_write((link & ~0xf) + 4,
- (const uint8_t *)&val, sizeof(val));
+ dma_memory_write(&s->dev.qdev, (link & ~0xf) + 4,
+ (const uint8_t *)&val, sizeof(val));
uhci_async_free(s, async);
} else {
async->done = 1;
@@ -922,7 +922,7 @@ static void uhci_process_frame(UHCIState *s)
DPRINTF("uhci: processing frame %d addr 0x%x\n" , s->frnum, frame_addr);
- cpu_physical_memory_read(frame_addr, (uint8_t *)&link, 4);
+ dma_memory_read(&s->dev.qdev, frame_addr, (uint8_t *)&link, 4);
le32_to_cpus(&link);
int_mask = 0;
@@ -946,7 +946,8 @@ static void uhci_process_frame(UHCIState *s)
break;
}
- cpu_physical_memory_read(link & ~0xf, (uint8_t *) &qh, sizeof(qh));
+ dma_memory_read(&s->dev.qdev,
+ link & ~0xf, (uint8_t *) &qh, sizeof(qh));
le32_to_cpus(&qh.link);
le32_to_cpus(&qh.el_link);
@@ -966,7 +967,8 @@ static void uhci_process_frame(UHCIState *s)
}
/* TD */
- cpu_physical_memory_read(link & ~0xf, (uint8_t *) &td, sizeof(td));
+ dma_memory_read(&s->dev.qdev,
+ link & ~0xf, (uint8_t *) &td, sizeof(td));
le32_to_cpus(&td.link);
le32_to_cpus(&td.ctrl);
le32_to_cpus(&td.token);
@@ -980,8 +982,8 @@ static void uhci_process_frame(UHCIState *s)
if (old_td_ctrl != td.ctrl) {
/* update the status bits of the TD */
val = cpu_to_le32(td.ctrl);
- cpu_physical_memory_write((link & ~0xf) + 4,
- (const uint8_t *)&val, sizeof(val));
+ dma_memory_write(&s->dev.qdev, (link & ~0xf) + 4,
+ (const uint8_t *)&val, sizeof(val));
}
if (ret < 0) {
@@ -1009,8 +1011,8 @@ static void uhci_process_frame(UHCIState *s)
/* update QH element link */
qh.el_link = link;
val = cpu_to_le32(qh.el_link);
- cpu_physical_memory_write((curr_qh & ~0xf) + 4,
- (const uint8_t *)&val, sizeof(val));
+ dma_memory_write(&s->dev.qdev, (curr_qh & ~0xf) + 4,
+ (const uint8_t *)&val, sizeof(val));
if (!depth_first(link)) {
/* done with this QH */
--
1.7.4.4
next prev parent reply other threads:[~2011-06-02 15:13 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-02 15:12 [Qemu-devel] Yet another take on a generic dma/iommu layer David Gibson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 01/14] Generic DMA memory access interface David Gibson
2011-06-02 16:43 ` Richard Henderson
2011-06-02 17:35 ` Eduard - Gabriel Munteanu
2011-06-02 19:28 ` Richard Henderson
2011-06-02 19:59 ` Eduard - Gabriel Munteanu
2011-06-02 15:12 ` [Qemu-devel] [PATCH 02/14] pci: add IOMMU support via the generic DMA layer David Gibson
2011-06-02 16:49 ` Richard Henderson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 03/14] AMD IOMMU emulation David Gibson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 04/14] ide: use the DMA memory access interface for PCI IDE controllers David Gibson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 05/14] rtl8139: use the DMA memory access interface David Gibson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 06/14] eepro100: " David Gibson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 07/14] ac97: " David Gibson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 08/14] es1370: " David Gibson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 09/14] e1000: " David Gibson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 10/14] lsi53c895a: " David Gibson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 11/14] pcnet: " David Gibson
2011-06-02 15:12 ` David Gibson [this message]
2011-06-02 15:12 ` [Qemu-devel] [PATCH 13/14] usb-ohci: " David Gibson
2011-06-02 15:12 ` [Qemu-devel] [PATCH 14/14] Make spapr tces use generic dma layer David Gibson
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