From: Eduardo Habkost <ehabkost@redhat.com>
To: Anthony Liguori <anthony@codemonkey.ws>
Cc: qemu-devel@nongnu.org
Subject: [Qemu-devel] [RHEL6 qemu-kvm PATCH 09/11] cpu defs: add pse36, mca, mtrr to AMD CPU definitions
Date: Thu, 2 Jun 2011 16:13:08 -0300 [thread overview]
Message-ID: <1307041990-26194-10-git-send-email-ehabkost@redhat.com> (raw)
In-Reply-To: <1307041990-26194-1-git-send-email-ehabkost@redhat.com>
This patch adds some missing flags to extfeature_edx, that were missing
according to AMD's latest CPUID document.
This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>.
Original John's patch description was:
cpu model bug fixes and definition corrections
This patch was intended to address the replicated feature
flags in cpuid 8000_0001:edx from cpuid 0000_0001:edx.
This is due to AMD's definition where these flags are
mostly cloned in the 8000_0001:edx cpuid function.
qemu64 attempted to glue together the respective Intel
and AMD nearly disjoint features and this propagated to
the new Intel models as doing so was believed conservative
at the time. However after further soak and test lugging
around this cruft doesn't provide any value, could
conceivably confuse a guest, and has confused users trying
to maintain/add cpu definitions. This also caused issues
for libvirt attempting to track this mis-encoding.
So we've here tossed out the AMD replicated definitions
from the Intel models, added a few replications into AMD
definitions which were missing according to AMD's latest
CPUID document, and reordered the config file flags to
follow intuitive sequential bit ordering. Also two flag
name aliases were added for clarity to Intel models. The
end result being the models definitions now conform to
their respective cpuid specifications sans x2apic which is
emulated by kvm.
This was tested with the following combinations:
[Conroe, Penryn, Nehalem] x [F12-64, win64, win32] -- Intel host
[Opteron_G1, Opteron_G2, Opteron_G3] x [F12-64, win64, win32] -- AMD host
Yielding successful boots in all cases.
Signed-off-by: john cooper <john.cooper@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
sysconfigs/target/target-x86_64.conf | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/sysconfigs/target/target-x86_64.conf b/sysconfigs/target/target-x86_64.conf
index d368b6c..3874ff1 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -51,7 +51,7 @@
stepping = "1"
feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
feature_ecx = "x2apic sse3" # x2apic kvm emulated
- extfeature_edx = "lm fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
+ extfeature_edx = "lm fxsr mmx nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de fpu"
extfeature_ecx = " "
xlevel = "0x80000008"
model_id = "AMD Opteron 240 (Gen 1 Class Opteron)"
@@ -65,7 +65,7 @@
stepping = "1"
feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
feature_ecx = "x2apic cx16 sse3" # x2apic kvm emulated
- extfeature_edx = "lm rdtscp fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
+ extfeature_edx = "lm rdtscp fxsr mmx nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de fpu"
extfeature_ecx = "svm lahf_lm"
xlevel = "0x80000008"
model_id = "AMD Opteron 22xx (Gen 2 Class Opteron)"
@@ -79,7 +79,7 @@
stepping = "1"
feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
feature_ecx = "popcnt x2apic cx16 monitor sse3" # x2apic kvm emulated
- extfeature_edx = "lm rdtscp fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
+ extfeature_edx = "lm rdtscp fxsr mmx nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de fpu"
extfeature_ecx = "misalignsse sse4a abm svm lahf_lm"
xlevel = "0x80000008"
model_id = "AMD Opteron 23xx (Gen 3 Class Opteron)"
--
1.7.3.2
next prev parent reply other threads:[~2011-06-02 19:13 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-02 19:12 [Qemu-devel] [RHEL6 qemu-kvm PATCH 00/11] cpu model bug fixes and definition corrections (v2) Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 01/11] correct archaic CPU model "model" field for Intel CPUs Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 02/11] Allow an optional qemu_early_init_vcpu() Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 03/11] Add kvm emulated x2apic flag to config defined cpu models (v2) Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 04/11] Support -readconfig "?" to debug config file loading Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 05/11] cpu defs: use Intel flag names for Intel models Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 06/11] cpu defs: remove replicated flags from Intel Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 07/11] cpu defs: uncomment empty extfeatures_ecx definition for Opteron_G1 Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 08/11] reorder cpuid feature bits on target-x86_64.conf Eduardo Habkost
2011-06-02 19:13 ` Eduardo Habkost [this message]
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 10/11] add Westmere as a qemu cpu model Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 11/11] add "default" pseudo CPU model name Eduardo Habkost
2011-06-02 19:34 ` [Qemu-devel] [PATCH 00/11] cpu model bug fixes and definition corrections (v2) Eduardo Habkost
2011-06-02 22:51 ` Jan Kiszka
2011-06-03 14:38 ` Eduardo Habkost
2011-06-03 14:51 ` Jan Kiszka
2011-06-09 6:43 ` Markus Armbruster
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