[Qemu-devel] [RHEL6 qemu-kvm PATCH 00/11] cpu model bug fixes and definition corrections (v2)

[Qemu-devel] [RHEL6 qemu-kvm PATCH 00/11] cpu model bug fixes and definition corrections (v2)

[Eduardo Habkost]

Hi,

This series is a revamp of the series John Cooper sent at
Message-ID: <4DDAD592.3020608@redhat.com> (http://marc.info/?l=qemu-devel&m=130618852625770).

The results of applying this series is, bit-by-bit exactly the same of applying
the previous series from John. All I did was to rewrite Subject lines and split
one large patch changing CPU flags into small steps, so the changes can be more
easily reviewed/discussed. The proof can be checked by looking at the
'cpudefs-v1-john' and 'cpudefs-v2-ehabkost' branches at
<git://github.com/ehabkost/qemu-hacks.git>.

Eduardo Habkost (5):
  cpu defs: use Intel flag names for Intel models
  cpu defs: remove replicated flags from Intel
  cpu defs: uncomment empty extfeatures_ecx definition for Opteron_G1
  reorder cpuid feature bits on target-x86_64.conf
  cpu defs: add pse36, mca, mtrr to AMD CPU definitions

john cooper (6):
  correct archaic CPU model "model" field for Intel CPUs.
  Allow an optional qemu_early_init_vcpu()
  Add kvm emulated x2apic flag to config defined cpu models (v2)
  Support -readconfig "?" to debug config file loading
  add Westmere as a qemu cpu model
  add "default" pseudo CPU model name

 cpus.c                               |    8 ++++
 hw/pc.c                              |   41 +++++++++++++++++++---
 kvm-all.c                            |   36 +++++++++++++++----
 kvm.h                                |    1 +
 qemu-common.h                        |    2 +
 qemu-config.c                        |   30 ++++++++++------
 qemu-config.h                        |    2 +-
 sysconfigs/target/target-x86_64.conf |   58 +++++++++++++++++++-----------
 target-i386/cpuid.c                  |   65 ++++++++++++++++++++++++----------
 target-i386/helper.c                 |    2 +
 vl.c                                 |   20 +++++++----
 11 files changed, 193 insertions(+), 72 deletions(-)

-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 01/11] correct archaic CPU model "model" field for Intel CPUs.

[Eduardo Habkost]

From: john cooper <john.cooper@redhat.com>

The old "model" values caused two known problems:

    - Skype crashes on a winxp guest if model < 6, due to syscall vs.
      sysenter confusion.

    - 32 bit windows doesn't enable MSI support if model < 13.

After consulting with Intel the following recommendations were
received which more accurately represent shipped silicon.

[ehabkost: made Subject line shorter]

Signed-off-by: john cooper <john.cooper@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 sysconfigs/target/target-x86_64.conf |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/sysconfigs/target/target-x86_64.conf b/sysconfigs/target/target-x86_64.conf
index 43ad282..0613870 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -5,7 +5,7 @@
    level = "2"
    vendor = "GenuineIntel"
    family = "6"
-   model = "2"
+   model = "15"
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 ssse3"
@@ -19,7 +19,7 @@
    level = "2"
    vendor = "GenuineIntel"
    family = "6"
-   model = "2"
+   model = "23"
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 cx16 ssse3 sse4.1"
@@ -33,7 +33,7 @@
    level = "2"
    vendor = "GenuineIntel"
    family = "6"
-   model = "2"
+   model = "26"
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 cx16 ssse3 sse4.1 sse4.2 popcnt"
-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 02/11] Allow an optional qemu_early_init_vcpu()

[Eduardo Habkost]

From: john cooper <john.cooper@redhat.com>

Allow an optional qemu_early_init_vcpu() such that
kvm_arch_get_supported_cpuid() can be used from
cpu_x86_register().  Without this minimal setup
kvm_arch_get_supported_cpuid() gags kvm_ioctl() via
passing a NULL initialized KVMState *.

[ehabkost: made Subject line shorter]

Signed-off-by: john cooper <john.cooper@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 cpus.c               |    8 ++++++++
 kvm-all.c            |   36 +++++++++++++++++++++++++++++-------
 kvm.h                |    1 +
 qemu-common.h        |    2 ++
 target-i386/helper.c |    1 +
 5 files changed, 41 insertions(+), 7 deletions(-)

diff --git a/cpus.c b/cpus.c
index 1fc34b7..25122db 100644
--- a/cpus.c
+++ b/cpus.c
@@ -544,6 +544,14 @@ void qemu_main_loop_start(void)
 {
 }
 
+void qemu_early_init_vcpu(void *_env)
+{
+    CPUState *env = _env;
+
+    if (kvm_enabled())
+        kvm_early_init_vcpu(env);
+}
+
 void qemu_init_vcpu(void *_env)
 {
     CPUState *env = _env;
diff --git a/kvm-all.c b/kvm-all.c
index 106eb3a..dc846aa 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -195,24 +195,46 @@ int kvm_pit_in_kernel(void)
     return kvm_state->pit_in_kernel;
 }
 
-int kvm_init_vcpu(CPUState *env)
+/* env->kvm_state is needed early by kvm_check_extension()
+ * break it out so it may be setup early where needed
+ */
+int kvm_early_init_vcpu(CPUState *env)
+
 {
     KVMState *s = kvm_state;
-    long mmap_size;
     int ret;
 
-    DPRINTF("kvm_init_vcpu\n");
+    DPRINTF("kvm_early_init_vcpu\n");
+
+    if (env->kvm_state) {      /* already setup */
+        return 0;
+    }
 
     ret = kvm_vm_ioctl(s, KVM_CREATE_VCPU, env->cpu_index);
     if (ret < 0) {
         DPRINTF("kvm_create_vcpu failed\n");
-        goto err;
+    } else {
+        env->kvm_fd = ret;
+        env->kvm_state = s;
+        env->kvm_vcpu_dirty = 1;
     }
+    return ret;
+}
+
+int kvm_init_vcpu(CPUState *env)
+{
+    KVMState *s;
+    long mmap_size;
+    int ret;
+
+    DPRINTF("kvm_init_vcpu\n");
 
-    env->kvm_fd = ret;
-    env->kvm_state = s;
-    env->kvm_vcpu_dirty = 1;
+    ret = kvm_early_init_vcpu(env);
+    if (ret < 0) {
+        goto err;
+    }
 
+    s = env->kvm_state;
     mmap_size = kvm_ioctl(s, KVM_GET_VCPU_MMAP_SIZE, 0);
     if (mmap_size < 0) {
         ret = mmap_size;
diff --git a/kvm.h b/kvm.h
index d565dba..fe0631b 100644
--- a/kvm.h
+++ b/kvm.h
@@ -53,6 +53,7 @@ int kvm_has_xcrs(void);
 int kvm_has_many_ioeventfds(void);
 
 #ifdef NEED_CPU_H
+int kvm_early_init_vcpu(CPUState *env);
 int kvm_init_vcpu(CPUState *env);
 
 int kvm_cpu_exec(CPUState *env);
diff --git a/qemu-common.h b/qemu-common.h
index b851b20..2bea318 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -313,8 +313,10 @@ struct qemu_work_item {
 };
 
 #ifdef CONFIG_USER_ONLY
+#define qemu_early_init_vcpu(env) do { } while (0)
 #define qemu_init_vcpu(env) do { } while (0)
 #else
+void qemu_early_init_vcpu(void *env);
 void qemu_init_vcpu(void *env);
 #endif
 
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 89df997..73f44e8 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1261,6 +1261,7 @@ CPUX86State *cpu_x86_init(const char *cpu_model)
             cpu_set_debug_excp_handler(breakpoint_handler);
 #endif
     }
+    qemu_early_init_vcpu(env);
     if (cpu_x86_register(env, cpu_model) < 0) {
         cpu_x86_close(env);
         return NULL;
-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 03/11] Add kvm emulated x2apic flag to config defined cpu models (v2)

[Eduardo Habkost]

From: john cooper <john.cooper@redhat.com>

Add kvm emulated x2apic flag to config defined cpu models
and general support for such hypervisor emulated flags.

In addition to checking user request flags against the host
we also selectively check against kvm for emulated flags.

[ehabkost: made Subject line shorter]
[ehabkost: v2: cosmetic: add "x2apic kvm emulated" comments to conf file]

Signed-off-by: john cooper <john.cooper@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 hw/pc.c                              |    2 +-
 sysconfigs/target/target-x86_64.conf |   12 +++---
 target-i386/cpuid.c                  |   61 ++++++++++++++++++++++++---------
 3 files changed, 51 insertions(+), 24 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 8106197..5b94e53 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -927,7 +927,7 @@ static CPUState *pc_new_cpu(const char *cpu_model)
 
     env = cpu_init(cpu_model);
     if (!env) {
-        fprintf(stderr, "Unable to find x86 CPU definition\n");
+        fprintf(stderr, "Unable to support requested x86 CPU definition\n");
         exit(1);
     }
     if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
diff --git a/sysconfigs/target/target-x86_64.conf b/sysconfigs/target/target-x86_64.conf
index 0613870..a0df33c 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -8,7 +8,7 @@
    model = "15"
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 ssse3"
+   feature_ecx = "sse3 ssse3 x2apic"
    extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
@@ -22,7 +22,7 @@
    model = "23"
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 cx16 ssse3 sse4.1"
+   feature_ecx = "sse3 cx16 ssse3 sse4.1 x2apic"
    extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
@@ -36,7 +36,7 @@
    model = "26"
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 cx16 ssse3 sse4.1 sse4.2 popcnt"
+   feature_ecx = "sse3 cx16 ssse3 sse4.1 sse4.2 popcnt x2apic"
    extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
@@ -50,7 +50,7 @@
    model = "6"
    stepping = "1"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3"
+   feature_ecx = "sse3 x2apic"	# x2apic kvm emulated
    extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx"
 #   extfeature_ecx = ""
    xlevel = "0x80000008"
@@ -64,7 +64,7 @@
    model = "6"
    stepping = "1"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 cx16"
+   feature_ecx = "sse3 cx16 x2apic"	# x2apic kvm emulated
    extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx rdtscp"
    extfeature_ecx = "svm lahf_lm"
    xlevel = "0x80000008"
@@ -78,7 +78,7 @@
    model = "6"
    stepping = "1"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 cx16 monitor popcnt"
+   feature_ecx = "sse3 cx16 monitor popcnt x2apic"	# x2apic kvm emulated
    extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx rdtscp"
    extfeature_ecx = "svm sse4a  abm misalignsse lahf_lm"
    xlevel = "0x80000008"
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index e479a4d..c151f12 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -549,15 +549,40 @@ static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
     return 0;
 }
 
-/* best effort attempt to inform user requested cpu flags aren't making
- * their way to the guest.  Note: ft[].check_feat ideally should be
- * specified via a guest_def field to suppress report of extraneous flags.
+/* determine the effective set of cpuid features visible to a guest.
+ * in the case kvm is enabled, we also selectively include features
+ * emulated by the hypervisor
  */
-static int check_features_against_host(x86_def_t *guest_def)
+static void summary_cpuid_features(CPUX86State *env, x86_def_t *hd)
+{
+    struct {
+        uint32_t *pfeat, cmd, reg, mask;
+        } fmap[] = {
+            {&hd->features, 0x00000001, R_EDX, 0},
+            {&hd->ext_features, 0x00000001, R_ECX, CPUID_EXT_X2APIC},
+            {&hd->ext2_features, 0x80000001, R_EDX, 0},
+            {&hd->ext3_features, 0x80000001, R_ECX, 0},
+            {NULL} }, *p;
+
+    cpu_x86_fill_host(hd);
+    if (kvm_enabled()) {
+        for (p = fmap; p->pfeat; ++p) {
+            if (p->mask) {
+                *p->pfeat |= p->mask &
+                    kvm_arch_get_supported_cpuid(env, p->cmd, 0, p->reg);
+            }
+        }
+    }
+}
+
+/* inform the user of any requested cpu features (both explicitly requested
+ * flags and implicit cpu model flags) not making their way to the guest
+ */
+static int check_features_against_host(CPUX86State *env, x86_def_t *guest_def)
 {
     x86_def_t host_def;
     uint32_t mask;
-    int rv, i;
+    int rv;
     struct model_features_t ft[] = {
         {&guest_def->features, &host_def.features,
             ~0, feature_name, 0x00000000},
@@ -566,16 +591,16 @@ static int check_features_against_host(x86_def_t *guest_def)
         {&guest_def->ext2_features, &host_def.ext2_features,
             ~PPRO_FEATURES, ext2_feature_name, 0x80000000},
         {&guest_def->ext3_features, &host_def.ext3_features,
-            ~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
+            ~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001},
+        {NULL} }, *p;
 
-    cpu_x86_fill_host(&host_def);
-    for (rv = 0, i = 0; i < ARRAY_SIZE(ft); ++i)
+    summary_cpuid_features(env, &host_def);
+    for (rv = 0, p = ft; p->guest_feat; ++p)
         for (mask = 1; mask; mask <<= 1)
-            if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
-                !(*ft[i].host_feat & mask)) {
-                    unavailable_host_feature(&ft[i], mask);
-                    rv = 1;
-                }
+            if (mask & p->check_feat & *p->guest_feat & ~*p->host_feat) {
+                unavailable_host_feature(p, mask);
+                rv = 1;
+            }
     return rv;
 }
 
@@ -602,6 +627,7 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
     if (kvm_enabled() && strcmp(name, "host") == 0) {
         cpu_x86_fill_host(x86_cpu_def);
     } else if (!def) {
+        fprintf(stderr, "Unknown cpu model: %s\n", name);
         goto error;
     } else {
         memcpy(x86_cpu_def, def, sizeof(*def));
@@ -715,10 +741,6 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
     x86_cpu_def->ext3_features &= ~minus_ext3_features;
     x86_cpu_def->kvm_features &= ~minus_kvm_features;
     x86_cpu_def->svm_features &= ~minus_svm_features;
-    if (check_cpuid) {
-        if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
-            goto error;
-    }
     free(s);
     return 0;
 
@@ -880,6 +902,11 @@ int cpu_x86_register (CPUX86State *env, const char *cpu_model)
             env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
         }
     }
+    if (check_cpuid) {
+        if (check_features_against_host(env, def) && enforce_cpuid) {
+            return -1;
+        }
+    }
     return 0;
 }
 
-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 04/11] Support -readconfig "?" to debug config file loading

[Eduardo Habkost]

From: john cooper <john.cooper@redhat.com>

Failure by qemu to open a default config file isn't cause to
error exit -- it just quietly continues on.   After puzzling
issues with otherwise opaque config file locations and
startup handling numerous times, some help from qemu seemed
justified.

In the case of a "?" pseudo filename arg to -readconfig,
verbose open of all config files will be enabled.  Normal
handling of config files is otherwise unaffected by this
option.

Note: other CLI flag schemes have been discussed at length
to accommodate this option.  However given the constraints
of the existing user interface, a solution which minimally
impacts the user is ultimately required.

[ehabkost: edited commit message to have better Subject line]

Signed-off-by: john cooper <john.cooper@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 qemu-config.c |   30 +++++++++++++++++++-----------
 qemu-config.h |    2 +-
 vl.c          |   20 +++++++++++++-------
 3 files changed, 33 insertions(+), 19 deletions(-)

diff --git a/qemu-config.c b/qemu-config.c
index 5d7ffa2..b39b8fe 100644
--- a/qemu-config.c
+++ b/qemu-config.c
@@ -666,21 +666,29 @@ out:
     return res;
 }
 
-int qemu_read_config_file(const char *filename)
+/* attempt to open and parse config file, report problems if vflag
+ */
+int qemu_read_config_file(const char *filename, int vflag)
 {
     FILE *f = fopen(filename, "r");
-    int ret;
+    int rv = 0;
+    const char *err;
 
     if (f == NULL) {
-        return -errno;
+        rv = -errno;
+        err = "open";
+    } else if (qemu_config_parse(f, vm_config_groups, filename) != 0) {
+        rv = -EINVAL;
+        err = "parse";
+    } else if (vflag) {
+        fprintf(stderr, "parsed config file %s\n", filename);
     }
-
-    ret = qemu_config_parse(f, vm_config_groups, filename);
-    fclose(f);
-
-    if (ret == 0) {
-        return 0;
-    } else {
-        return -EINVAL;
+    if (f) {
+        fclose(f);
+    }
+    if (rv && vflag) {
+        fprintf(stderr, "can't %s config file %s: %s\n",
+                err, filename, strerror(-rv));
     }
+    return rv;
 }
diff --git a/qemu-config.h b/qemu-config.h
index 20d707f..b90a7cc 100644
--- a/qemu-config.h
+++ b/qemu-config.h
@@ -14,6 +14,6 @@ void qemu_add_globals(void);
 void qemu_config_write(FILE *fp);
 int qemu_config_parse(FILE *fp, QemuOptsList **lists, const char *fname);
 
-int qemu_read_config_file(const char *filename);
+int qemu_read_config_file(const char *filename, int vflag);
 
 #endif /* QEMU_CONFIG_H */
diff --git a/vl.c b/vl.c
index b362871..65b0791 100644
--- a/vl.c
+++ b/vl.c
@@ -2059,6 +2059,7 @@ int main(int argc, char **argv, char **envp)
     int show_vnc_port = 0;
 #endif
     int defconfig = 1;
+    int defconfig_verbose = 0;
     const char *trace_file = NULL;
 
     atexit(qemu_run_exit_notifiers);
@@ -2108,6 +2109,12 @@ int main(int argc, char **argv, char **envp)
             case QEMU_OPTION_nodefconfig:
                 defconfig=0;
                 break;
+            case QEMU_OPTION_readconfig:
+                /* pseudo filename "?" enables verbose config file handling */
+                if (!strcmp(optarg, "?")) {
+                    defconfig_verbose = 1;
+                }
+                break;
             }
         }
     }
@@ -2115,12 +2122,13 @@ int main(int argc, char **argv, char **envp)
     if (defconfig) {
         int ret;
 
-        ret = qemu_read_config_file(CONFIG_QEMU_CONFDIR "/qemu.conf");
+        ret = qemu_read_config_file(CONFIG_QEMU_CONFDIR "/qemu.conf",
+                                    defconfig_verbose);
         if (ret < 0 && ret != -ENOENT) {
             exit(1);
         }
 
-        ret = qemu_read_config_file(arch_config_name);
+        ret = qemu_read_config_file(arch_config_name, defconfig_verbose);
         if (ret < 0 && ret != -ENOENT) {
             exit(1);
         }
@@ -2857,11 +2865,9 @@ int main(int argc, char **argv, char **envp)
 #endif
             case QEMU_OPTION_readconfig:
                 {
-                    int ret = qemu_read_config_file(optarg);
-                    if (ret < 0) {
-                        fprintf(stderr, "read config %s: %s\n", optarg,
-                            strerror(-ret));
-                        exit(1);
+                    if (strcmp(optarg, "?") &&
+                        qemu_read_config_file(optarg, defconfig_verbose) < 0) {
+                            exit(1);
                     }
                     break;
                 }
-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 05/11] cpu defs: use Intel flag names for Intel models

[Eduardo Habkost]

Use 'i64' instead of 'lm' and 'xd' instead of 'nx' on Intel models.

The flags have different names on Intel docs, so use those names for clarity.

This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 sysconfigs/target/target-x86_64.conf |    6 +++---
 target-i386/cpuid.c                  |    4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/sysconfigs/target/target-x86_64.conf b/sysconfigs/target/target-x86_64.conf
index a0df33c..fd4e421 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -9,7 +9,7 @@
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 ssse3 x2apic"
-   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx"
+   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    i64 syscall xd"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
    model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)"
@@ -23,7 +23,7 @@
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 cx16 ssse3 sse4.1 x2apic"
-   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx"
+   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    i64 syscall xd"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
    model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)"
@@ -37,7 +37,7 @@
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 cx16 ssse3 sse4.1 sse4.2 popcnt x2apic"
-   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx"
+   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    i64 syscall xd"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
    model_id = "Intel Core i7 9xx (Nehalem Class Core i7)"
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index c151f12..fc72f7b 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -57,9 +57,9 @@ static const char *ext2_feature_name[] = {
     "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
     "mtrr", "pge", "mca", "cmov",
     "pat", "pse36", NULL, NULL /* Linux mp */,
-    "nx" /* Intel xd */, NULL, "mmxext", "mmx",
+    "nx|xd", NULL, "mmxext", "mmx",
     "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp",
-    NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
+    NULL, "lm|i64", "3dnowext", "3dnow",
 };
 static const char *ext3_feature_name[] = {
     "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */,
-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 06/11] cpu defs: remove replicated flags from Intel

[Eduardo Habkost]

This patch removes the replicated feature flags from cpuid 8000_0001:edx
(extfeature_edx) from Intel models, as the duplicated feature flags are present
only on AMD CPUs. On Intel models, only the i64, syscall, and xd flags are kept
on extfeature_edx.

This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>.

Original John's patch description was:

    cpu model bug fixes and definition corrections

    This patch was intended to address the replicated feature
    flags in cpuid 8000_0001:edx from cpuid 0000_0001:edx.
    This is due to AMD's definition where these flags are
    mostly cloned in the 8000_0001:edx cpuid function.
    qemu64 attempted to glue together the respective Intel
    and AMD nearly disjoint features and this propagated to
    the new Intel models as doing so was believed conservative
    at the time.  However after further soak and test lugging
    around this cruft doesn't provide any value, could
    conceivably confuse a guest, and has confused users trying
    to maintain/add cpu definitions.  This also caused issues
    for libvirt attempting to track this mis-encoding.

    So we've here tossed out the AMD replicated definitions
    from the Intel models, added a few replications into AMD
    definitions which were missing according to AMD's latest
    CPUID document, and reordered the config file flags to
    follow intuitive sequential bit ordering.  Also two flag
    name aliases were added for clarity to Intel models.  The
    end result being the models definitions now conform to
    their respective cpuid specifications sans x2apic which is
    emulated by kvm.

    This was tested with the following combinations:

        [Conroe, Penryn, Nehalem] x [F12-64, win64, win32] -- Intel host
        [Opteron_G1, Opteron_G2, Opteron_G3] x [F12-64, win64, win32] -- AMD host

    Yielding successful boots in all cases.

    Signed-off-by: john cooper <john.cooper@redhat.com>

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 sysconfigs/target/target-x86_64.conf |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/sysconfigs/target/target-x86_64.conf b/sysconfigs/target/target-x86_64.conf
index fd4e421..09b30a4 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -9,7 +9,7 @@
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 ssse3 x2apic"
-   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    i64 syscall xd"
+   extfeature_edx = "i64 syscall xd"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
    model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)"
@@ -23,7 +23,7 @@
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 cx16 ssse3 sse4.1 x2apic"
-   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    i64 syscall xd"
+   extfeature_edx = "i64 syscall xd"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
    model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)"
@@ -37,7 +37,7 @@
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 cx16 ssse3 sse4.1 sse4.2 popcnt x2apic"
-   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    i64 syscall xd"
+   extfeature_edx = "i64 syscall xd"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
    model_id = "Intel Core i7 9xx (Nehalem Class Core i7)"
-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 07/11] cpu defs: uncomment empty extfeatures_ecx definition for Opteron_G1

[Eduardo Habkost]

This should have no visible effect, but it should just clean up the
config file a bit.

This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 sysconfigs/target/target-x86_64.conf |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/sysconfigs/target/target-x86_64.conf b/sysconfigs/target/target-x86_64.conf
index 09b30a4..ea310bb 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -52,7 +52,7 @@
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 x2apic"	# x2apic kvm emulated
    extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx"
-#   extfeature_ecx = ""
+   extfeature_ecx = " "
    xlevel = "0x80000008"
    model_id = "AMD Opteron 240 (Gen 1 Class Opteron)"
 
-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 08/11] reorder cpuid feature bits on target-x86_64.conf

[Eduardo Habkost]

This makes the flag order match the bit order in the CPU. This patch just
changes the ordering on the config file, and should have no visible effect.

This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>.

To make sure the flag sets are really not changed by this patch, I have
used the following stupid script to compare the flag values in the
config files:
https://gist.github.com/1004885

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 sysconfigs/target/target-x86_64.conf |   32 ++++++++++++++++----------------
 1 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/sysconfigs/target/target-x86_64.conf b/sysconfigs/target/target-x86_64.conf
index ea310bb..d368b6c 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -7,8 +7,8 @@
    family = "6"
    model = "15"
    stepping = "3"
-   feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 ssse3 x2apic"
+   feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
+   feature_ecx = "x2apic ssse3 sse3"
    extfeature_edx = "i64 syscall xd"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
@@ -21,8 +21,8 @@
    family = "6"
    model = "23"
    stepping = "3"
-   feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 cx16 ssse3 sse4.1 x2apic"
+   feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
+   feature_ecx = "x2apic sse4.1 cx16 ssse3 sse3"
    extfeature_edx = "i64 syscall xd"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
@@ -35,8 +35,8 @@
    family = "6"
    model = "26"
    stepping = "3"
-   feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 cx16 ssse3 sse4.1 sse4.2 popcnt x2apic"
+   feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
+   feature_ecx = "popcnt x2apic sse4.2 sse4.1 cx16 ssse3 sse3"
    extfeature_edx = "i64 syscall xd"
    extfeature_ecx = "lahf_lm"
    xlevel = "0x8000000A"
@@ -49,9 +49,9 @@
    family = "15"
    model = "6"
    stepping = "1"
-   feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 x2apic"	# x2apic kvm emulated
-   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx"
+   feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
+   feature_ecx = "x2apic sse3"	# x2apic kvm emulated
+   extfeature_edx = "lm fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
    extfeature_ecx = " "
    xlevel = "0x80000008"
    model_id = "AMD Opteron 240 (Gen 1 Class Opteron)"
@@ -63,9 +63,9 @@
    family = "15"
    model = "6"
    stepping = "1"
-   feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 cx16 x2apic"	# x2apic kvm emulated
-   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx rdtscp"
+   feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
+   feature_ecx = "x2apic cx16 sse3"	# x2apic kvm emulated
+   extfeature_edx = "lm rdtscp fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
    extfeature_ecx = "svm lahf_lm"
    xlevel = "0x80000008"
    model_id = "AMD Opteron 22xx (Gen 2 Class Opteron)"
@@ -77,10 +77,10 @@
    family = "15"
    model = "6"
    stepping = "1"
-   feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
-   feature_ecx = "sse3 cx16 monitor popcnt x2apic"	# x2apic kvm emulated
-   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx rdtscp"
-   extfeature_ecx = "svm sse4a  abm misalignsse lahf_lm"
+   feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
+   feature_ecx = "popcnt x2apic cx16 monitor sse3"	# x2apic kvm emulated
+   extfeature_edx = "lm rdtscp fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
+   extfeature_ecx = "misalignsse sse4a abm svm lahf_lm"
    xlevel = "0x80000008"
    model_id = "AMD Opteron 23xx (Gen 3 Class Opteron)"
 
-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 09/11] cpu defs: add pse36, mca, mtrr to AMD CPU definitions

[Eduardo Habkost]

This patch adds some missing flags to extfeature_edx, that were missing
according to AMD's latest CPUID document.

This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>.

Original John's patch description was:

    cpu model bug fixes and definition corrections

    This patch was intended to address the replicated feature
    flags in cpuid 8000_0001:edx from cpuid 0000_0001:edx.
    This is due to AMD's definition where these flags are
    mostly cloned in the 8000_0001:edx cpuid function.
    qemu64 attempted to glue together the respective Intel
    and AMD nearly disjoint features and this propagated to
    the new Intel models as doing so was believed conservative
    at the time.  However after further soak and test lugging
    around this cruft doesn't provide any value, could
    conceivably confuse a guest, and has confused users trying
    to maintain/add cpu definitions.  This also caused issues
    for libvirt attempting to track this mis-encoding.

    So we've here tossed out the AMD replicated definitions
    from the Intel models, added a few replications into AMD
    definitions which were missing according to AMD's latest
    CPUID document, and reordered the config file flags to
    follow intuitive sequential bit ordering.  Also two flag
    name aliases were added for clarity to Intel models.  The
    end result being the models definitions now conform to
    their respective cpuid specifications sans x2apic which is
    emulated by kvm.

    This was tested with the following combinations:

        [Conroe, Penryn, Nehalem] x [F12-64, win64, win32] -- Intel host
        [Opteron_G1, Opteron_G2, Opteron_G3] x [F12-64, win64, win32] -- AMD host

    Yielding successful boots in all cases.

    Signed-off-by: john cooper <john.cooper@redhat.com>

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 sysconfigs/target/target-x86_64.conf |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/sysconfigs/target/target-x86_64.conf b/sysconfigs/target/target-x86_64.conf
index d368b6c..3874ff1 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -51,7 +51,7 @@
    stepping = "1"
    feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
    feature_ecx = "x2apic sse3"	# x2apic kvm emulated
-   extfeature_edx = "lm fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
+   extfeature_edx = "lm fxsr mmx nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de fpu"
    extfeature_ecx = " "
    xlevel = "0x80000008"
    model_id = "AMD Opteron 240 (Gen 1 Class Opteron)"
@@ -65,7 +65,7 @@
    stepping = "1"
    feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
    feature_ecx = "x2apic cx16 sse3"	# x2apic kvm emulated
-   extfeature_edx = "lm rdtscp fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
+   extfeature_edx = "lm rdtscp fxsr mmx nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de fpu"
    extfeature_ecx = "svm lahf_lm"
    xlevel = "0x80000008"
    model_id = "AMD Opteron 22xx (Gen 2 Class Opteron)"
@@ -79,7 +79,7 @@
    stepping = "1"
    feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr sep apic cx8 mce pae msr tsc pse de fpu"
    feature_ecx = "popcnt x2apic cx16 monitor sse3"	# x2apic kvm emulated
-   extfeature_edx = "lm rdtscp fxsr mmx nx pat cmov pge syscall apic cx8 mce pae msr tsc pse de fpu"
+   extfeature_edx = "lm rdtscp fxsr mmx nx pse36 pat cmov mca pge mtrr syscall apic cx8 mce pae msr tsc pse de fpu"
    extfeature_ecx = "misalignsse sse4a abm svm lahf_lm"
    xlevel = "0x80000008"
    model_id = "AMD Opteron 23xx (Gen 3 Class Opteron)"
-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 10/11] add Westmere as a qemu cpu model

[Eduardo Habkost]

From: john cooper <john.cooper@redhat.com>

This patch adds Westmere as a qemu cpu model.  The only
additional guest visible feature of a Westmere relative
to Nehalem is the inclusion of AES instructions.  However
as other non-ABI visible modifications exist along with
fabrication changes, the CPUID data of the corresponding
deployed silicon was altered slightly to reflect this.

We've seen isolated cases where apparently unrelated yet
slightly incoherent CPUID data has caused problems, most
notably during guest boot.  Providing Westmere as a
model separate fro Nehalem allows us to more easily address
such quirks.

[ehabkost: edited commit message to have a better Subject line]

Signed-off-by: john cooper <john.cooper@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 sysconfigs/target/target-x86_64.conf |   14 ++++++++++++++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/sysconfigs/target/target-x86_64.conf b/sysconfigs/target/target-x86_64.conf
index 3874ff1..fcae2dd 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -43,6 +43,20 @@
    model_id = "Intel Core i7 9xx (Nehalem Class Core i7)"
 
 [cpudef]
+   name = "Westmere"
+   level = "11"
+   vendor = "GenuineIntel"
+   family = "6"
+   model = "44"
+   stepping = "1"
+   feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
+   feature_ecx = "sse3 cx16 ssse3 sse4.1 sse4.2 x2apic popcnt aes"
+   extfeature_edx = "fxsr mmx pat cmov pge apic cx8 mce pae msr tsc pse de fpu    lm syscall nx"
+   extfeature_ecx = "lahf_lm"
+   xlevel = "0x8000000A"
+   model_id = "Westmere E56xx/L56xx/X56xx (Nehalem-C)"
+
+[cpudef]
    name = "Opteron_G1"
    level = "5"
    vendor = "AuthenticAMD"
-- 
1.7.3.2

[Qemu-devel] [RHEL6 qemu-kvm PATCH 11/11] add "default" pseudo CPU model name

[Eduardo Habkost]

From: john cooper <john.cooper@redhat.com>

Launching qemu with "-cpu [check|enforce]" without explicitly
prefixing a valid model name doesn't do as intuitively expected.
Rather qemu exits with a CLI parse error.

Unfortunately due to qemu's CLI argument parsing structure and
the fact cpu models are initialized depending on build configuration,
supporting the above implicitly for the default model is far more
clunky than it ought to be.  So as a minor concession to a far more
simple solution, a pseudo model name of "default" is added which
expands internally to qemu's build configuration default and is then
interpreted conventionally.  The result is then the following example
usage:

    # x86_64-softmmu/qemu-system-x86_64 -cpu default,check
    Using CPU model "qemu64,check"
    warning: host cpuid 0000_0001 lacks requested flag 'popcnt' [0x00800000]
    warning: host cpuid 8000_0001 lacks requested flag 'abm' [0x00000020]
    warning: host cpuid 8000_0001 lacks requested flag 'sse4a' [0x00000040]

    # x86_64-softmmu/qemu-system-x86_64 -cpu default,+aes,enforce
    Using CPU model "qemu64,+aes,enforce"
    warning: host cpuid 0000_0001 lacks requested flag 'popcnt' [0x00800000]
    warning: host cpuid 0000_0001 lacks requested flag 'aes' [0x02000000]
    warning: host cpuid 8000_0001 lacks requested flag 'abm' [0x00000020]
    warning: host cpuid 8000_0001 lacks requested flag 'sse4a' [0x00000040]
    Unable to support requested x86 CPU definition

etc..  allowing both the ability here to "check|enforce" the default
model, as well as accepting arbitrary feature flags due to fan into the
existing flag parsing.  The resulting patch, which also indicates the CPU
model in use, is minimal.

Please review and apply.

[ehabkost: edited commit message to have a better Subject line]

Signed-off-by: john cooper <john.cooper@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 hw/pc.c              |   39 +++++++++++++++++++++++++++++++++++----
 target-i386/helper.c |    1 +
 2 files changed, 36 insertions(+), 4 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 5b94e53..7949f18 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -939,18 +939,49 @@ static CPUState *pc_new_cpu(const char *cpu_model)
     return env;
 }
 
+/* CLI cpu model name which expands to the actual configuration default
+ */
+#define CMDEF_KEYWORD     "default"
+#define CMDEF_KEYWORD_LN (sizeof(CMDEF_KEYWORD) - 1)
+
+/* set configuration default cpu model if current model string is
+ * uninitialized, or if user explicitly requests use of the config'ed
+ * default by specifying a cpu model name of "default".
+ * Use of "default" as a cpu model pseudo-name exists primarily to
+ * ease treatment of qualifier flags requested by the user without
+ * requiring knowledge of all cpu model names in advance of full "-cpu"
+ * option parsing.
+ */
+static const char *setdef_cpu_model(const char *model_str,
+    const char *default_str)
+{
+    int default_str_ln = strlen(default_str);
+
+    if (!model_str || !*model_str) {
+        return default_str;
+    } else if (strncmp(model_str, CMDEF_KEYWORD, CMDEF_KEYWORD_LN)) {
+        return model_str;
+    } else {
+        char *new = qemu_malloc(strlen(model_str) - CMDEF_KEYWORD_LN +
+            default_str_ln + 1);
+
+        strcpy(new, default_str);
+        strcpy(new + default_str_ln, model_str + CMDEF_KEYWORD_LN);
+        return new;
+    }
+}
+
 void pc_cpus_init(const char *cpu_model)
 {
     int i;
 
     /* init CPUs */
-    if (cpu_model == NULL) {
+    cpu_model = setdef_cpu_model(cpu_model,
 #ifdef TARGET_X86_64
-        cpu_model = "qemu64";
+        "qemu64");
 #else
-        cpu_model = "qemu32";
+        "qemu32");
 #endif
-    }
 
     for(i = 0; i < smp_cpus; i++) {
         pc_new_cpu(cpu_model);
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 73f44e8..0b37063 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1251,6 +1251,7 @@ CPUX86State *cpu_x86_init(const char *cpu_model)
     env = qemu_mallocz(sizeof(CPUX86State));
     cpu_exec_init(env);
     env->cpu_model_str = cpu_model;
+    fprintf(stderr, "Using CPU model \"%s\"\n", cpu_model);
 
     /* init various static tables */
     if (!inited) {
-- 
1.7.3.2

Re: [Qemu-devel] [PATCH 00/11] cpu model bug fixes and definition corrections (v2)

[Eduardo Habkost]

Ouch, the subject prefix is completely wrong because of broken
git-send-email config on my side, sorry.

Please ignore the 'RHEL6 qemu-kvm' prefix, it is actually supposed to go
to the main Qemu tree.

-- 
Eduardo

Re: [Qemu-devel] [PATCH 00/11] cpu model bug fixes and definition corrections (v2)

[Jan Kiszka]

[-- Attachment #1: Type: text/plain, Size: 408 bytes --]

On 2011-06-02 21:34, Eduardo Habkost wrote:
> Ouch, the subject prefix is completely wrong because of broken
> git-send-email config on my side, sorry.
> 
> Please ignore the 'RHEL6 qemu-kvm' prefix, it is actually supposed to go
> to the main Qemu tree.

Some of my review comments on John's original version still apply. Same
for the advice on the patch flow (uq/master for kvm stuff).

Jan



[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 259 bytes --]

Re: [Qemu-devel] [PATCH 00/11] cpu model bug fixes and definition corrections (v2)

[Eduardo Habkost]

(CCing Marcelo, Avi, and kvm mailing list, so they can help answering
the uq/master patch flow question)

On Fri, Jun 03, 2011 at 12:51:42AM +0200, Jan Kiszka wrote:
> On 2011-06-02 21:34, Eduardo Habkost wrote:
> > Ouch, the subject prefix is completely wrong because of broken
> > git-send-email config on my side, sorry.
> > 
> > Please ignore the 'RHEL6 qemu-kvm' prefix, it is actually supposed to go
> > to the main Qemu tree.
> 
> Some of my review comments on John's original version still apply. Same
> for the advice on the patch flow (uq/master for kvm stuff).

Just to make sure I didn't miss anything:

1) uq/master flow: considering that most of the series is not
  KVM-specific but depends on patch 02/11 (Allow an optional
  qemu_early_init_vcpu()) what is the best approach? Should the whole
  series go through uq/master, or just patch 02/11? In the case of the
  latter, shall the rest of the series wait for the patch to be merged
  upstream, or should patch 02/11 go to both branches at the same time?

2) Reviewing cpu_x86_cpuid() cpuid hacking code & dropping
  -enable-nesting: should it hold the series, or may it be addressed
  after this series enter the tree?

3) Other recommendations for the qemu_early_init_vcpu() code
   (checkpatch.sh, return code evaluation, KVMState vs. VCPU): I will
   address those issues and send a new version.

Something else I may have missed?

-- 
Eduardo

Re: [Qemu-devel] [PATCH 00/11] cpu model bug fixes and definition corrections (v2)

[Jan Kiszka]

On 2011-06-03 16:38, Eduardo Habkost wrote:
> (CCing Marcelo, Avi, and kvm mailing list, so they can help answering
> the uq/master patch flow question)
> 
> On Fri, Jun 03, 2011 at 12:51:42AM +0200, Jan Kiszka wrote:
>> On 2011-06-02 21:34, Eduardo Habkost wrote:
>>> Ouch, the subject prefix is completely wrong because of broken
>>> git-send-email config on my side, sorry.
>>>
>>> Please ignore the 'RHEL6 qemu-kvm' prefix, it is actually supposed to go
>>> to the main Qemu tree.
>>
>> Some of my review comments on John's original version still apply. Same
>> for the advice on the patch flow (uq/master for kvm stuff).
> 
> Just to make sure I didn't miss anything:
> 
> 1) uq/master flow: considering that most of the series is not
>   KVM-specific but depends on patch 02/11 (Allow an optional
>   qemu_early_init_vcpu()) what is the best approach? Should the whole
>   series go through uq/master, or just patch 02/11? In the case of the
>   latter, shall the rest of the series wait for the patch to be merged
>   upstream, or should patch 02/11 go to both branches at the same time?

I would suggest to break out those patches that touch KVM
infrastructure, post them for uq/master, and declare the rest of the
series to depend on them.

> 
> 2) Reviewing cpu_x86_cpuid() cpuid hacking code & dropping
>   -enable-nesting: should it hold the series, or may it be addressed
>   after this series enter the tree?

No that does not need to block the series. I would just recommend
checking if there is anything in that diff directly related. If not,
let's address it separately.

> 
> 3) Other recommendations for the qemu_early_init_vcpu() code
>    (checkpatch.sh, return code evaluation, KVMState vs. VCPU): I will
>    address those issues and send a new version.

Find some proposal for a refactored kvm_arch_get_supported_cpuid API
below.

> 
> Something else I may have missed?
> 

Nothing critical, I'm just hoping someone finds the time to fix
sysconfigs loading when starting qemu from a build directory.  :)

Thanks,
Jan

-------8<-------
From: Jan Kiszka <jan.kiszka@siemens.com>

kvm: x86: Pass KVMState to kvm_arch_get_supported_cpuid

kvm_arch_get_supported_cpuid checks for global cpuid restrictions, it
does not require any CPUState reference. Changing its interface allows
to call it before any VCPU is initialized.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
 kvm.h               |    2 +-
 target-i386/cpuid.c |   20 ++++++++++++--------
 target-i386/kvm.c   |   30 +++++++++++++++---------------
 3 files changed, 28 insertions(+), 24 deletions(-)

diff --git a/kvm.h b/kvm.h
index d565dba..243b063 100644
--- a/kvm.h
+++ b/kvm.h
@@ -157,7 +157,7 @@ bool kvm_arch_stop_on_emulation_error(CPUState *env);
 
 int kvm_check_extension(KVMState *s, unsigned int extension);
 
-uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function,
+uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function,
                                       uint32_t index, int reg);
 void kvm_cpu_synchronize_state(CPUState *env);
 void kvm_cpu_synchronize_post_reset(CPUState *env);
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index 79e7580..e1ae3af 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -1144,10 +1144,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
         break;
     case 7:
         if (kvm_enabled()) {
-            *eax = kvm_arch_get_supported_cpuid(env, 0x7, count, R_EAX);
-            *ebx = kvm_arch_get_supported_cpuid(env, 0x7, count, R_EBX);
-            *ecx = kvm_arch_get_supported_cpuid(env, 0x7, count, R_ECX);
-            *edx = kvm_arch_get_supported_cpuid(env, 0x7, count, R_EDX);
+            KVMState *s = env->kvm_state;
+
+            *eax = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EAX);
+            *ebx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EBX);
+            *ecx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_ECX);
+            *edx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EDX);
         } else {
             *eax = 0;
             *ebx = 0;
@@ -1179,10 +1181,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             break;
         }
         if (kvm_enabled()) {
-            *eax = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EAX);
-            *ebx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EBX);
-            *ecx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_ECX);
-            *edx = kvm_arch_get_supported_cpuid(env, 0xd, count, R_EDX);
+            KVMState *s = env->kvm_state;
+
+            *eax = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EAX);
+            *ebx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EBX);
+            *ecx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_ECX);
+            *edx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EDX);
         } else {
             *eax = 0;
             *ebx = 0;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 1ae2d61..fbdf612 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -106,12 +106,12 @@ struct kvm_para_features {
     { -1, -1 }
 };
 
-static int get_para_features(CPUState *env)
+static int get_para_features(KVMState *s)
 {
     int i, features = 0;
 
     for (i = 0; i < ARRAY_SIZE(para_features) - 1; i++) {
-        if (kvm_check_extension(env->kvm_state, para_features[i].cap)) {
+        if (kvm_check_extension(s, para_features[i].cap)) {
             features |= (1 << para_features[i].feature);
         }
     }
@@ -121,7 +121,7 @@ static int get_para_features(CPUState *env)
 #endif
 
 
-uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function,
+uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
                                       uint32_t index, int reg)
 {
     struct kvm_cpuid2 *cpuid;
@@ -133,7 +133,7 @@ uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function,
 #endif
 
     max = 1;
-    while ((cpuid = try_get_cpuid(env->kvm_state, max)) == NULL) {
+    while ((cpuid = try_get_cpuid(s, max)) == NULL) {
         max *= 2;
     }
 
@@ -166,7 +166,7 @@ uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function,
                     /* On Intel, kvm returns cpuid according to the Intel spec,
                      * so add missing bits according to the AMD spec:
                      */
-                    cpuid_1_edx = kvm_arch_get_supported_cpuid(env, 1, 0, R_EDX);
+                    cpuid_1_edx = kvm_arch_get_supported_cpuid(s, 1, 0, R_EDX);
                     ret |= cpuid_1_edx & 0x183f7ff;
                     break;
                 }
@@ -180,7 +180,7 @@ uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function,
 #ifdef CONFIG_KVM_PARA
     /* fallback for older kernels */
     if (!has_kvm_features && (function == KVM_CPUID_FEATURES)) {
-        ret = get_para_features(env);
+        ret = get_para_features(s);
     }
 #endif
 
@@ -374,6 +374,7 @@ int kvm_arch_init_vcpu(CPUState *env)
         struct kvm_cpuid2 cpuid;
         struct kvm_cpuid_entry2 entries[100];
     } __attribute__((packed)) cpuid_data;
+    KVMState *s = env->kvm_state;
     uint32_t limit, i, j, cpuid_i;
     uint32_t unused;
     struct kvm_cpuid_entry2 *c;
@@ -381,20 +382,19 @@ int kvm_arch_init_vcpu(CPUState *env)
     uint32_t signature[3];
 #endif
 
-    env->cpuid_features &= kvm_arch_get_supported_cpuid(env, 1, 0, R_EDX);
+    env->cpuid_features &= kvm_arch_get_supported_cpuid(s, 1, 0, R_EDX);
 
     i = env->cpuid_ext_features & CPUID_EXT_HYPERVISOR;
-    env->cpuid_ext_features &= kvm_arch_get_supported_cpuid(env, 1, 0, R_ECX);
+    env->cpuid_ext_features &= kvm_arch_get_supported_cpuid(s, 1, 0, R_ECX);
     env->cpuid_ext_features |= i;
 
-    env->cpuid_ext2_features &= kvm_arch_get_supported_cpuid(env, 0x80000001,
+    env->cpuid_ext2_features &= kvm_arch_get_supported_cpuid(s, 0x80000001,
                                                              0, R_EDX);
-    env->cpuid_ext3_features &= kvm_arch_get_supported_cpuid(env, 0x80000001,
+    env->cpuid_ext3_features &= kvm_arch_get_supported_cpuid(s, 0x80000001,
                                                              0, R_ECX);
-    env->cpuid_svm_features  &= kvm_arch_get_supported_cpuid(env, 0x8000000A,
+    env->cpuid_svm_features  &= kvm_arch_get_supported_cpuid(s, 0x8000000A,
                                                              0, R_EDX);
 
-
     cpuid_i = 0;
 
 #ifdef CONFIG_KVM_PARA
@@ -411,8 +411,8 @@ int kvm_arch_init_vcpu(CPUState *env)
     c = &cpuid_data.entries[cpuid_i++];
     memset(c, 0, sizeof(*c));
     c->function = KVM_CPUID_FEATURES;
-    c->eax = env->cpuid_kvm_features & kvm_arch_get_supported_cpuid(env,
-                                                KVM_CPUID_FEATURES, 0, R_EAX);
+    c->eax = env->cpuid_kvm_features &
+        kvm_arch_get_supported_cpuid(s, KVM_CPUID_FEATURES, 0, R_EAX);
 
 #ifdef KVM_CAP_ASYNC_PF
     has_msr_async_pf_en = c->eax & (1 << KVM_FEATURE_ASYNC_PF);
@@ -485,7 +485,7 @@ int kvm_arch_init_vcpu(CPUState *env)
     /* Call Centaur's CPUID instructions they are supported. */
     if (env->cpuid_xlevel2 > 0) {
         env->cpuid_ext4_features &=
-            kvm_arch_get_supported_cpuid(env, 0xC0000001, 0, R_EDX);
+            kvm_arch_get_supported_cpuid(s, 0xC0000001, 0, R_EDX);
         cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused);
 
         for (i = 0xC0000000; i <= limit; i++) {

-- 
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux

Re: [Qemu-devel] [PATCH 00/11] cpu model bug fixes and definition corrections (v2)

[Markus Armbruster]

Jan Kiszka <jan.kiszka@siemens.com> writes:

[...]
>> Something else I may have missed?
>> 
>
> Nothing critical, I'm just hoping someone finds the time to fix
> sysconfigs loading when starting qemu from a build directory.  :)

There's nice to have, important, critical, and really annoying.  This
one's really annoying.