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From: Eduardo Habkost <ehabkost@redhat.com>
To: Anthony Liguori <anthony@codemonkey.ws>
Cc: qemu-devel@nongnu.org
Subject: [Qemu-devel] [RHEL6 qemu-kvm PATCH 01/11] correct archaic CPU model "model" field for Intel CPUs.
Date: Thu,  2 Jun 2011 16:13:00 -0300	[thread overview]
Message-ID: <1307041990-26194-2-git-send-email-ehabkost@redhat.com> (raw)
In-Reply-To: <1307041990-26194-1-git-send-email-ehabkost@redhat.com>

From: john cooper <john.cooper@redhat.com>

The old "model" values caused two known problems:

    - Skype crashes on a winxp guest if model < 6, due to syscall vs.
      sysenter confusion.

    - 32 bit windows doesn't enable MSI support if model < 13.

After consulting with Intel the following recommendations were
received which more accurately represent shipped silicon.

[ehabkost: made Subject line shorter]

Signed-off-by: john cooper <john.cooper@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 sysconfigs/target/target-x86_64.conf |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/sysconfigs/target/target-x86_64.conf b/sysconfigs/target/target-x86_64.conf
index 43ad282..0613870 100644
--- a/sysconfigs/target/target-x86_64.conf
+++ b/sysconfigs/target/target-x86_64.conf
@@ -5,7 +5,7 @@
    level = "2"
    vendor = "GenuineIntel"
    family = "6"
-   model = "2"
+   model = "15"
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 ssse3"
@@ -19,7 +19,7 @@
    level = "2"
    vendor = "GenuineIntel"
    family = "6"
-   model = "2"
+   model = "23"
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 cx16 ssse3 sse4.1"
@@ -33,7 +33,7 @@
    level = "2"
    vendor = "GenuineIntel"
    family = "6"
-   model = "2"
+   model = "26"
    stepping = "3"
    feature_edx = "sse2 sse fxsr mmx pat cmov pge sep apic cx8 mce pae msr tsc pse de fpu    mtrr clflush mca pse36"
    feature_ecx = "sse3 cx16 ssse3 sse4.1 sse4.2 popcnt"
-- 
1.7.3.2

  reply	other threads:[~2011-06-02 19:13 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-06-02 19:12 [Qemu-devel] [RHEL6 qemu-kvm PATCH 00/11] cpu model bug fixes and definition corrections (v2) Eduardo Habkost
2011-06-02 19:13 ` Eduardo Habkost [this message]
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 02/11] Allow an optional qemu_early_init_vcpu() Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 03/11] Add kvm emulated x2apic flag to config defined cpu models (v2) Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 04/11] Support -readconfig "?" to debug config file loading Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 05/11] cpu defs: use Intel flag names for Intel models Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 06/11] cpu defs: remove replicated flags from Intel Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 07/11] cpu defs: uncomment empty extfeatures_ecx definition for Opteron_G1 Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 08/11] reorder cpuid feature bits on target-x86_64.conf Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 09/11] cpu defs: add pse36, mca, mtrr to AMD CPU definitions Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 10/11] add Westmere as a qemu cpu model Eduardo Habkost
2011-06-02 19:13 ` [Qemu-devel] [RHEL6 qemu-kvm PATCH 11/11] add "default" pseudo CPU model name Eduardo Habkost
2011-06-02 19:34 ` [Qemu-devel] [PATCH 00/11] cpu model bug fixes and definition corrections (v2) Eduardo Habkost
2011-06-02 22:51   ` Jan Kiszka
2011-06-03 14:38     ` Eduardo Habkost
2011-06-03 14:51       ` Jan Kiszka
2011-06-09  6:43         ` Markus Armbruster

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