From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:42049) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QUNuf-0006N9-CR for qemu-devel@nongnu.org; Wed, 08 Jun 2011 14:55:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QUNuY-00068l-JO for qemu-devel@nongnu.org; Wed, 08 Jun 2011 14:55:33 -0400 Received: from fmmailgate01.web.de ([217.72.192.221]:37253) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QUNuX-00068O-RE for qemu-devel@nongnu.org; Wed, 08 Jun 2011 14:55:26 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 8 Jun 2011 20:55:13 +0200 Message-Id: <1307559319-16183-7-git-send-email-andreas.faerber@web.de> In-Reply-To: <1307559319-16183-6-git-send-email-andreas.faerber@web.de> References: <4DEF2F25.5070104@redhat.com> <1307559319-16183-1-git-send-email-andreas.faerber@web.de> <1307559319-16183-2-git-send-email-andreas.faerber@web.de> <1307559319-16183-3-git-send-email-andreas.faerber@web.de> <1307559319-16183-4-git-send-email-andreas.faerber@web.de> <1307559319-16183-5-git-send-email-andreas.faerber@web.de> <1307559319-16183-6-git-send-email-andreas.faerber@web.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Sender: andreas.faerber@web.de Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [RFC v4 06/12] parallel: Implement ISA set_state callback List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , hpoussin@reactos.org, kraxel@redhat.com Add "enabled" property. Signed-off-by: Andreas F=C3=A4rber --- hw/parallel.c | 69 ++++++++++++++++++++++++++++++++++++++-------------= ----- 1 files changed, 47 insertions(+), 22 deletions(-) diff --git a/hw/parallel.c b/hw/parallel.c index cc853a5..0cfc697 100644 --- a/hw/parallel.c +++ b/hw/parallel.c @@ -446,6 +446,50 @@ static void parallel_reset(void *opaque) s->last_read_offset =3D ~0U; } =20 +static int parallel_isa_statefn(ISADevice *dev, bool enabled) +{ + ISAParallelState *isa =3D DO_UPCAST(ISAParallelState, dev, dev); + ParallelState *s =3D &isa->state; + int base; + + base =3D isa->iobase; + if (enabled) { + isa_init_irq(dev, &s->irq, isa->isairq); + + if (s->hw_driver) { + register_ioport_write(base, 8, 1, parallel_ioport_write_hw, = s); + register_ioport_read(base, 8, 1, parallel_ioport_read_hw, s)= ; + isa_init_ioport_range(dev, base, 8); + + register_ioport_write(base + 4, 1, 2, parallel_ioport_eppdat= a_write_hw2, s); + register_ioport_read(base + 4, 1, 2, parallel_ioport_eppdata= _read_hw2, s); + register_ioport_write(base + 4, 1, 4, parallel_ioport_eppdat= a_write_hw4, s); + register_ioport_read(base + 4, 1, 4, parallel_ioport_eppdata= _read_hw4, s); + isa_init_ioport(dev, base + 4); + register_ioport_write(base + 0x400, 8, 1, parallel_ioport_ec= p_write, s); + register_ioport_read(base + 0x400, 8, 1, parallel_ioport_ecp= _read, s); + isa_init_ioport_range(dev, base + 0x400, 8); + } + else { + register_ioport_write(base, 8, 1, parallel_ioport_write_sw, = s); + register_ioport_read(base, 8, 1, parallel_ioport_read_sw, s)= ; + isa_init_ioport_range(dev, base, 8); + } + } else { + isa_discard_irq(dev, isa->isairq); + + isa_discard_ioport_range(dev, base, 8); + isa_unassign_ioport(base, 8); + if (s->hw_driver) { + isa_discard_ioport_range(dev, base + 4, 1); + isa_unassign_ioport(base + 4, 1); + isa_discard_ioport_range(dev, base + 0x400, 8); + isa_unassign_ioport(base + 0x400, 8); + } + } + return 0; +} + static const int isa_parallel_io[MAX_PARALLEL_PORTS] =3D { 0x378, 0x278,= 0x3bc }; =20 static int parallel_isa_initfn(ISADevice *dev) @@ -453,7 +497,6 @@ static int parallel_isa_initfn(ISADevice *dev) static int index; ISAParallelState *isa =3D DO_UPCAST(ISAParallelState, dev, dev); ParallelState *s =3D &isa->state; - int base; uint8_t dummy; =20 if (!s->chr) { @@ -469,8 +512,6 @@ static int parallel_isa_initfn(ISADevice *dev) isa->iobase =3D isa_parallel_io[isa->index]; index++; =20 - base =3D isa->iobase; - isa_init_irq(dev, &s->irq, isa->isairq); qemu_register_reset(parallel_reset, s); =20 if (qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_READ_STATUS, &dummy) =3D=3D = 0) { @@ -478,25 +519,7 @@ static int parallel_isa_initfn(ISADevice *dev) s->status =3D dummy; } =20 - if (s->hw_driver) { - register_ioport_write(base, 8, 1, parallel_ioport_write_hw, s); - register_ioport_read(base, 8, 1, parallel_ioport_read_hw, s); - isa_init_ioport_range(dev, base, 8); - - register_ioport_write(base+4, 1, 2, parallel_ioport_eppdata_writ= e_hw2, s); - register_ioport_read(base+4, 1, 2, parallel_ioport_eppdata_read_= hw2, s); - register_ioport_write(base+4, 1, 4, parallel_ioport_eppdata_writ= e_hw4, s); - register_ioport_read(base+4, 1, 4, parallel_ioport_eppdata_read_= hw4, s); - isa_init_ioport(dev, base+4); - register_ioport_write(base+0x400, 8, 1, parallel_ioport_ecp_writ= e, s); - register_ioport_read(base+0x400, 8, 1, parallel_ioport_ecp_read,= s); - isa_init_ioport_range(dev, base+0x400, 8); - } - else { - register_ioport_write(base, 8, 1, parallel_ioport_write_sw, s); - register_ioport_read(base, 8, 1, parallel_ioport_read_sw, s); - isa_init_ioport_range(dev, base, 8); - } + parallel_isa_statefn(dev, true); return 0; } =20 @@ -581,11 +604,13 @@ static ISADeviceInfo parallel_isa_info =3D { .qdev.name =3D "isa-parallel", .qdev.size =3D sizeof(ISAParallelState), .init =3D parallel_isa_initfn, + .set_state =3D parallel_isa_statefn, .qdev.props =3D (Property[]) { DEFINE_PROP_UINT32("index", ISAParallelState, index, -1), DEFINE_PROP_HEX32("iobase", ISAParallelState, iobase, -1), DEFINE_PROP_UINT32("irq", ISAParallelState, isairq, 7), DEFINE_PROP_CHR("chardev", ISAParallelState, state.chr), + DEFINE_PROP_BOOL("enabled", ISAParallelState, dev.enabled, true)= , DEFINE_PROP_END_OF_LIST(), }, }; --=20 1.7.5.3